crypto/qat: support ChaCha20-Poly1305

[dpdk.git] / drivers / common / qat / qat_adf / icp_qat_hw.h

diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/qat_adf/icp_qat_hw.h
index cef6486..fdc0f19 100644 (file)
--- a/drivers/common/qat/qat_adf/icp_qat_hw.h
+++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
@@ -204,7 +204,9 @@ enum icp_qat_hw_cipher_algo {
        ICP_QAT_HW_CIPHER_ALGO_KASUMI = 7,
        ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 = 8,
        ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3 = 9,
-       ICP_QAT_HW_CIPHER_DELIMITER = 10
+       ICP_QAT_HW_CIPHER_ALGO_SM4 = 10,
+       ICP_QAT_HW_CIPHER_ALGO_CHACHA20_POLY1305 = 11,
+       ICP_QAT_HW_CIPHER_DELIMITER = 12
 };
 
 enum icp_qat_hw_cipher_mode {
@@ -306,6 +308,12 @@ enum icp_qat_hw_cipher_convert {
 #define ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ 16
 #define ICP_QAT_HW_ZUC_3G_EEA3_IV_SZ 16
 #define ICP_QAT_HW_MODE_F8_NUM_REG_TO_CLEAR 2
+#define ICP_QAT_HW_CHACHAPOLY_KEY_SZ 32
+#define ICP_QAT_HW_CHACHAPOLY_IV_SZ 12
+#define ICP_QAT_HW_CHACHAPOLY_BLK_SZ 64
+#define ICP_QAT_HW_SPC_CTR_SZ 16
+#define ICP_QAT_HW_CHACHAPOLY_ICV_SZ 16
+#define ICP_QAT_HW_CHACHAPOLY_AAD_MAX_LOG 14
 
 #define ICP_QAT_HW_CIPHER_MAX_KEY_SZ ICP_QAT_HW_AES_256_F8_KEY_SZ