cryptodev: change queue pair configure structure

[dpdk.git] / drivers / crypto / aesni_mb / rte_aesni_mb_pmd_private.h

diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h
index d8021cd..61f419d 100644 (file)
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h
@@ -5,7 +5,32 @@
 #ifndef _RTE_AESNI_MB_PMD_PRIVATE_H_
 #define _RTE_AESNI_MB_PMD_PRIVATE_H_
 
+#include <intel-ipsec-mb.h>
+
+
+/*
+ * IMB_VERSION_NUM macro was introduced in version Multi-buffer 0.50,
+ * so if macro is not defined, it means that the version is 0.49.
+ */
+#if !defined(IMB_VERSION_NUM)
+#define IMB_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))
+#define IMB_VERSION_NUM IMB_VERSION(0, 49, 0)
+#endif
+
+#if IMB_VERSION_NUM < IMB_VERSION(0, 52, 0)
 #include "aesni_mb_ops.h"
+#endif
+
+#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)
+enum aesni_mb_vector_mode {
+       RTE_AESNI_MB_NOT_SUPPORTED = 0,
+       RTE_AESNI_MB_SSE,
+       RTE_AESNI_MB_AVX,
+       RTE_AESNI_MB_AVX2,
+       RTE_AESNI_MB_AVX512
+};
+#endif
+
 
 #define CRYPTODEV_NAME_AESNI_MB_PMD    crypto_aesni_mb
 /**< AES-NI Multi buffer PMD device name */
@@ -83,7 +108,16 @@ static const unsigned auth_digest_byte_lengths[] = {
                [AES_XCBC]      = 16,
                [AES_CMAC]      = 16,
                [AES_GMAC]      = 12,
-               [NULL_HASH]             = 0
+               [NULL_HASH]     = 0,
+#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)
+               [PLAIN_SHA1]    = 20,
+               [PLAIN_SHA_224] = 28,
+               [PLAIN_SHA_256] = 32,
+               [PLAIN_SHA_384] = 48,
+               [PLAIN_SHA_512] = 64
+#endif
+       /**< Vector mode dependent pointer table of the multi-buffer APIs */
+
 };
 
 /**
@@ -115,6 +149,10 @@ struct aesni_mb_private {
        /**< CPU vector instruction set mode */
        unsigned max_nb_queue_pairs;
        /**< Max number of queue pairs supported by device */
+#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)
+       MB_MGR *mb_mgr;
+       /**< Multi-buffer instance */
+#endif
 };
 
 /** AESNI Multi buffer queue pair */
@@ -122,15 +160,19 @@ struct aesni_mb_qp {
        uint16_t id;
        /**< Queue Pair Identifier */
        char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+#if IMB_VERSION_NUM < IMB_VERSION(0, 52, 0)
        /**< Unique Queue Pair Name */
        const struct aesni_mb_op_fns *op_fns;
-       /**< Vector mode dependent pointer table of the multi-buffer APIs */
+#endif
+       /**< Unique Queue Pair Name */
        MB_MGR *mb_mgr;
        /**< Multi-buffer instance */
        struct rte_ring *ingress_queue;
-       /**< Ring for placing operations ready for processing */
+       /**< Ring for placing operations ready for processing */
        struct rte_mempool *sess_mp;
        /**< Session Mempool */
+       struct rte_mempool *sess_mp_priv;
+       /**< Session Private Data Mempool */
        struct rte_cryptodev_stats stats;
        /**< Queue pair statistics */
        uint8_t digest_idx;
@@ -153,7 +195,9 @@ struct aesni_mb_session {
        } iv;
        /**< IV parameters */
 
-       /** Cipher Parameters */
+       /** Cipher Parameters */const struct aesni_mb_op_fns *op_fns;
+       /**< Vector mode dependent pointer table of the multi-buffer APIs */
+
        struct {
                /** Cipher direction - encrypt / decrypt */
                JOB_CIPHER_DIRECTION direction;
@@ -234,14 +278,21 @@ struct aesni_mb_session {
 } __rte_cache_aligned;
 
 
+
+#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)
 /**
  *
  */
 extern int
+aesni_mb_set_session_parameters(const MB_MGR *mb_mgr,
+               struct aesni_mb_session *sess,
+               const struct rte_crypto_sym_xform *xform);
+#else
+extern int
 aesni_mb_set_session_parameters(const struct aesni_mb_op_fns *mb_ops,
                struct aesni_mb_session *sess,
                const struct rte_crypto_sym_xform *xform);
-
+#endif
 
 /** device specific operations function pointer structure */
 extern struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops;