* Copyright(c) 2018 Aquantia Corporation
*/
+#include <rte_string_fns.h>
#include <rte_ethdev_pci.h>
+#include <rte_alarm.h>
#include "atl_ethdev.h"
#include "atl_common.h"
static int atl_dev_set_eeprom(struct rte_eth_dev *dev,
struct rte_dev_eeprom_info *eeprom);
+/* Regs */
+static int atl_dev_get_regs(struct rte_eth_dev *dev,
+ struct rte_dev_reg_info *regs);
+
/* Flow control */
static int atl_flow_ctrl_get(struct rte_eth_dev *dev,
struct rte_eth_fc_conf *fc_conf);
static int atl_add_mac_addr(struct rte_eth_dev *dev,
- struct ether_addr *mac_addr,
+ struct rte_ether_addr *mac_addr,
uint32_t index, uint32_t pool);
static void atl_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index);
static int atl_set_default_mac_addr(struct rte_eth_dev *dev,
- struct ether_addr *mac_addr);
+ struct rte_ether_addr *mac_addr);
static int atl_dev_set_mc_addr_list(struct rte_eth_dev *dev,
- struct ether_addr *mc_addr_set,
+ struct rte_ether_addr *mc_addr_set,
uint32_t nb_mc_addr);
/* RSS */
| DEV_RX_OFFLOAD_IPV4_CKSUM \
| DEV_RX_OFFLOAD_UDP_CKSUM \
| DEV_RX_OFFLOAD_TCP_CKSUM \
- | DEV_RX_OFFLOAD_JUMBO_FRAME)
+ | DEV_RX_OFFLOAD_JUMBO_FRAME \
+ | DEV_RX_OFFLOAD_MACSEC_STRIP \
+ | DEV_RX_OFFLOAD_VLAN_FILTER)
#define ATL_TX_OFFLOADS (DEV_TX_OFFLOAD_VLAN_INSERT \
| DEV_TX_OFFLOAD_IPV4_CKSUM \
| DEV_TX_OFFLOAD_UDP_CKSUM \
| DEV_TX_OFFLOAD_TCP_CKSUM \
| DEV_TX_OFFLOAD_TCP_TSO \
+ | DEV_TX_OFFLOAD_MACSEC_INSERT \
| DEV_TX_OFFLOAD_MULTI_SEGS)
+#define SFP_EEPROM_SIZE 0x100
+
static const struct rte_eth_desc_lim rx_desc_lim = {
.nb_max = ATL_MAX_RING_DESC,
.nb_min = ATL_MIN_RING_DESC,
.nb_mtu_seg_max = ATL_TX_MAX_SEG,
};
+enum atl_xstats_type {
+ XSTATS_TYPE_MSM = 0,
+ XSTATS_TYPE_MACSEC,
+};
+
#define ATL_XSTATS_FIELD(name) { \
#name, \
- offsetof(struct aq_stats_s, name) \
+ offsetof(struct aq_stats_s, name), \
+ XSTATS_TYPE_MSM \
+}
+
+#define ATL_MACSEC_XSTATS_FIELD(name) { \
+ #name, \
+ offsetof(struct macsec_stats, name), \
+ XSTATS_TYPE_MACSEC \
}
struct atl_xstats_tbl_s {
const char *name;
unsigned int offset;
+ enum atl_xstats_type type;
};
static struct atl_xstats_tbl_s atl_xstats_tbl[] = {
ATL_XSTATS_FIELD(mbtc),
ATL_XSTATS_FIELD(bbrc),
ATL_XSTATS_FIELD(bbtc),
+ /* Ingress Common Counters */
+ ATL_MACSEC_XSTATS_FIELD(in_ctl_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_tagged_miss_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_untagged_miss_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_notag_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_untagged_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_bad_tag_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_no_sci_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_unknown_sci_pkts),
+ /* Ingress SA Counters */
+ ATL_MACSEC_XSTATS_FIELD(in_untagged_hit_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_not_using_sa),
+ ATL_MACSEC_XSTATS_FIELD(in_unused_sa),
+ ATL_MACSEC_XSTATS_FIELD(in_not_valid_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_invalid_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_ok_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_unchecked_pkts),
+ ATL_MACSEC_XSTATS_FIELD(in_validated_octets),
+ ATL_MACSEC_XSTATS_FIELD(in_decrypted_octets),
+ /* Egress Common Counters */
+ ATL_MACSEC_XSTATS_FIELD(out_ctl_pkts),
+ ATL_MACSEC_XSTATS_FIELD(out_unknown_sa_pkts),
+ ATL_MACSEC_XSTATS_FIELD(out_untagged_pkts),
+ ATL_MACSEC_XSTATS_FIELD(out_too_long),
+ /* Egress SC Counters */
+ ATL_MACSEC_XSTATS_FIELD(out_sc_protected_pkts),
+ ATL_MACSEC_XSTATS_FIELD(out_sc_encrypted_pkts),
+ /* Egress SA Counters */
+ ATL_MACSEC_XSTATS_FIELD(out_sa_hit_drop_redirect),
+ ATL_MACSEC_XSTATS_FIELD(out_sa_protected2_pkts),
+ ATL_MACSEC_XSTATS_FIELD(out_sa_protected_pkts),
+ ATL_MACSEC_XSTATS_FIELD(out_sa_encrypted_pkts),
};
static const struct eth_dev_ops atl_eth_dev_ops = {
/* Link */
.link_update = atl_dev_link_update,
+ .get_reg = atl_dev_get_regs,
+
/* Stats */
.stats_get = atl_dev_stats_get,
.xstats_get = atl_dev_xstats_get,
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
uint32_t intr_vector = 0;
- uint32_t *link_speeds;
- uint32_t speed = 0;
int status;
int err;
goto error;
}
+ err = atl_dev_set_link_up(dev);
+
err = hw->aq_fw_ops->update_link_status(hw);
if (err)
dev->data->dev_link.link_status = hw->aq_link_status.mbps != 0;
- link_speeds = &dev->data->dev_conf.link_speeds;
-
- speed = 0x0;
-
- if (*link_speeds == ETH_LINK_SPEED_AUTONEG) {
- speed = hw->aq_nic_cfg->link_speed_msk;
- } else {
- if (*link_speeds & ETH_LINK_SPEED_10G)
- speed |= AQ_NIC_RATE_10G;
- if (*link_speeds & ETH_LINK_SPEED_5G)
- speed |= AQ_NIC_RATE_5G;
- if (*link_speeds & ETH_LINK_SPEED_1G)
- speed |= AQ_NIC_RATE_1G;
- if (*link_speeds & ETH_LINK_SPEED_2_5G)
- speed |= AQ_NIC_RATE_2G5;
- if (*link_speeds & ETH_LINK_SPEED_100M)
- speed |= AQ_NIC_RATE_100M;
- }
-
- err = hw->aq_fw_ops->set_link_speed(hw, speed);
- if (err)
- goto error;
-
if (rte_intr_allow_others(intr_handle)) {
/* check if lsc interrupt is enabled */
if (dev->data->dev_conf.intr_conf.lsc != 0)
atl_dev_set_link_up(struct rte_eth_dev *dev)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint32_t link_speeds = dev->data->dev_conf.link_speeds;
+ uint32_t speed_mask = 0;
+
+ if (link_speeds == ETH_LINK_SPEED_AUTONEG) {
+ speed_mask = hw->aq_nic_cfg->link_speed_msk;
+ } else {
+ if (link_speeds & ETH_LINK_SPEED_10G)
+ speed_mask |= AQ_NIC_RATE_10G;
+ if (link_speeds & ETH_LINK_SPEED_5G)
+ speed_mask |= AQ_NIC_RATE_5G;
+ if (link_speeds & ETH_LINK_SPEED_1G)
+ speed_mask |= AQ_NIC_RATE_1G;
+ if (link_speeds & ETH_LINK_SPEED_2_5G)
+ speed_mask |= AQ_NIC_RATE_2G5;
+ if (link_speeds & ETH_LINK_SPEED_100M)
+ speed_mask |= AQ_NIC_RATE_100M;
+ }
- return hw->aq_fw_ops->set_link_speed(hw,
- hw->aq_nic_cfg->link_speed_msk);
+ return hw->aq_fw_ops->set_link_speed(hw, speed_mask);
}
/*
return ret;
}
+static int
+atl_dev_configure_macsec(struct rte_eth_dev *dev)
+{
+ struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct aq_hw_cfg_s *cf = ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+ struct aq_macsec_config *aqcfg = &cf->aq_macsec;
+ struct macsec_msg_fw_request msg_macsec;
+ struct macsec_msg_fw_response response;
+
+ if (!aqcfg->common.macsec_enabled ||
+ hw->aq_fw_ops->send_macsec_req == NULL)
+ return 0;
+
+ memset(&msg_macsec, 0, sizeof(msg_macsec));
+
+ /* Creating set of sc/sa structures from parameters provided by DPDK */
+
+ /* Configure macsec */
+ msg_macsec.msg_type = macsec_cfg_msg;
+ msg_macsec.cfg.enabled = aqcfg->common.macsec_enabled;
+ msg_macsec.cfg.interrupts_enabled = 1;
+
+ hw->aq_fw_ops->send_macsec_req(hw, &msg_macsec, &response);
+
+ if (response.result)
+ return -1;
+
+ memset(&msg_macsec, 0, sizeof(msg_macsec));
+
+ /* Configure TX SC */
+
+ msg_macsec.msg_type = macsec_add_tx_sc_msg;
+ msg_macsec.txsc.index = 0; /* TXSC always one (??) */
+ msg_macsec.txsc.protect = aqcfg->common.encryption_enabled;
+
+ /* MAC addr for TX */
+ msg_macsec.txsc.mac_sa[0] = rte_bswap32(aqcfg->txsc.mac[1]);
+ msg_macsec.txsc.mac_sa[1] = rte_bswap32(aqcfg->txsc.mac[0]);
+ msg_macsec.txsc.sa_mask = 0x3f;
+
+ msg_macsec.txsc.da_mask = 0;
+ msg_macsec.txsc.tci = 0x0B;
+ msg_macsec.txsc.curr_an = 0; /* SA index which currently used */
+
+ /*
+ * Creating SCI (Secure Channel Identifier).
+ * SCI constructed from Source MAC and Port identifier
+ */
+ uint32_t sci_hi_part = (msg_macsec.txsc.mac_sa[1] << 16) |
+ (msg_macsec.txsc.mac_sa[0] >> 16);
+ uint32_t sci_low_part = (msg_macsec.txsc.mac_sa[0] << 16);
+
+ uint32_t port_identifier = 1;
+
+ msg_macsec.txsc.sci[1] = sci_hi_part;
+ msg_macsec.txsc.sci[0] = sci_low_part | port_identifier;
+
+ hw->aq_fw_ops->send_macsec_req(hw, &msg_macsec, &response);
+
+ if (response.result)
+ return -1;
+
+ memset(&msg_macsec, 0, sizeof(msg_macsec));
+
+ /* Configure RX SC */
+
+ msg_macsec.msg_type = macsec_add_rx_sc_msg;
+ msg_macsec.rxsc.index = aqcfg->rxsc.pi;
+ msg_macsec.rxsc.replay_protect =
+ aqcfg->common.replay_protection_enabled;
+ msg_macsec.rxsc.anti_replay_window = 0;
+
+ /* MAC addr for RX */
+ msg_macsec.rxsc.mac_da[0] = rte_bswap32(aqcfg->rxsc.mac[1]);
+ msg_macsec.rxsc.mac_da[1] = rte_bswap32(aqcfg->rxsc.mac[0]);
+ msg_macsec.rxsc.da_mask = 0;//0x3f;
+
+ msg_macsec.rxsc.sa_mask = 0;
+
+ hw->aq_fw_ops->send_macsec_req(hw, &msg_macsec, &response);
+
+ if (response.result)
+ return -1;
+
+ memset(&msg_macsec, 0, sizeof(msg_macsec));
+
+ /* Configure RX SC */
+
+ msg_macsec.msg_type = macsec_add_tx_sa_msg;
+ msg_macsec.txsa.index = aqcfg->txsa.idx;
+ msg_macsec.txsa.next_pn = aqcfg->txsa.pn;
+
+ msg_macsec.txsa.key[0] = rte_bswap32(aqcfg->txsa.key[3]);
+ msg_macsec.txsa.key[1] = rte_bswap32(aqcfg->txsa.key[2]);
+ msg_macsec.txsa.key[2] = rte_bswap32(aqcfg->txsa.key[1]);
+ msg_macsec.txsa.key[3] = rte_bswap32(aqcfg->txsa.key[0]);
+
+ hw->aq_fw_ops->send_macsec_req(hw, &msg_macsec, &response);
+
+ if (response.result)
+ return -1;
+
+ memset(&msg_macsec, 0, sizeof(msg_macsec));
+
+ /* Configure RX SA */
+
+ msg_macsec.msg_type = macsec_add_rx_sa_msg;
+ msg_macsec.rxsa.index = aqcfg->rxsa.idx;
+ msg_macsec.rxsa.next_pn = aqcfg->rxsa.pn;
+
+ msg_macsec.rxsa.key[0] = rte_bswap32(aqcfg->rxsa.key[3]);
+ msg_macsec.rxsa.key[1] = rte_bswap32(aqcfg->rxsa.key[2]);
+ msg_macsec.rxsa.key[2] = rte_bswap32(aqcfg->rxsa.key[1]);
+ msg_macsec.rxsa.key[3] = rte_bswap32(aqcfg->rxsa.key[0]);
+
+ hw->aq_fw_ops->send_macsec_req(hw, &msg_macsec, &response);
+
+ if (response.result)
+ return -1;
+
+ return 0;
+}
+
+int atl_macsec_enable(struct rte_eth_dev *dev,
+ uint8_t encr, uint8_t repl_prot)
+{
+ struct aq_hw_cfg_s *cfg =
+ ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+ cfg->aq_macsec.common.macsec_enabled = 1;
+ cfg->aq_macsec.common.encryption_enabled = encr;
+ cfg->aq_macsec.common.replay_protection_enabled = repl_prot;
+
+ return 0;
+}
+
+int atl_macsec_disable(struct rte_eth_dev *dev)
+{
+ struct aq_hw_cfg_s *cfg =
+ ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+ cfg->aq_macsec.common.macsec_enabled = 0;
+
+ return 0;
+}
+
+int atl_macsec_config_txsc(struct rte_eth_dev *dev, uint8_t *mac)
+{
+ struct aq_hw_cfg_s *cfg =
+ ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+ memset(&cfg->aq_macsec.txsc.mac, 0, sizeof(cfg->aq_macsec.txsc.mac));
+ memcpy((uint8_t *)&cfg->aq_macsec.txsc.mac + 2, mac, ETHER_ADDR_LEN);
+
+ return 0;
+}
+
+int atl_macsec_config_rxsc(struct rte_eth_dev *dev,
+ uint8_t *mac, uint16_t pi)
+{
+ struct aq_hw_cfg_s *cfg =
+ ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+ memset(&cfg->aq_macsec.rxsc.mac, 0, sizeof(cfg->aq_macsec.rxsc.mac));
+ memcpy((uint8_t *)&cfg->aq_macsec.rxsc.mac + 2, mac, ETHER_ADDR_LEN);
+ cfg->aq_macsec.rxsc.pi = pi;
+
+ return 0;
+}
+
+int atl_macsec_select_txsa(struct rte_eth_dev *dev,
+ uint8_t idx, uint8_t an,
+ uint32_t pn, uint8_t *key)
+{
+ struct aq_hw_cfg_s *cfg =
+ ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+ cfg->aq_macsec.txsa.idx = idx;
+ cfg->aq_macsec.txsa.pn = pn;
+ cfg->aq_macsec.txsa.an = an;
+
+ memcpy(&cfg->aq_macsec.txsa.key, key, 16);
+ return 0;
+}
+
+int atl_macsec_select_rxsa(struct rte_eth_dev *dev,
+ uint8_t idx, uint8_t an,
+ uint32_t pn, uint8_t *key)
+{
+ struct aq_hw_cfg_s *cfg =
+ ATL_DEV_PRIVATE_TO_CFG(dev->data->dev_private);
+
+ cfg->aq_macsec.rxsa.idx = idx;
+ cfg->aq_macsec.rxsa.pn = pn;
+ cfg->aq_macsec.rxsa.an = an;
+
+ memcpy(&cfg->aq_macsec.rxsa.key, key, 16);
+ return 0;
+}
static int
atl_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
return RTE_DIM(atl_xstats_tbl);
for (i = 0; i < size && i < RTE_DIM(atl_xstats_tbl); i++)
- snprintf(xstats_names[i].name, RTE_ETH_XSTATS_NAME_SIZE, "%s",
- atl_xstats_tbl[i].name);
+ strlcpy(xstats_names[i].name, atl_xstats_tbl[i].name,
+ RTE_ETH_XSTATS_NAME_SIZE);
- return size;
+ return i;
}
static int
atl_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *stats,
unsigned int n)
{
- struct atl_adapter *adapter = ATL_DEV_TO_ADAPTER(dev);
+ struct atl_adapter *adapter =
+ (struct atl_adapter *)dev->data->dev_private;
struct aq_hw_s *hw = &adapter->hw;
+ struct get_stats req = { 0 };
+ struct macsec_msg_fw_request msg = { 0 };
+ struct macsec_msg_fw_response resp = { 0 };
+ int err = -1;
unsigned int i;
if (!stats)
return 0;
+ if (hw->aq_fw_ops->send_macsec_req != NULL) {
+ req.ingress_sa_index = 0xff;
+ req.egress_sc_index = 0xff;
+ req.egress_sa_index = 0xff;
+
+ msg.msg_type = macsec_get_stats_msg;
+ msg.stats = req;
+
+ err = hw->aq_fw_ops->send_macsec_req(hw, &msg, &resp);
+ }
+
for (i = 0; i < n && i < RTE_DIM(atl_xstats_tbl); i++) {
stats[i].id = i;
- stats[i].value = *(u64 *)((uint8_t *)&hw->curr_stats +
- atl_xstats_tbl[i].offset);
- }
- return n;
+ switch (atl_xstats_tbl[i].type) {
+ case XSTATS_TYPE_MSM:
+ stats[i].value = *(u64 *)((uint8_t *)&hw->curr_stats +
+ atl_xstats_tbl[i].offset);
+ break;
+ case XSTATS_TYPE_MACSEC:
+ if (err)
+ goto done;
+ stats[i].value = *(u64 *)((uint8_t *)&resp.stats +
+ atl_xstats_tbl[i].offset);
+ break;
+ }
+ }
+done:
+ return i;
}
static int
return NULL;
}
+static void
+atl_dev_delayed_handler(void *param)
+{
+ struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
+
+ atl_dev_configure_macsec(dev);
+}
+
+
/* return 0 means link status changed, -1 means not changed */
static int
atl_dev_link_update(struct rte_eth_dev *dev, int wait __rte_unused)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- struct atl_interrupt *intr =
- ATL_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
struct rte_eth_link link, old;
+ u32 fc = AQ_NIC_FC_OFF;
int err = 0;
link.link_status = ETH_LINK_DOWN;
return 0;
}
- intr->flags &= ~ATL_FLAG_NEED_LINK_CONFIG;
-
link.link_status = ETH_LINK_UP;
link.link_duplex = ETH_LINK_FULL_DUPLEX;
link.link_speed = hw->aq_link_status.mbps;
if (link.link_status == old.link_status)
return -1;
+ /* Driver has to update flow control settings on RX block
+ * on any link event.
+ * We should query FW whether it negotiated FC.
+ */
+ if (hw->aq_fw_ops->get_flow_control) {
+ hw->aq_fw_ops->get_flow_control(hw, &fc);
+ hw_atl_b0_set_fc(hw, fc, 0U);
+ }
+
+ if (rte_eal_alarm_set(1000 * 1000,
+ atl_dev_delayed_handler, (void *)dev) < 0)
+ PMD_DRV_LOG(ERR, "rte_eal_alarm_set fail");
+
return 0;
}
hw_atl_b0_hw_irq_read(hw, &cause);
atl_disable_intr(hw);
- intr->flags = cause & BIT(ATL_IRQ_CAUSE_LINK) ?
- ATL_FLAG_NEED_LINK_UPDATE : 0;
+
+ if (cause & BIT(ATL_IRQ_CAUSE_LINK))
+ intr->flags |= ATL_FLAG_NEED_LINK_UPDATE;
return 0;
}
{
struct atl_interrupt *intr =
ATL_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
+ struct atl_adapter *adapter =
+ (struct atl_adapter *)dev->data->dev_private;
+ struct aq_hw_s *hw = &adapter->hw;
- if (intr->flags & ATL_FLAG_NEED_LINK_UPDATE) {
- atl_dev_link_update(dev, 0);
- intr->flags &= ~ATL_FLAG_NEED_LINK_UPDATE;
+ if (!(intr->flags & ATL_FLAG_NEED_LINK_UPDATE))
+ goto done;
+
+ intr->flags &= ~ATL_FLAG_NEED_LINK_UPDATE;
+
+ /* Notify userapp if link status changed */
+ if (!atl_dev_link_update(dev, 0)) {
atl_dev_link_status_print(dev);
_rte_eth_dev_callback_process(dev,
RTE_ETH_EVENT_INTR_LSC, NULL);
+ } else {
+ if (hw->aq_fw_ops->send_macsec_req == NULL)
+ goto done;
+
+ /* Check macsec Keys expired */
+ struct get_stats req = { 0 };
+ struct macsec_msg_fw_request msg = { 0 };
+ struct macsec_msg_fw_response resp = { 0 };
+
+ req.ingress_sa_index = 0x0;
+ req.egress_sc_index = 0x0;
+ req.egress_sa_index = 0x0;
+ msg.msg_type = macsec_get_stats_msg;
+ msg.stats = req;
+
+ int err = hw->aq_fw_ops->send_macsec_req(hw, &msg, &resp);
+ if (err) {
+ PMD_DRV_LOG(ERR, "send_macsec_req fail");
+ goto done;
+ }
+ if (resp.stats.egress_threshold_expired ||
+ resp.stats.ingress_threshold_expired ||
+ resp.stats.egress_expired ||
+ resp.stats.ingress_expired) {
+ PMD_DRV_LOG(INFO, "RTE_ETH_EVENT_MACSEC");
+ _rte_eth_dev_callback_process(dev,
+ RTE_ETH_EVENT_MACSEC, NULL);
+ }
}
-
+done:
atl_enable_intr(dev);
rte_intr_enable(intr_handle);
atl_dev_interrupt_action(dev, dev->intr_handle);
}
-#define SFP_EEPROM_SIZE 0xff
static int
atl_dev_get_eeprom_length(struct rte_eth_dev *dev __rte_unused)
return SFP_EEPROM_SIZE;
}
-static int
-atl_dev_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)
+int atl_dev_get_eeprom(struct rte_eth_dev *dev,
+ struct rte_dev_eeprom_info *eeprom)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint32_t dev_addr = SMBUS_DEVICE_ID;
if (hw->aq_fw_ops->get_eeprom == NULL)
return -ENOTSUP;
- if (eeprom->length != SFP_EEPROM_SIZE || eeprom->data == NULL)
+ if (eeprom->length + eeprom->offset > SFP_EEPROM_SIZE ||
+ eeprom->data == NULL)
+ return -EINVAL;
+
+ if (eeprom->magic > 0x7F)
return -EINVAL;
- return hw->aq_fw_ops->get_eeprom(hw, eeprom->data, eeprom->length);
+ if (eeprom->magic)
+ dev_addr = eeprom->magic;
+
+ return hw->aq_fw_ops->get_eeprom(hw, dev_addr, eeprom->data,
+ eeprom->length, eeprom->offset);
}
-static int
-atl_dev_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)
+int atl_dev_set_eeprom(struct rte_eth_dev *dev,
+ struct rte_dev_eeprom_info *eeprom)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint32_t dev_addr = SMBUS_DEVICE_ID;
if (hw->aq_fw_ops->set_eeprom == NULL)
return -ENOTSUP;
- if (eeprom->length != SFP_EEPROM_SIZE || eeprom->data == NULL)
+ if (eeprom->length + eeprom->offset > SFP_EEPROM_SIZE ||
+ eeprom->data == NULL)
return -EINVAL;
- return hw->aq_fw_ops->set_eeprom(hw, eeprom->data, eeprom->length);
+ if (eeprom->magic > 0x7F)
+ return -EINVAL;
+
+ if (eeprom->magic)
+ dev_addr = eeprom->magic;
+
+ return hw->aq_fw_ops->set_eeprom(hw, dev_addr, eeprom->data,
+ eeprom->length, eeprom->offset);
+}
+
+static int
+atl_dev_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs)
+{
+ struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ u32 mif_id;
+ int err;
+
+ if (regs->data == NULL) {
+ regs->length = hw_atl_utils_hw_get_reg_length();
+ regs->width = sizeof(u32);
+ return 0;
+ }
+
+ /* Only full register dump is supported */
+ if (regs->length && regs->length != hw_atl_utils_hw_get_reg_length())
+ return -ENOTSUP;
+
+ err = hw_atl_utils_hw_get_regs(hw, regs->data);
+
+ /* Device version */
+ mif_id = hw_atl_reg_glb_mif_id_get(hw);
+ regs->version = mif_id & 0xFFU;
+
+ return err;
}
static int
atl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ u32 fc = AQ_NIC_FC_OFF;
- if (hw->aq_nic_cfg->flow_control == AQ_NIC_FC_OFF)
+ if (hw->aq_fw_ops->get_flow_control == NULL)
+ return -ENOTSUP;
+
+ hw->aq_fw_ops->get_flow_control(hw, &fc);
+
+ if (fc == AQ_NIC_FC_OFF)
fc_conf->mode = RTE_FC_NONE;
- else if (hw->aq_nic_cfg->flow_control & (AQ_NIC_FC_RX | AQ_NIC_FC_TX))
+ else if (fc & (AQ_NIC_FC_RX | AQ_NIC_FC_TX))
fc_conf->mode = RTE_FC_FULL;
- else if (hw->aq_nic_cfg->flow_control & AQ_NIC_FC_RX)
+ else if (fc & AQ_NIC_FC_RX)
fc_conf->mode = RTE_FC_RX_PAUSE;
- else if (hw->aq_nic_cfg->flow_control & AQ_NIC_FC_RX)
+ else if (fc & AQ_NIC_FC_RX)
fc_conf->mode = RTE_FC_TX_PAUSE;
return 0;
}
static int
-atl_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
+atl_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
uint32_t index __rte_unused, uint32_t pool __rte_unused)
{
if (is_zero_ether_addr(mac_addr)) {
}
static int
-atl_set_default_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
+atl_set_default_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr)
{
atl_remove_mac_addr(dev, 0);
atl_add_mac_addr(dev, addr, 0, 0);
static int
atl_dev_set_mc_addr_list(struct rte_eth_dev *dev,
- struct ether_addr *mc_addr_set,
+ struct rte_ether_addr *mc_addr_set,
uint32_t nb_mc_addr)
{
struct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);
return 0;
}
+static bool
+is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
+{
+ if (strcmp(dev->device->driver->name, drv->driver.name))
+ return false;
+
+ return true;
+}
+
+bool
+is_atlantic_supported(struct rte_eth_dev *dev)
+{
+ return is_device_supported(dev, &rte_atl_pmd);
+}
+
RTE_PMD_REGISTER_PCI(net_atlantic, rte_atl_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_atlantic, pci_id_atl_map);
RTE_PMD_REGISTER_KMOD_DEP(net_atlantic, "* igb_uio | uio_pci_generic");
if (atl_logtype_driver >= 0)
rte_log_set_level(atl_logtype_driver, RTE_LOG_NOTICE);
}
-
git.droids-corp.org / dpdk.git / blobdiff