#include "bnxt_cpr.h"
#include "bnxt_util.h"
+/* Vendor ID */
+#define PCI_VENDOR_ID_BROADCOM 0x14E4
+
+/* Device IDs */
+#define BROADCOM_DEV_ID_STRATUS_NIC_VF1 0x1606
+#define BROADCOM_DEV_ID_STRATUS_NIC_VF2 0x1609
+#define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
+#define BROADCOM_DEV_ID_57414_VF 0x16c1
+#define BROADCOM_DEV_ID_57301 0x16c8
+#define BROADCOM_DEV_ID_57302 0x16c9
+#define BROADCOM_DEV_ID_57304_PF 0x16ca
+#define BROADCOM_DEV_ID_57304_VF 0x16cb
+#define BROADCOM_DEV_ID_57417_MF 0x16cc
+#define BROADCOM_DEV_ID_NS2 0x16cd
+#define BROADCOM_DEV_ID_57311 0x16ce
+#define BROADCOM_DEV_ID_57312 0x16cf
+#define BROADCOM_DEV_ID_57402 0x16d0
+#define BROADCOM_DEV_ID_57404 0x16d1
+#define BROADCOM_DEV_ID_57406_PF 0x16d2
+#define BROADCOM_DEV_ID_57406_VF 0x16d3
+#define BROADCOM_DEV_ID_57402_MF 0x16d4
+#define BROADCOM_DEV_ID_57407_RJ45 0x16d5
+#define BROADCOM_DEV_ID_57412 0x16d6
+#define BROADCOM_DEV_ID_57414 0x16d7
+#define BROADCOM_DEV_ID_57416_RJ45 0x16d8
+#define BROADCOM_DEV_ID_57417_RJ45 0x16d9
+#define BROADCOM_DEV_ID_5741X_VF 0x16dc
+#define BROADCOM_DEV_ID_57412_MF 0x16de
+#define BROADCOM_DEV_ID_57314 0x16df
+#define BROADCOM_DEV_ID_57317_RJ45 0x16e0
+#define BROADCOM_DEV_ID_5731X_VF 0x16e1
+#define BROADCOM_DEV_ID_57417_SFP 0x16e2
+#define BROADCOM_DEV_ID_57416_SFP 0x16e3
+#define BROADCOM_DEV_ID_57317_SFP 0x16e4
+#define BROADCOM_DEV_ID_57404_MF 0x16e7
+#define BROADCOM_DEV_ID_57406_MF 0x16e8
+#define BROADCOM_DEV_ID_57407_SFP 0x16e9
+#define BROADCOM_DEV_ID_57407_MF 0x16ea
+#define BROADCOM_DEV_ID_57414_MF 0x16ec
+#define BROADCOM_DEV_ID_57416_MF 0x16ee
+#define BROADCOM_DEV_ID_57508 0x1750
+#define BROADCOM_DEV_ID_57504 0x1751
+#define BROADCOM_DEV_ID_57502 0x1752
+#define BROADCOM_DEV_ID_57508_MF1 0x1800
+#define BROADCOM_DEV_ID_57504_MF1 0x1801
+#define BROADCOM_DEV_ID_57502_MF1 0x1802
+#define BROADCOM_DEV_ID_57508_MF2 0x1803
+#define BROADCOM_DEV_ID_57504_MF2 0x1804
+#define BROADCOM_DEV_ID_57502_MF2 0x1805
+#define BROADCOM_DEV_ID_57500_VF1 0x1806
+#define BROADCOM_DEV_ID_57500_VF2 0x1807
+#define BROADCOM_DEV_ID_58802 0xd802
+#define BROADCOM_DEV_ID_58804 0xd804
+#define BROADCOM_DEV_ID_58808 0x16f0
+#define BROADCOM_DEV_ID_58802_VF 0xd800
+
#define BNXT_MAX_MTU 9574
#define VLAN_TAG_SIZE 4
#define BNXT_NUM_VLANS 2
#define BNXT_MAX_PKT_LEN (BNXT_MAX_MTU + RTE_ETHER_HDR_LEN +\
RTE_ETHER_CRC_LEN +\
(BNXT_NUM_VLANS * VLAN_TAG_SIZE))
+/* FW adds extra 4 bytes for FCS */
+#define BNXT_VNIC_MRU(mtu)\
+ ((mtu) + RTE_ETHER_HDR_LEN + VLAN_TAG_SIZE * BNXT_NUM_VLANS)
#define BNXT_VF_RSV_NUM_RSS_CTX 1
#define BNXT_VF_RSV_NUM_L2_CTX 4
/* TODO: For now, do not support VMDq/RFS on VFs. */
#define BNXT_NUM_ASYNC_CPR(bp) 1
#endif
+/* In FreeBSD OS, nic_uio driver does not support interrupts */
+#ifdef RTE_EXEC_ENV_FREEBSD
+#ifdef BNXT_NUM_ASYNC_CPR
+#undef BNXT_NUM_ASYNC_CPR
+#endif
+#define BNXT_NUM_ASYNC_CPR(bp) 0
+#endif
+
+#define BNXT_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
+#define BNXT_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
+
/* Chimp Communication Channel */
#define GRCPF_REG_CHIMP_CHANNEL_OFFSET 0x0
#define GRCPF_REG_CHIMP_COMM_TRIGGER 0x100
uint8_t evb_mode;
};
-/* Max wait time is 10 * 100ms = 1s */
-#define BNXT_LINK_WAIT_CNT 10
-#define BNXT_LINK_WAIT_INTERVAL 100
+/* Max wait time for link up is 10s and link down is 500ms */
+#define BNXT_LINK_UP_WAIT_CNT 200
+#define BNXT_LINK_DOWN_WAIT_CNT 10
+#define BNXT_LINK_WAIT_INTERVAL 50
struct bnxt_link_info {
uint32_t phy_flags;
uint8_t mac_type;
uint32_t last_reset_counter;
};
+struct bnxt_mark_info {
+ uint32_t mark_id;
+ bool valid;
+};
+
/* address space location of register */
#define BNXT_FW_STATUS_REG_TYPE_MASK 3
/* register is located in PCIe config space */
#define BNXT_FLAG_STINGRAY BIT(14)
#define BNXT_FLAG_FW_RESET BIT(15)
#define BNXT_FLAG_FATAL_ERROR BIT(16)
-#define BNXT_FLAG_FW_CAP_IF_CHANGE BIT(17)
-#define BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE BIT(18)
-#define BNXT_FLAG_FW_CAP_ERROR_RECOVERY BIT(19)
-#define BNXT_FLAG_FW_HEALTH_CHECK_SCHEDULED BIT(20)
-#define BNXT_FLAG_FW_CAP_ERR_RECOVER_RELOAD BIT(21)
-#define BNXT_FLAG_EXT_STATS_SUPPORTED BIT(22)
-#define BNXT_FLAG_NEW_RM BIT(23)
-#define BNXT_FLAG_INIT_DONE BIT(24)
-#define BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS BIT(25)
-#define BNXT_FLAG_ADV_FLOW_MGMT BIT(26)
+#define BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE BIT(17)
+#define BNXT_FLAG_FW_HEALTH_CHECK_SCHEDULED BIT(18)
+#define BNXT_FLAG_EXT_STATS_SUPPORTED BIT(19)
+#define BNXT_FLAG_NEW_RM BIT(20)
+#define BNXT_FLAG_NPAR_PF BIT(21)
+#define BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS BIT(22)
+#define BNXT_FLAG_ADV_FLOW_MGMT BIT(23)
+#define BNXT_FLAG_RX_VECTOR_PKT_MODE BIT(24)
#define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
-#define BNXT_NPAR(bp) ((bp)->port_partition_type)
+#define BNXT_NPAR(bp) ((bp)->flags & BNXT_FLAG_NPAR_PF)
#define BNXT_MH(bp) ((bp)->flags & BNXT_FLAG_MULTI_HOST)
#define BNXT_SINGLE_PF(bp) (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
#define BNXT_USE_CHIMP_MB 0 //For non-CFA commands, everything uses Chimp.
#define BNXT_HAS_NQ(bp) BNXT_CHIP_THOR(bp)
#define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_THOR(bp))
+ uint32_t fw_cap;
+#define BNXT_FW_CAP_HOT_RESET BIT(0)
+#define BNXT_FW_CAP_IF_CHANGE BIT(1)
+#define BNXT_FW_CAP_ERROR_RECOVERY BIT(2)
+#define BNXT_FW_CAP_ERR_RECOVER_RELOAD BIT(3)
+
uint32_t flow_flags;
#define BNXT_FLOW_FLAG_L2_HDR_SRC_FILTER_EN BIT(0)
-
pthread_mutex_t flow_lock;
+
+ uint32_t vnic_cap_flags;
+#define BNXT_VNIC_CAP_COS_CLASSIFY BIT(0)
unsigned int rx_nr_rings;
unsigned int rx_cp_nr_rings;
unsigned int rx_num_qs_per_vnic;
/* Default completion ring */
struct bnxt_cp_ring_info *async_cp_ring;
+ struct bnxt_cp_ring_info *rxtx_nq_ring;
uint32_t max_ring_grps;
struct bnxt_ring_grp_info *grp_info;
void *hwrm_short_cmd_req_addr;
rte_iova_t hwrm_short_cmd_req_dma_addr;
rte_spinlock_t hwrm_lock;
+ pthread_mutex_t def_cp_lock;
uint16_t max_req_len;
uint16_t max_resp_len;
uint16_t hwrm_max_ext_req_len;
+ /* default command timeout value of 50ms */
+#define HWRM_CMD_TIMEOUT 50000
+ /* default HWRM request timeout value */
+ uint32_t hwrm_cmd_timeout;
+
struct bnxt_link_info link_info;
- struct bnxt_cos_queue_info cos_queue[BNXT_COS_QUEUE_COUNT];
- uint8_t tx_cosq_id;
+ struct bnxt_cos_queue_info rx_cos_queue[BNXT_COS_QUEUE_COUNT];
+ struct bnxt_cos_queue_info tx_cos_queue[BNXT_COS_QUEUE_COUNT];
+ uint8_t tx_cosq_id[BNXT_COS_QUEUE_COUNT];
+ uint8_t rx_cosq_cnt;
uint8_t max_tc;
uint8_t max_lltc;
uint8_t max_q;
uint16_t max_cp_rings;
uint16_t max_tx_rings;
uint16_t max_rx_rings;
+#define MAX_STINGRAY_RINGS 128U
+/* For sake of symmetry, max Tx rings == max Rx rings, one stat ctx for each */
+#define BNXT_MAX_RX_RINGS(bp) \
+ (BNXT_STINGRAY(bp) ? RTE_MIN(RTE_MIN(bp->max_rx_rings, \
+ MAX_STINGRAY_RINGS), \
+ bp->max_stat_ctx / 2U) : \
+ RTE_MIN(bp->max_rx_rings, \
+ bp->max_stat_ctx / 2U))
+#define BNXT_MAX_TX_RINGS(bp) \
+ (RTE_MIN((bp)->max_tx_rings, BNXT_MAX_RX_RINGS(bp)))
+
+#define BNXT_MAX_RINGS(bp) \
+ (RTE_MIN((((bp)->max_cp_rings - BNXT_NUM_ASYNC_CPR(bp)) / 2U), \
+ BNXT_MAX_TX_RINGS(bp)))
uint16_t max_nq_rings;
uint16_t max_l2_ctx;
uint16_t max_rx_em_flows;
#define BNXT_OUTER_TPID_BD_SHFT 16
uint32_t outer_tpid_bd;
struct bnxt_pf_info pf;
- uint8_t port_partition_type;
- uint8_t dev_stopped;
uint8_t vxlan_port_cnt;
uint8_t geneve_port_cnt;
uint16_t vxlan_port;
/* Struct to hold adapter error recovery related info */
struct bnxt_error_recovery_info *recovery_info;
+#define BNXT_MARK_TABLE_SZ (sizeof(struct bnxt_mark_info) * 64 * 1024)
+/* TCAM and EM should be 16-bit only. Other modes not supported. */
+#define BNXT_FLOW_ID_MASK 0x0000ffff
+ struct bnxt_mark_info *mark_table;
};
-int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
+int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);
+int bnxt_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete,
+ bool exp_link_status);
int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
int is_bnxt_in_error(struct bnxt *bp);
uint16_t bnxt_rss_ctxts(const struct bnxt *bp);
#define bnxt_release_flow_lock(bp) \
pthread_mutex_unlock(&(bp)->flow_lock)
+#define BNXT_VALID_VNIC_OR_RET(bp, vnic_id) do { \
+ if ((vnic_id) >= (bp)->max_vnics) { \
+ rte_flow_error_set(error, \
+ EINVAL, \
+ RTE_FLOW_ERROR_TYPE_ATTR_GROUP, \
+ NULL, \
+ "Group id is invalid!"); \
+ rc = -rte_errno; \
+ goto ret; \
+ } \
+} while (0)
+
extern int bnxt_logtype_driver;
#define PMD_DRV_LOG_RAW(level, fmt, args...) \
rte_log(RTE_LOG_ ## level, bnxt_logtype_driver, "%s(): " fmt, \
__func__, ## args)
#define PMD_DRV_LOG(level, fmt, args...) \
- PMD_DRV_LOG_RAW(level, fmt, ## args)
+ PMD_DRV_LOG_RAW(level, fmt, ## args)
#endif
git.droids-corp.org / dpdk.git / blobdiff