#include <stdbool.h>
#include <sys/queue.h>
+#include <rte_pci.h>
+#include <rte_bus_pci.h>
#include <rte_ethdev.h>
#include <rte_memory.h>
#include <rte_lcore.h>
#include <rte_spinlock.h>
+#include <rte_time.h>
#include "bnxt_cpr.h"
uint16_t vid;
} __attribute__((packed));
+struct bnxt_vlan_antispoof_table_entry {
+ uint16_t tpid;
+ uint16_t vid;
+ uint16_t mask;
+} __attribute__((packed));
+
struct bnxt_child_vf_info {
void *req_buf;
struct bnxt_vlan_table_entry *vlan_table;
+ struct bnxt_vlan_antispoof_table_entry *vlan_as_table;
STAILQ_HEAD(, bnxt_filter_info) filter;
uint32_t func_cfg_flags;
uint32_t l2_rx_mask;
uint16_t fid;
- uint16_t dflt_vlan;
uint16_t max_tx_rate;
+ uint16_t dflt_vlan;
uint16_t vlan_count;
uint8_t mac_spoof_en;
uint8_t vlan_spoof_en;
bool random_mac;
+ bool persist_stats;
};
struct bnxt_pf_info {
#define BNXT_FIRST_VF_FID 128
#define BNXT_PF_RINGS_USED(bp) bnxt_get_num_queues(bp)
#define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
- uint8_t port_id;
+ uint16_t port_id;
uint16_t first_vf_id;
uint16_t active_vfs;
uint16_t max_vfs;
uint32_t func_cfg_flags;
void *vf_req_buf;
- phys_addr_t vf_req_buf_dma_addr;
+ rte_iova_t vf_req_buf_dma_addr;
uint32_t vf_req_fwd[8];
uint16_t total_vnics;
struct bnxt_child_vf_info *vf_info;
uint16_t auto_link_speed;
uint16_t auto_link_speed_mask;
uint32_t preemphasis;
+ uint8_t phy_type;
+ uint8_t media_type;
};
#define BNXT_COS_QUEUE_COUNT 8
uint8_t profile;
};
+struct rte_flow {
+ STAILQ_ENTRY(rte_flow) next;
+ struct bnxt_filter_info *filter;
+ struct bnxt_vnic_info *vnic;
+};
+
+struct bnxt_ptp_cfg {
+#define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400
+#define BNXT_GRCPF_REG_SYNC_TIME 0x480
+#define BNXT_CYCLECOUNTER_MASK 0xffffffffffffffffULL
+ struct rte_timecounter tc;
+ struct rte_timecounter tx_tstamp_tc;
+ struct rte_timecounter rx_tstamp_tc;
+ struct bnxt *bp;
+#define BNXT_MAX_TX_TS 1
+ uint16_t rxctl;
+#define BNXT_PTP_MSG_SYNC (1 << 0)
+#define BNXT_PTP_MSG_DELAY_REQ (1 << 1)
+#define BNXT_PTP_MSG_PDELAY_REQ (1 << 2)
+#define BNXT_PTP_MSG_PDELAY_RESP (1 << 3)
+#define BNXT_PTP_MSG_FOLLOW_UP (1 << 8)
+#define BNXT_PTP_MSG_DELAY_RESP (1 << 9)
+#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP (1 << 10)
+#define BNXT_PTP_MSG_ANNOUNCE (1 << 11)
+#define BNXT_PTP_MSG_SIGNALING (1 << 12)
+#define BNXT_PTP_MSG_MANAGEMENT (1 << 13)
+#define BNXT_PTP_MSG_EVENTS (BNXT_PTP_MSG_SYNC | \
+ BNXT_PTP_MSG_DELAY_REQ | \
+ BNXT_PTP_MSG_PDELAY_REQ | \
+ BNXT_PTP_MSG_PDELAY_RESP)
+ uint8_t tx_tstamp_en:1;
+ int rx_filter;
+
+#define BNXT_PTP_RX_TS_L 0
+#define BNXT_PTP_RX_TS_H 1
+#define BNXT_PTP_RX_SEQ 2
+#define BNXT_PTP_RX_FIFO 3
+#define BNXT_PTP_RX_FIFO_PENDING 0x1
+#define BNXT_PTP_RX_FIFO_ADV 4
+#define BNXT_PTP_RX_REGS 5
+
+#define BNXT_PTP_TX_TS_L 0
+#define BNXT_PTP_TX_TS_H 1
+#define BNXT_PTP_TX_SEQ 2
+#define BNXT_PTP_TX_FIFO 3
+#define BNXT_PTP_TX_FIFO_EMPTY 0x2
+#define BNXT_PTP_TX_REGS 4
+ uint32_t rx_regs[BNXT_PTP_RX_REGS];
+ uint32_t rx_mapped_regs[BNXT_PTP_RX_REGS];
+ uint32_t tx_regs[BNXT_PTP_TX_REGS];
+ uint32_t tx_mapped_regs[BNXT_PTP_TX_REGS];
+};
+
+#define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
struct bnxt {
void *bar0;
struct rte_eth_dev *eth_dev;
+ struct rte_eth_rss_conf rss_conf;
struct rte_pci_device *pdev;
uint32_t flags;
#define BNXT_FLAG_VF (1 << 1)
#define BNXT_FLAG_PORT_STATS (1 << 2)
#define BNXT_FLAG_JUMBO (1 << 3)
+#define BNXT_FLAG_SHORT_CMD (1 << 4)
+#define BNXT_FLAG_UPDATE_HASH (1 << 5)
+#define BNXT_FLAG_PTP_SUPPORTED (1 << 6)
#define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF))
#define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF)
#define BNXT_NPAR_ENABLED(bp) ((bp)->port_partition_type)
struct bnxt_rx_queue **rx_queues;
const void *rx_mem_zone;
struct rx_port_stats *hw_rx_port_stats;
- phys_addr_t hw_rx_port_stats_map;
+ rte_iova_t hw_rx_port_stats_map;
unsigned int tx_nr_rings;
unsigned int tx_cp_nr_rings;
struct bnxt_tx_queue **tx_queues;
const void *tx_mem_zone;
struct tx_port_stats *hw_tx_port_stats;
- phys_addr_t hw_tx_port_stats_map;
+ rte_iova_t hw_tx_port_stats_map;
/* Default completion ring */
struct bnxt_cp_ring_info *def_cp_ring;
STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
/* VNIC pointer for flow filter (VMDq) pools */
-#define MAX_FF_POOLS ETH_64_POOLS
+#define MAX_FF_POOLS 256
STAILQ_HEAD(, bnxt_vnic_info) ff_pool[MAX_FF_POOLS];
struct bnxt_irq *irq_tbl;
uint16_t hwrm_cmd_seq;
void *hwrm_cmd_resp_addr;
- phys_addr_t hwrm_cmd_resp_dma_addr;
+ rte_iova_t hwrm_cmd_resp_dma_addr;
+ void *hwrm_short_cmd_req_addr;
+ rte_iova_t hwrm_short_cmd_req_dma_addr;
rte_spinlock_t hwrm_lock;
uint16_t max_req_len;
uint16_t max_resp_len;
struct bnxt_led_info leds[BNXT_MAX_LED];
uint8_t num_leds;
-};
-
-/*
- * Response sent back to the caller after callback
- */
-enum rte_pmd_bnxt_mb_event_rsp {
- RTE_PMD_BNXT_MB_EVENT_NOOP_ACK, /**< skip mbox request and ACK */
- RTE_PMD_BNXT_MB_EVENT_NOOP_NACK, /**< skip mbox request and NACK */
- RTE_PMD_BNXT_MB_EVENT_PROCEED, /**< proceed with mbox request */
- RTE_PMD_BNXT_MB_EVENT_MAX /**< max value of this enum */
-};
-
-/* mailbox message types */
-#define BNXT_VF_RESET 0x01 /* VF requests reset */
-#define BNXT_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */
-#define BNXT_VF_SET_VLAN 0x03 /* VF requests PF to set VLAN */
-#define BNXT_VF_SET_MTU 0x04 /* VF requests PF to set MTU */
-#define BNXT_VF_SET_MRU 0x05 /* VF requests PF to set MRU */
-
-/*
- * Data sent to the caller when the callback is executed.
- */
-struct rte_pmd_bnxt_mb_event_param {
- uint16_t vf_id; /* Virtual Function number */
- int retval; /* return value */
- void *msg; /* pointer to message */
+ struct bnxt_ptp_cfg *ptp_cfg;
};
int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
#define RX_PROD_AGG_BD_TYPE_RX_PROD_AGG 0x6
bool is_bnxt_supported(struct rte_eth_dev *dev);
+extern const struct rte_flow_ops bnxt_flow_ops;
#endif
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