drivers/net: fix vfio kmod dependency
[dpdk.git] / drivers / net / i40e / i40e_ethdev.c
index 7ba8c70..c18a93b 100644 (file)
@@ -291,10 +291,10 @@ static int i40e_flow_ctrl_set(struct rte_eth_dev *dev,
                              struct rte_eth_fc_conf *fc_conf);
 static int i40e_priority_flow_ctrl_set(struct rte_eth_dev *dev,
                                       struct rte_eth_pfc_conf *pfc_conf);
-static void i40e_macaddr_add(struct rte_eth_dev *dev,
-                         struct ether_addr *mac_addr,
-                         uint32_t index,
-                         uint32_t pool);
+static int i40e_macaddr_add(struct rte_eth_dev *dev,
+                           struct ether_addr *mac_addr,
+                           uint32_t index,
+                           uint32_t pool);
 static void i40e_macaddr_remove(struct rte_eth_dev *dev, uint32_t index);
 static int i40e_dev_rss_reta_update(struct rte_eth_dev *dev,
                                    struct rte_eth_rss_reta_entry64 *reta_conf,
@@ -415,6 +415,7 @@ static int i40e_cloud_filter_qinq_create(struct i40e_pf *pf);
 static void i40e_ethertype_filter_restore(struct i40e_pf *pf);
 static void i40e_tunnel_filter_restore(struct i40e_pf *pf);
 static void i40e_filter_restore(struct i40e_pf *pf);
+static void i40e_notify_all_vfs_link_status(struct rte_eth_dev *dev);
 
 int i40e_logtype_init;
 int i40e_logtype_driver;
@@ -678,7 +679,7 @@ rte_i40e_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 
 RTE_PMD_REGISTER_PCI(net_i40e, rte_i40e_pmd);
 RTE_PMD_REGISTER_PCI_TABLE(net_i40e, pci_id_i40e_map);
-RTE_PMD_REGISTER_KMOD_DEP(net_i40e, "* igb_uio | uio_pci_generic | vfio");
+RTE_PMD_REGISTER_KMOD_DEP(net_i40e, "* igb_uio | uio_pci_generic | vfio-pci");
 
 #ifndef I40E_GLQF_ORT
 #define I40E_GLQF_ORT(_i)    (0x00268900 + ((_i) * 4))
@@ -1059,6 +1060,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
                i40e_set_tx_function(dev);
                return 0;
        }
+       i40e_set_default_ptype_table(dev);
        pci_dev = I40E_DEV_TO_PCI(dev);
        intr_handle = &pci_dev->intr_handle;
 
@@ -2301,6 +2303,8 @@ out:
        if (link.link_status == old.link_status)
                return -1;
 
+       i40e_notify_all_vfs_link_status(dev);
+
        return 0;
 }
 
@@ -3263,7 +3267,7 @@ i40e_priority_flow_ctrl_set(__rte_unused struct rte_eth_dev *dev,
 }
 
 /* Add a MAC address, and update filters */
-static void
+static int
 i40e_macaddr_add(struct rte_eth_dev *dev,
                 struct ether_addr *mac_addr,
                 __rte_unused uint32_t index,
@@ -3280,13 +3284,13 @@ i40e_macaddr_add(struct rte_eth_dev *dev,
                PMD_DRV_LOG(ERR, "VMDQ not %s, can't set mac to pool %u",
                        pf->flags & I40E_FLAG_VMDQ ? "configured" : "enabled",
                        pool);
-               return;
+               return -ENOTSUP;
        }
 
        if (pool > pf->nb_cfg_vmdq_vsi) {
                PMD_DRV_LOG(ERR, "Pool number %u invalid. Max pool is %u",
                                pool, pf->nb_cfg_vmdq_vsi);
-               return;
+               return -EINVAL;
        }
 
        (void)rte_memcpy(&mac_filter.mac_addr, mac_addr, ETHER_ADDR_LEN);
@@ -3303,8 +3307,9 @@ i40e_macaddr_add(struct rte_eth_dev *dev,
        ret = i40e_vsi_add_mac(vsi, &mac_filter);
        if (ret != I40E_SUCCESS) {
                PMD_DRV_LOG(ERR, "Failed to add MACVLAN filter");
-               return;
+               return -ENODEV;
        }
+       return 0;
 }
 
 /* Remove a MAC address, and update filters */
@@ -4503,8 +4508,8 @@ i40e_update_default_filter_setting(struct i40e_vsi *vsi)
                struct i40e_mac_filter *f;
                struct ether_addr *mac;
 
-               PMD_DRV_LOG(WARNING,
-                       "Cannot remove the default macvlan filter");
+               PMD_DRV_LOG(DEBUG,
+                           "Cannot remove the default macvlan filter");
                /* It needs to add the permanent mac into mac list */
                f = rte_zmalloc("macv_filter", sizeof(*f), 0);
                if (f == NULL) {
@@ -5773,14 +5778,12 @@ i40e_dev_handle_aq_msg(struct rte_eth_dev *dev)
                        break;
                case i40e_aqc_opc_get_link_status:
                        ret = i40e_dev_link_update(dev, 0);
-                       if (!ret) {
-                               i40e_notify_all_vfs_link_status(dev);
+                       if (!ret)
                                _rte_eth_dev_callback_process(dev,
                                        RTE_ETH_EVENT_INTR_LSC, NULL);
-                       }
                        break;
                default:
-                       PMD_DRV_LOG(ERR, "Request %u is not supported yet",
+                       PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
                                    opcode);
                        break;
                }
@@ -7146,8 +7149,8 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf,
                if (!pf->qinq_replace_flag) {
                        ret = i40e_cloud_filter_qinq_create(pf);
                        if (ret < 0)
-                               PMD_DRV_LOG(ERR,
-                                       "Failed to create a qinq tunnel filter.");
+                               PMD_DRV_LOG(DEBUG,
+                                           "QinQ tunnel filter already created.");
                        pf->qinq_replace_flag = 1;
                }
                /*      Add in the General fields the values of
@@ -8989,7 +8992,7 @@ i40e_enable_extended_tag(struct rte_eth_dev *dev)
        uint32_t buf = 0;
        int ret;
 
-       ret = rte_eal_pci_read_config(pci_dev, &buf, sizeof(buf),
+       ret = rte_pci_read_config(pci_dev, &buf, sizeof(buf),
                                      PCI_DEV_CAP_REG);
        if (ret < 0) {
                PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x",
@@ -9002,7 +9005,7 @@ i40e_enable_extended_tag(struct rte_eth_dev *dev)
        }
 
        buf = 0;
-       ret = rte_eal_pci_read_config(pci_dev, &buf, sizeof(buf),
+       ret = rte_pci_read_config(pci_dev, &buf, sizeof(buf),
                                      PCI_DEV_CTRL_REG);
        if (ret < 0) {
                PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x",
@@ -9014,7 +9017,7 @@ i40e_enable_extended_tag(struct rte_eth_dev *dev)
                return;
        }
        buf |= PCI_DEV_CTRL_EXT_TAG_MASK;
-       ret = rte_eal_pci_write_config(pci_dev, &buf, sizeof(buf),
+       ret = rte_pci_write_config(pci_dev, &buf, sizeof(buf),
                                       PCI_DEV_CTRL_REG);
        if (ret < 0) {
                PMD_DRV_LOG(ERR, "Failed to write PCI offset 0x%x",
@@ -10590,8 +10593,7 @@ i40e_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 {
        struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
        struct rte_eth_dev_data *dev_data = pf->dev_data;
-       uint32_t frame_size = mtu + ETHER_HDR_LEN
-                             + ETHER_CRC_LEN + I40E_VLAN_TAG_SIZE;
+       uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
        int ret = 0;
 
        /* check if mtu is within the allowed range */