remove extra parentheses in return statement

[dpdk.git] / drivers / net / i40e / i40e_ethdev.h

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index e0e9e67..6edd7dd 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -35,6 +35,7 @@
 #define _I40E_ETHDEV_H_
 
 #include <rte_eth_ctrl.h>
+#include <rte_time.h>
 
 #define I40E_VLAN_TAG_SIZE        4
 
@@ -107,6 +108,7 @@ enum i40e_flxpld_layer_idx {
 #define I40E_FDIR_BITMASK_NUM_WORD  2  /* max number of bitmask words */
 #define I40E_FDIR_MAX_FLEXWORD_NUM  8  /* max number of flexpayload words */
 #define I40E_FDIR_MAX_FLEX_LEN      16 /* len in bytes of flex payload */
+#define I40E_INSET_MASK_NUM_REG     2  /* number of input set mask registers */
 
 /* i40e flags */
 #define I40E_FLAG_RSS                   (1ULL << 0)
@@ -158,6 +160,14 @@ enum i40e_flxpld_layer_idx {
        (1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
        (1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))
 
+#define I40E_MISC_VEC_ID                RTE_INTR_VEC_ZERO_OFFSET
+#define I40E_RX_VEC_START               RTE_INTR_VEC_RXTX_OFFSET
+
+/* Default queue interrupt throttling time in microseconds */
+#define I40E_ITR_INDEX_DEFAULT          0
+#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
+#define I40E_QUEUE_ITR_INTERVAL_MAX     8160 /* 8160 us */
+
 struct i40e_adapter;
 
 /**
@@ -209,14 +219,14 @@ struct i40e_macvlan_filter {
 /* Bandwidth limit information */
 struct i40e_bw_info {
        uint16_t bw_limit;      /* BW Limit (0 = disabled) */
-       uint8_t  bw_max_quanta; /* Max Quanta when BW limit is enabled */
+       uint8_t  bw_max;        /* Max BW limit if enabled */
 
-       /* Relative TC credits across VSIs */
+       /* Relative VSI credits within same TC with respect to other VSIs */
        uint8_t  bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
-       /* TC BW limit credits within VSI */
-       uint8_t  bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
-       /* TC BW limit max quanta within VSI */
-       uint8_t  bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
+       /* Bandwidth limit per TC */
+       uint8_t  bw_ets_credits[I40E_MAX_TRAFFIC_CLASS];
+       /* Max bandwidth limit per TC */
+       uint8_t  bw_ets_max[I40E_MAX_TRAFFIC_CLASS];
 };
 
 /*
@@ -255,6 +265,7 @@ struct i40e_vsi {
        uint16_t seid;           /* The seid of VSI itself */
        uint16_t uplink_seid;    /* The uplink seid of this VSI */
        uint16_t nb_qps;         /* Number of queue pairs VSI can occupy */
+       uint16_t nb_used_qps;    /* Number of queue pairs VSI uses */
        uint16_t max_macaddrs;   /* Maximum number of MAC addresses */
        uint16_t base_queue;     /* The first queue index of this VSI */
        /*
@@ -263,6 +274,7 @@ struct i40e_vsi {
         */
        uint16_t vsi_id;
        uint16_t msix_intr; /* The MSIX interrupt binds to VSI */
+       uint16_t nb_msix;   /* The max number of msix vector */
        uint8_t enabled_tc; /* The traffic class enabled */
        struct i40e_bw_info bw_info; /* VSI bandwidth information */
 };
@@ -402,10 +414,18 @@ struct i40e_pf {
        uint16_t vf_num;
        /* Each of below queue pairs should be power of 2 since it's the
           precondition after TC configuration applied */
+       uint16_t lan_nb_qp_max;
        uint16_t lan_nb_qps; /* The number of queue pairs of LAN */
+       uint16_t lan_qp_offset;
+       uint16_t vmdq_nb_qp_max;
        uint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */
+       uint16_t vmdq_qp_offset;
+       uint16_t vf_nb_qp_max;
        uint16_t vf_nb_qps; /* The number of queue pairs of VF */
+       uint16_t vf_qp_offset;
        uint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */
+       uint16_t fdir_qp_offset;
+
        uint16_t hash_lut_size; /* The size of hash lookup table */
        /* store VXLAN UDP ports */
        uint16_t vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
@@ -480,6 +500,7 @@ struct i40e_vf {
        struct i40e_virtchnl_vf_resource *vf_res; /* All VSIs */
        struct i40e_virtchnl_vsi_resource *vsi_res; /* LAN VSI */
        struct i40e_vsi vsi;
+       uint64_t flags;
 };
 
 /*
@@ -496,11 +517,16 @@ struct i40e_adapter {
                struct i40e_vf vf;
        };
 
-       /* for vector PMD */
+       /* For vector PMD */
        bool rx_bulk_alloc_allowed;
        bool rx_vec_allowed;
        bool tx_simple_allowed;
        bool tx_vec_allowed;
+
+       /* For PTP */
+       struct rte_timecounter systime_tc;
+       struct rte_timecounter rx_tstamp_tc;
+       struct rte_timecounter tx_tstamp_tc;
 };
 
 int i40e_dev_switch_queues(struct i40e_pf *pf, bool on);
@@ -540,6 +566,12 @@ uint16_t i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype);
 int i40e_fdir_ctrl_func(struct rte_eth_dev *dev,
                          enum rte_filter_op filter_op,
                          void *arg);
+int i40e_select_filter_input_set(struct i40e_hw *hw,
+                                struct rte_eth_input_set_conf *conf,
+                                enum rte_filter_type filter);
+int i40e_filter_inset_select(struct i40e_hw *hw,
+                            struct rte_eth_input_set_conf *conf,
+                            enum rte_filter_type filter);
 
 void i40e_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
        struct rte_eth_rxq_info *qinfo);
@@ -583,6 +615,8 @@ i40e_get_vsi_from_adapter(struct i40e_adapter *adapter)
        (&(((struct i40e_vsi *)vsi)->adapter->hw))
 #define I40E_VSI_TO_PF(vsi) \
        (&(((struct i40e_vsi *)vsi)->adapter->pf))
+#define I40E_VSI_TO_VF(vsi) \
+       (&(((struct i40e_vsi *)vsi)->adapter->vf))
 #define I40E_VSI_TO_DEV_DATA(vsi) \
        (((struct i40e_vsi *)vsi)->adapter->pf.dev_data)
 #define I40E_VSI_TO_ETH_DEV(vsi) \
@@ -615,6 +649,16 @@ i40e_align_floor(int n)
        return 1 << (sizeof(n) * CHAR_BIT - 1 - __builtin_clz(n));
 }
 
+static inline uint16_t
+i40e_calc_itr_interval(int16_t interval)
+{
+       if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
+               interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
+
+       /* Convert to hardware count, as writing each 1 represents 2 us */
+       return interval / 2;
+}
+
 #define I40E_VALID_FLOW(flow_type) \
        ((flow_type) == RTE_ETH_FLOW_FRAG_IPV4 || \
        (flow_type) == RTE_ETH_FLOW_NONFRAG_IPV4_TCP || \