#include <stdarg.h>
#include <rte_ether.h>
-#include <rte_ethdev.h>
+#include <rte_ethdev_driver.h>
#include <rte_log.h>
#include <rte_memzone.h>
#include <rte_malloc.h>
#define I40E_COUNTER_INDEX_FDIR(pf_id) (0 + (pf_id) * I40E_COUNTER_PF)
#define I40E_FDIR_FLOWS ( \
- (1 << RTE_ETH_FLOW_FRAG_IPV4) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV4_UDP) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV4_TCP) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV4_SCTP) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV4_OTHER) | \
- (1 << RTE_ETH_FLOW_FRAG_IPV6) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV6_UDP) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV6_TCP) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV6_SCTP) | \
- (1 << RTE_ETH_FLOW_NONFRAG_IPV6_OTHER) | \
- (1 << RTE_ETH_FLOW_L2_PAYLOAD))
+ (1ULL << RTE_ETH_FLOW_FRAG_IPV4) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV4_UDP) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV4_TCP) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV4_SCTP) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV4_OTHER) | \
+ (1ULL << RTE_ETH_FLOW_FRAG_IPV6) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV6_UDP) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV6_TCP) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV6_SCTP) | \
+ (1ULL << RTE_ETH_FLOW_NONFRAG_IPV6_OTHER) | \
+ (1ULL << RTE_ETH_FLOW_L2_PAYLOAD))
static int i40e_fdir_filter_programming(struct i40e_pf *pf,
enum i40e_filter_pctype pctype,
#endif
rx_ctx.dtype = i40e_header_split_none;
rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
- rx_ctx.rxmax = ETHER_MAX_LEN;
+ rx_ctx.rxmax = RTE_ETHER_MAX_LEN;
rx_ctx.tphrdesc_ena = 1;
rx_ctx.tphwdesc_ena = 1;
rx_ctx.tphdata_ena = 1;
rte_wmb();
/* Init the RX tail regieter. */
- I40E_PCI_REG_WRITE(rxq->qrx_tail, 0);
I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
return err;
flx_ort = (1 << I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) |
(num << I40E_GLQF_ORT_FIELD_CNT_SHIFT) |
(layer_idx * I40E_MAX_FLXPLD_FIED);
- I40E_WRITE_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
+ I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
}
for (i = 0; i < num; i++) {
PMD_DRV_LOG(ERR, " invalid configuration arguments.");
return -EINVAL;
}
- /* configure flex payload */
- for (i = 0; i < conf->nb_payloads; i++)
- i40e_set_flx_pld_cfg(pf, &conf->flex_set[i]);
- /* configure flex mask*/
- for (i = 0; i < conf->nb_flexmasks; i++) {
- if (hw->mac.type == I40E_MAC_X722) {
- /* get translated pctype value in fd pctype register */
- pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(
- hw, I40E_GLQF_FD_PCTYPES(
- (int)i40e_flowtype_to_pctype(pf->adapter,
- conf->flex_mask[i].flow_type)));
- } else
- pctype = i40e_flowtype_to_pctype(pf->adapter,
- conf->flex_mask[i].flow_type);
- i40e_set_flex_mask_on_pctype(pf, pctype, &conf->flex_mask[i]);
+ if (!pf->support_multi_driver) {
+ /* configure flex payload */
+ for (i = 0; i < conf->nb_payloads; i++)
+ i40e_set_flx_pld_cfg(pf, &conf->flex_set[i]);
+ /* configure flex mask*/
+ for (i = 0; i < conf->nb_flexmasks; i++) {
+ if (hw->mac.type == I40E_MAC_X722) {
+ /* get pctype value in fd pctype register */
+ pctype = (enum i40e_filter_pctype)
+ i40e_read_rx_ctl(hw,
+ I40E_GLQF_FD_PCTYPES(
+ (int)i40e_flowtype_to_pctype(
+ pf->adapter,
+ conf->flex_mask[i].flow_type)));
+ } else {
+ pctype = i40e_flowtype_to_pctype(pf->adapter,
+ conf->flex_mask[i].flow_type);
+ }
+
+ i40e_set_flex_mask_on_pctype(pf, pctype,
+ &conf->flex_mask[i]);
+ }
+ } else {
+ PMD_DRV_LOG(ERR, "Not support flexible payload.");
}
return ret;
{
static uint8_t vlan_frame[] = {0x81, 0, 0, 0};
uint16_t *ether_type;
- uint8_t len = 2 * sizeof(struct ether_addr);
- struct ipv4_hdr *ip;
- struct ipv6_hdr *ip6;
+ uint8_t len = 2 * sizeof(struct rte_ether_addr);
+ struct rte_ipv4_hdr *ip;
+ struct rte_ipv6_hdr *ip6;
static const uint8_t next_proto[] = {
[RTE_ETH_FLOW_FRAG_IPV4] = IPPROTO_IP,
[RTE_ETH_FLOW_NONFRAG_IPV4_TCP] = IPPROTO_TCP,
[RTE_ETH_FLOW_NONFRAG_IPV6_OTHER] = IPPROTO_NONE,
};
- raw_pkt += 2 * sizeof(struct ether_addr);
+ raw_pkt += 2 * sizeof(struct rte_ether_addr);
if (vlan && fdir_input->flow_ext.vlan_tci) {
rte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame));
rte_memcpy(raw_pkt + sizeof(uint16_t),
case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
case RTE_ETH_FLOW_FRAG_IPV4:
- ip = (struct ipv4_hdr *)raw_pkt;
+ ip = (struct rte_ipv4_hdr *)raw_pkt;
- *ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv4);
+ *ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPv4);
ip->version_ihl = I40E_FDIR_IP_DEFAULT_VERSION_IHL;
/* set len to by default */
ip->total_length = rte_cpu_to_be_16(I40E_FDIR_IP_DEFAULT_LEN);
*/
ip->src_addr = fdir_input->flow.ip4_flow.dst_ip;
ip->dst_addr = fdir_input->flow.ip4_flow.src_ip;
- len += sizeof(struct ipv4_hdr);
+ len += sizeof(struct rte_ipv4_hdr);
break;
case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
case RTE_ETH_FLOW_FRAG_IPV6:
- ip6 = (struct ipv6_hdr *)raw_pkt;
+ ip6 = (struct rte_ipv6_hdr *)raw_pkt;
- *ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv6);
+ *ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPv6);
ip6->vtc_flow =
rte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW |
(fdir_input->flow.ipv6_flow.tc <<
rte_memcpy(&(ip6->dst_addr),
&(fdir_input->flow.ipv6_flow.src_ip),
IPV6_ADDR_LEN);
- len += sizeof(struct ipv6_hdr);
+ len += sizeof(struct rte_ipv6_hdr);
break;
default:
PMD_DRV_LOG(ERR, "unknown flow type %u.",
unsigned char *payload, *ptr;
struct udp_hdr *udp;
struct tcp_hdr *tcp;
- struct sctp_hdr *sctp;
+ struct rte_sctp_hdr *sctp;
uint8_t size, dst = 0;
uint8_t i, pit_idx, set_idx = I40E_FLXPLD_L4_IDX; /* use l4 by default*/
int len;
break;
case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
- sctp = (struct sctp_hdr *)(raw_pkt + len);
- payload = (unsigned char *)sctp + sizeof(struct sctp_hdr);
+ sctp = (struct rte_sctp_hdr *)(raw_pkt + len);
+ payload = (unsigned char *)sctp + sizeof(struct rte_sctp_hdr);
/*
* The source and destination fields in the transmitted packet
* need to be presented in a reversed order with respect
break;
case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
- sctp = (struct sctp_hdr *)(raw_pkt + len);
- payload = (unsigned char *)sctp + sizeof(struct sctp_hdr);
+ sctp = (struct rte_sctp_hdr *)(raw_pkt + len);
+ payload = (unsigned char *)sctp + sizeof(struct rte_sctp_hdr);
/*
* The source and destination fields in the transmitted packet
* need to be presented in a reversed order with respect
* starts after the whole ARP header
*/
if (fdir_input->flow.l2_flow.ether_type ==
- rte_cpu_to_be_16(ETHER_TYPE_ARP))
- payload += sizeof(struct arp_hdr);
+ rte_cpu_to_be_16(RTE_ETHER_TYPE_ARP))
+ payload += sizeof(struct rte_arp_hdr);
set_idx = I40E_FLXPLD_L2_IDX;
break;
default:
struct i40e_customized_pctype *cus_pctype = NULL;
static uint8_t vlan_frame[] = {0x81, 0, 0, 0};
uint16_t *ether_type;
- uint8_t len = 2 * sizeof(struct ether_addr);
- struct ipv4_hdr *ip;
- struct ipv6_hdr *ip6;
+ uint8_t len = 2 * sizeof(struct rte_ether_addr);
+ struct rte_ipv4_hdr *ip;
+ struct rte_ipv6_hdr *ip6;
uint8_t pctype = fdir_input->pctype;
bool is_customized_pctype = fdir_input->flow_ext.customized_pctype;
static const uint8_t next_proto[] = {
[I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] = IPPROTO_NONE,
};
- raw_pkt += 2 * sizeof(struct ether_addr);
+ raw_pkt += 2 * sizeof(struct rte_ether_addr);
if (vlan && fdir_input->flow_ext.vlan_tci) {
rte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame));
rte_memcpy(raw_pkt + sizeof(uint16_t),
pctype == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER ||
pctype == I40E_FILTER_PCTYPE_FRAG_IPV4 ||
is_customized_pctype) {
- ip = (struct ipv4_hdr *)raw_pkt;
+ ip = (struct rte_ipv4_hdr *)raw_pkt;
- *ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv4);
+ *ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPv4);
ip->version_ihl = I40E_FDIR_IP_DEFAULT_VERSION_IHL;
/* set len to by default */
ip->total_length = rte_cpu_to_be_16(I40E_FDIR_IP_DEFAULT_LEN);
cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV6 ||
cus_pctype->index == I40E_CUSTOMIZED_GTPU)
ip->next_proto_id = IPPROTO_UDP;
- len += sizeof(struct ipv4_hdr);
+ len += sizeof(struct rte_ipv4_hdr);
} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_TCP ||
pctype == I40E_FILTER_PCTYPE_NONF_IPV6_UDP ||
pctype == I40E_FILTER_PCTYPE_NONF_IPV6_SCTP ||
pctype == I40E_FILTER_PCTYPE_NONF_IPV6_OTHER ||
pctype == I40E_FILTER_PCTYPE_FRAG_IPV6) {
- ip6 = (struct ipv6_hdr *)raw_pkt;
+ ip6 = (struct rte_ipv6_hdr *)raw_pkt;
- *ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv6);
+ *ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPv6);
ip6->vtc_flow =
rte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW |
(fdir_input->flow.ipv6_flow.tc <<
rte_memcpy(&ip6->dst_addr,
&fdir_input->flow.ipv6_flow.src_ip,
IPV6_ADDR_LEN);
- len += sizeof(struct ipv6_hdr);
+ len += sizeof(struct rte_ipv6_hdr);
} else {
PMD_DRV_LOG(ERR, "unknown pctype %u.",
fdir_input->pctype);
unsigned char *ptr;
struct udp_hdr *udp;
struct tcp_hdr *tcp;
- struct sctp_hdr *sctp;
+ struct rte_sctp_hdr *sctp;
struct rte_flow_item_gtp *gtp;
- struct ipv4_hdr *gtp_ipv4;
- struct ipv6_hdr *gtp_ipv6;
+ struct rte_ipv4_hdr *gtp_ipv4;
+ struct rte_ipv6_hdr *gtp_ipv6;
uint8_t size, dst = 0;
uint8_t i, pit_idx, set_idx = I40E_FLXPLD_L4_IDX; /* use l4 by default*/
int len;
tcp->dst_port = fdir_input->flow.tcp4_flow.src_port;
tcp->data_off = I40E_FDIR_TCP_DEFAULT_DATAOFF;
} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) {
- sctp = (struct sctp_hdr *)(raw_pkt + len);
- payload = (unsigned char *)sctp + sizeof(struct sctp_hdr);
+ sctp = (struct rte_sctp_hdr *)(raw_pkt + len);
+ payload = (unsigned char *)sctp + sizeof(struct rte_sctp_hdr);
/**
* The source and destination fields in the transmitted packet
* need to be presented in a reversed order with respect
tcp->src_port = fdir_input->flow.udp6_flow.dst_port;
tcp->dst_port = fdir_input->flow.udp6_flow.src_port;
} else if (pctype == I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) {
- sctp = (struct sctp_hdr *)(raw_pkt + len);
- payload = (unsigned char *)sctp + sizeof(struct sctp_hdr);
+ sctp = (struct rte_sctp_hdr *)(raw_pkt + len);
+ payload = (unsigned char *)sctp + sizeof(struct rte_sctp_hdr);
/**
* The source and destination fields in the transmitted packet
* need to be presented in a reversed order with respect
* starts after the whole ARP header
*/
if (fdir_input->flow.l2_flow.ether_type ==
- rte_cpu_to_be_16(ETHER_TYPE_ARP))
- payload += sizeof(struct arp_hdr);
+ rte_cpu_to_be_16(RTE_ETHER_TYPE_ARP))
+ payload += sizeof(struct rte_arp_hdr);
set_idx = I40E_FLXPLD_L2_IDX;
} else if (fdir_input->flow_ext.customized_pctype) {
/* If customized pctype is used */
if (cus_pctype->index == I40E_CUSTOMIZED_GTPU_IPV4) {
gtp->msg_type = I40E_FDIR_GTP_MSG_TYPE_0XFF;
- gtp_ipv4 = (struct ipv4_hdr *)
+ gtp_ipv4 = (struct rte_ipv4_hdr *)
((unsigned char *)gtp +
sizeof(struct rte_flow_item_gtp));
gtp_ipv4->version_ihl =
rte_cpu_to_be_16(
I40E_FDIR_INNER_IP_DEFAULT_LEN);
payload = (unsigned char *)gtp_ipv4 +
- sizeof(struct ipv4_hdr);
+ sizeof(struct rte_ipv4_hdr);
} else if (cus_pctype->index ==
I40E_CUSTOMIZED_GTPU_IPV6) {
gtp->msg_type = I40E_FDIR_GTP_MSG_TYPE_0XFF;
- gtp_ipv6 = (struct ipv6_hdr *)
+ gtp_ipv6 = (struct rte_ipv6_hdr *)
((unsigned char *)gtp +
sizeof(struct rte_flow_item_gtp));
gtp_ipv6->vtc_flow =
gtp_ipv6->hop_limits =
I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS;
payload = (unsigned char *)gtp_ipv6 +
- sizeof(struct ipv6_hdr);
+ sizeof(struct rte_ipv6_hdr);
} else
payload = (unsigned char *)gtp +
sizeof(struct rte_flow_item_gtp);
PMD_DRV_LOG(ERR, "invalid programming status"
" reported, error = %u.", error);
} else
- PMD_DRV_LOG(ERR, "unknown programming status"
+ PMD_DRV_LOG(INFO, "unknown programming status"
" reported, len = %d, id = %u.", len, id);
rxdp->wb.qword1.status_error_len = 0;
rxq->rx_tail++;
if (unlikely(rxq->rx_tail == rxq->nb_rx_desc))
rxq->rx_tail = 0;
+ if (rxq->rx_tail == 0)
+ I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
+ else
+ I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->rx_tail - 1);
}
+
return ret;
}
if (add) {
fdir_filter = rte_zmalloc("fdir_filter",
sizeof(*fdir_filter), 0);
+ if (fdir_filter == NULL) {
+ PMD_DRV_LOG(ERR, "Failed to alloc memory.");
+ return -ENOMEM;
+ }
+
rte_memcpy(fdir_filter, &check_filter, sizeof(check_filter));
ret = i40e_sw_fdir_filter_insert(pf, fdir_filter);
+ if (ret < 0)
+ rte_free(fdir_filter);
} else {
ret = i40e_sw_fdir_filter_del(pf, &node->fdir.input);
}
struct i40e_hw *hw = I40E_PF_TO_HW(pf);
uint16_t num_flex_set = 0;
uint16_t num_flex_mask = 0;
+ uint16_t i;
if (dev->data->dev_conf.fdir_conf.mode == RTE_FDIR_MODE_PERFECT)
fdir->mode = RTE_FDIR_MODE_PERFECT;
(uint32_t)hw->func_caps.fd_filters_best_effort;
fdir->max_flexpayload = I40E_FDIR_MAX_FLEX_LEN;
fdir->flow_types_mask[0] = I40E_FDIR_FLOWS;
+ for (i = 1; i < RTE_FLOW_MASK_ARRAY_SIZE; i++)
+ fdir->flow_types_mask[i] = 0ULL;
fdir->flex_payload_unit = sizeof(uint16_t);
fdir->flex_bitmask_unit = sizeof(uint16_t);
fdir->max_flex_payload_segment_num = I40E_MAX_FLXPLD_FIED;
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