mbuf: add namespace to offload flags
[dpdk.git] / drivers / net / i40e / i40e_rxtx_vec_avx2.c
index 5f7b50d..c73b2a3 100644 (file)
@@ -79,7 +79,7 @@ desc_fdir_processing_32b(volatile union i40e_rx_desc *rxdp,
         * - Position that bit correctly based on packet number
         * - OR in the resulting bit to mbuf_flags
         */
-       RTE_BUILD_BUG_ON(PKT_RX_FDIR_ID != (1 << 13));
+       RTE_BUILD_BUG_ON(RTE_MBUF_F_RX_FDIR_ID != (1 << 13));
        __m256i mbuf_flag_mask = _mm256_set_epi32(0, 0, 0, 1 << 13,
                                                  0, 0, 0, 1 << 13);
        __m256i desc_flag_bit =  _mm256_and_si256(mbuf_flag_mask, fdir_mask);
@@ -209,8 +209,8 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
         * destination
         */
        const __m256i vlan_flags_shuf = _mm256_set_epi32(
-                       0, 0, PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED, 0,
-                       0, 0, PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED, 0);
+                       0, 0, RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 0,
+                       0, 0, RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED, 0);
        /*
         * data to be shuffled by result of flag mask, shifted down 11.
         * If RSS/FDIR bits are set, shuffle moves appropriate flags in
@@ -218,11 +218,11 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
         */
        const __m256i rss_flags_shuf = _mm256_set_epi8(
                        0, 0, 0, 0, 0, 0, 0, 0,
-                       PKT_RX_RSS_HASH | PKT_RX_FDIR, PKT_RX_RSS_HASH, 0, 0,
-                       0, 0, PKT_RX_FDIR, 0, /* end up 128-bits */
+                       RTE_MBUF_F_RX_RSS_HASH | RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_RSS_HASH, 0, 0,
+                       0, 0, RTE_MBUF_F_RX_FDIR, 0, /* end up 128-bits */
                        0, 0, 0, 0, 0, 0, 0, 0,
-                       PKT_RX_RSS_HASH | PKT_RX_FDIR, PKT_RX_RSS_HASH, 0, 0,
-                       0, 0, PKT_RX_FDIR, 0);
+                       RTE_MBUF_F_RX_RSS_HASH | RTE_MBUF_F_RX_FDIR, RTE_MBUF_F_RX_RSS_HASH, 0, 0,
+                       0, 0, RTE_MBUF_F_RX_FDIR, 0);
 
        /*
         * data to be shuffled by the result of the flags mask shifted by 22
@@ -230,37 +230,37 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
         */
        const __m256i l3_l4_flags_shuf = _mm256_set_epi8(0, 0, 0, 0, 0, 0, 0, 0,
                        /* shift right 1 bit to make sure it not exceed 255 */
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD  |
-                        PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD  |
-                        PKT_RX_IP_CKSUM_GOOD) >> 1,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |
-                        PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |
-                        PKT_RX_IP_CKSUM_GOOD) >> 1,
-                       (PKT_RX_L4_CKSUM_BAD  | PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_L4_CKSUM_BAD  | PKT_RX_IP_CKSUM_GOOD) >> 1,
-                       (PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD  |
+                        RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD  |
+                        RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
+                        RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
+                        RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_BAD  | RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_BAD  | RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_GOOD | RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_GOOD | RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
                        /* second 128-bits */
                        0, 0, 0, 0, 0, 0, 0, 0,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD  |
-                        PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD  |
-                        PKT_RX_IP_CKSUM_GOOD) >> 1,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |
-                        PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_OUTER_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_GOOD |
-                        PKT_RX_IP_CKSUM_GOOD) >> 1,
-                       (PKT_RX_L4_CKSUM_BAD  | PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_L4_CKSUM_BAD  | PKT_RX_IP_CKSUM_GOOD) >> 1,
-                       (PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD) >> 1,
-                       (PKT_RX_L4_CKSUM_GOOD | PKT_RX_IP_CKSUM_GOOD) >> 1);
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD  |
+                        RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD  |
+                        RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
+                        RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_GOOD |
+                        RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_BAD  | RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_BAD  | RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_GOOD | RTE_MBUF_F_RX_IP_CKSUM_BAD) >> 1,
+                       (RTE_MBUF_F_RX_L4_CKSUM_GOOD | RTE_MBUF_F_RX_IP_CKSUM_GOOD) >> 1);
 
        const __m256i cksum_mask = _mm256_set1_epi32(
-                       PKT_RX_IP_CKSUM_GOOD | PKT_RX_IP_CKSUM_BAD |
-                       PKT_RX_L4_CKSUM_GOOD | PKT_RX_L4_CKSUM_BAD |
-                       PKT_RX_OUTER_IP_CKSUM_BAD);
+                       RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_IP_CKSUM_BAD |
+                       RTE_MBUF_F_RX_L4_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_BAD |
+                       RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD);
 
        RTE_SET_USED(avx_aligned); /* for 32B descriptors we don't use this */
 
@@ -443,7 +443,7 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
                         * order (hi->lo): [1, 3, 5, 7, 0, 2, 4, 6]
                         * Then OR FDIR flags to mbuf_flags on FDIR ID hit.
                         */
-                       RTE_BUILD_BUG_ON(PKT_RX_FDIR_ID != (1 << 13));
+                       RTE_BUILD_BUG_ON(RTE_MBUF_F_RX_FDIR_ID != (1 << 13));
                        const __m256i pkt_fdir_bit = _mm256_set1_epi32(1 << 13);
                        const __m256i fdir_mask = _mm256_cmpeq_epi32(fdir, fdir_id);
                        __m256i fdir_bits = _mm256_and_si256(fdir_mask, pkt_fdir_bit);