net/mlx5: support hardware TSO

[dpdk.git] / drivers / net / mlx5 / mlx5.c

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index ca123e4..c258e43 100644 (file)
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -84,6 +84,9 @@
 /* Device parameter to enable multi-packet send WQEs. */
 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
 
+/* Device parameter to enable hardware TSO offload. */
+#define MLX5_TSO "tso"
+
 /**
  * Retrieve integer value from environment variable.
  *
@@ -199,6 +202,9 @@ static const struct eth_dev_ops mlx5_dev_ops = {
        .link_update = mlx5_link_update,
        .stats_get = mlx5_stats_get,
        .stats_reset = mlx5_stats_reset,
+       .xstats_get = mlx5_xstats_get,
+       .xstats_reset = mlx5_xstats_reset,
+       .xstats_get_names = mlx5_xstats_get_names,
        .dev_infos_get = mlx5_dev_infos_get,
        .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
        .vlan_filter_set = mlx5_vlan_filter_set,
@@ -219,6 +225,8 @@ static const struct eth_dev_ops mlx5_dev_ops = {
        .rss_hash_update = mlx5_rss_hash_update,
        .rss_hash_conf_get = mlx5_rss_hash_conf_get,
        .filter_ctrl = mlx5_dev_filter_ctrl,
+       .rx_descriptor_status = mlx5_rx_descriptor_status,
+       .tx_descriptor_status = mlx5_tx_descriptor_status,
 };
 
 static struct {
@@ -286,7 +294,9 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
        } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
                priv->txqs_inline = tmp;
        } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
-               priv->mps = !!tmp;
+               priv->mps &= !!tmp; /* Enable MPW only if HW supports */
+       } else if (strcmp(MLX5_TSO, key) == 0) {
+               priv->tso = !!tmp;
        } else {
                WARN("%s: unknown parameter", key);
                return -EINVAL;
@@ -313,6 +323,7 @@ mlx5_args(struct priv *priv, struct rte_devargs *devargs)
                MLX5_TXQ_INLINE,
                MLX5_TXQS_MIN_INLINE,
                MLX5_TXQ_MPW_EN,
+               MLX5_TSO,
                NULL,
        };
        struct rte_kvargs *kvlist;
@@ -330,8 +341,10 @@ mlx5_args(struct priv *priv, struct rte_devargs *devargs)
                if (rte_kvargs_count(kvlist, params[i])) {
                        ret = rte_kvargs_process(kvlist, params[i],
                                                 mlx5_args_check, priv);
-                       if (ret != 0)
+                       if (ret != 0) {
+                               rte_kvargs_free(kvlist);
                                return ret;
+                       }
                }
        }
        rte_kvargs_free(kvlist);
@@ -408,10 +421,26 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                sriov = ((pci_dev->id.device_id ==
                       PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
                      (pci_dev->id.device_id ==
-                      PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
-               /* Multi-packet send is only supported by ConnectX-4 Lx PF. */
-               mps = (pci_dev->id.device_id ==
-                      PCI_DEVICE_ID_MELLANOX_CONNECTX4LX);
+                      PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF) ||
+                     (pci_dev->id.device_id ==
+                      PCI_DEVICE_ID_MELLANOX_CONNECTX5VF) ||
+                     (pci_dev->id.device_id ==
+                      PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF));
+               /*
+                * Multi-packet send is supported by ConnectX-4 Lx PF as well
+                * as all ConnectX-5 devices.
+                */
+               switch (pci_dev->id.device_id) {
+               case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
+               case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
+               case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
+               case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
+               case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
+                       mps = 1;
+                       break;
+               default:
+                       mps = 0;
+               }
                INFO("PCI information matches, using device \"%s\""
                     " (SR-IOV: %s, MPS: %s)",
                     list[i]->name,
@@ -458,6 +487,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                        IBV_EXP_DEVICE_ATTR_RX_HASH |
                        IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
                        IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
+                       IBV_EXP_DEVICE_ATTR_TSO_CAPS |
                        0;
 
                DEBUG("using port %u (%08" PRIx32 ")", port, test);
@@ -538,8 +568,9 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
                /* Remove this check once DPDK supports larger/variable
                 * indirection tables. */
-               if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
-                       priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
+               if (priv->ind_table_max_size >
+                               (unsigned int)ETH_RSS_RETA_SIZE_512)
+                       priv->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
                DEBUG("maximum RX indirection table size is %u",
                      priv->ind_table_max_size);
                priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
@@ -558,11 +589,22 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 
                priv_get_num_vfs(priv, &num_vfs);
                priv->sriov = (num_vfs || sriov);
+               priv->tso = ((priv->tso) &&
+                           (exp_device_attr.tso_caps.max_tso > 0) &&
+                           (exp_device_attr.tso_caps.supported_qpts &
+                           (1 << IBV_QPT_RAW_ETH)));
+               if (priv->tso)
+                       priv->max_tso_payload_sz =
+                               exp_device_attr.tso_caps.max_tso;
                if (priv->mps && !mps) {
                        ERROR("multi-packet send not supported on this device"
                              " (" MLX5_TXQ_MPW_EN ")");
                        err = ENOTSUP;
                        goto port_error;
+               } else if (priv->mps && priv->tso) {
+                       WARN("multi-packet send not supported in conjunction "
+                             "with TSO. MPS disabled");
+                       priv->mps = 0;
                }
                /* Allocate and register default RSS hash keys. */
                priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
@@ -655,7 +697,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                        eth_dev->data->mac_addrs = priv->mac;
                }
 
-               eth_dev->pci_dev = pci_dev;
+               eth_dev->device = &pci_dev->device;
                rte_eth_copy_pci_info(eth_dev, pci_dev);
                eth_dev->driver = &mlx5_driver;
                priv->dev = eth_dev;
@@ -664,7 +706,7 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
                /* Bring Ethernet device up. */
                DEBUG("forcing Ethernet interface up");
                priv_set_flags(priv, ~IFF_UP, IFF_UP);
-               mlx5_link_update_unlocked(priv->dev, 1);
+               mlx5_link_update(priv->dev, 1);
                continue;
 
 port_error:
@@ -718,6 +760,22 @@ static const struct rte_pci_id mlx5_pci_id_map[] = {
                RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
                               PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
        },
+       {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+                              PCI_DEVICE_ID_MELLANOX_CONNECTX5)
+       },
+       {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+                              PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
+       },
+       {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+                              PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
+       },
+       {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+                              PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
+       },
        {
                .vendor_id = 0
        }