net/mlx5: support hardware TSO

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index c415ce3..93f129b 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -83,6 +83,18 @@ enum {
        PCI_DEVICE_ID_MELLANOX_CONNECTX4VF = 0x1014,
        PCI_DEVICE_ID_MELLANOX_CONNECTX4LX = 0x1015,
        PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF = 0x1016,
+       PCI_DEVICE_ID_MELLANOX_CONNECTX5 = 0x1017,
+       PCI_DEVICE_ID_MELLANOX_CONNECTX5VF = 0x1018,
+       PCI_DEVICE_ID_MELLANOX_CONNECTX5EX = 0x1019,
+       PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF = 0x101a,
+};
+
+struct mlx5_xstats_ctrl {
+       /* Number of device stats. */
+       uint16_t stats_n;
+       /* Index in the device counters table. */
+       uint16_t dev_table_idx[MLX5_MAX_XSTATS];
+       uint64_t base[MLX5_MAX_XSTATS];
 };
 
 struct priv {
@@ -114,6 +126,8 @@ struct priv {
        unsigned int mps:1; /* Whether multi-packet send is supported. */
        unsigned int cqe_comp:1; /* Whether CQE compression is enabled. */
        unsigned int pending_alarm:1; /* An alarm is pending. */
+       unsigned int tso:1; /* Whether TSO is supported. */
+       unsigned int max_tso_payload_sz; /* Maximum TCP payload for TSO. */
        unsigned int txq_inline; /* Maximum packet size for inlining. */
        unsigned int txqs_inline; /* Queue number threshold for inlining. */
        /* RX/TX queues. */
@@ -136,8 +150,10 @@ struct priv {
        unsigned int reta_idx_n; /* RETA index size. */
        struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */
        struct fdir_queue *fdir_drop_queue; /* Flow director drop queue. */
+       struct rte_flow_drop *flow_drop_queue; /* Flow drop queue. */
        LIST_HEAD(mlx5_flows, rte_flow) flows; /* RTE Flow rules. */
        uint32_t link_speed_capa; /* Link speed capabilities. */
+       struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
        rte_spinlock_t lock; /* Lock for control functions. */
 };
 
@@ -184,13 +200,14 @@ struct priv *mlx5_get_priv(struct rte_eth_dev *dev);
 int mlx5_is_secondary(void);
 int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]);
 int priv_ifreq(const struct priv *, int req, struct ifreq *);
+int priv_is_ib_cntr(const char *);
+int priv_get_cntr_sysfs(struct priv *, const char *, uint64_t *);
 int priv_get_num_vfs(struct priv *, uint16_t *);
 int priv_get_mtu(struct priv *, uint16_t *);
 int priv_set_flags(struct priv *, unsigned int, unsigned int);
 int mlx5_dev_configure(struct rte_eth_dev *);
 void mlx5_dev_infos_get(struct rte_eth_dev *, struct rte_eth_dev_info *);
 const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev);
-int mlx5_link_update_unlocked(struct rte_eth_dev *, int);
 int mlx5_link_update(struct rte_eth_dev *, int);
 int mlx5_dev_set_mtu(struct rte_eth_dev *, uint16_t);
 int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
@@ -246,8 +263,14 @@ void mlx5_allmulticast_disable(struct rte_eth_dev *);
 
 /* mlx5_stats.c */
 
+void priv_xstats_init(struct priv *);
 void mlx5_stats_get(struct rte_eth_dev *, struct rte_eth_stats *);
 void mlx5_stats_reset(struct rte_eth_dev *);
+int mlx5_xstats_get(struct rte_eth_dev *,
+                   struct rte_eth_xstat *, unsigned int);
+void mlx5_xstats_reset(struct rte_eth_dev *);
+int mlx5_xstats_get_names(struct rte_eth_dev *,
+                         struct rte_eth_xstat_name *, unsigned int);
 
 /* mlx5_vlan.c */