net/mlx5: fix unnecessary init in mark conversion
[dpdk.git] / drivers / net / mlx5 / mlx5_flow_dv.c
index 7c16055..5339980 100644 (file)
@@ -1152,8 +1152,7 @@ flow_dv_convert_action_mark(struct rte_eth_dev *dev,
                .mask = &mask,
        };
        struct field_modify_info reg_c_x[] = {
-               {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
-               {0, 0, 0},
+               [1] = {0, 0, 0},
        };
        int reg;
 
@@ -1173,7 +1172,7 @@ flow_dv_convert_action_mark(struct rte_eth_dev *dev,
                mask = rte_cpu_to_be_32(mask) & msk_c0;
                mask = rte_cpu_to_be_32(mask << shl_c0);
        }
-       reg_c_x[0].id = reg_to_field[reg];
+       reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
        return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
                                             MLX5_MODIFICATION_TYPE_SET, error);
 }
@@ -4404,6 +4403,66 @@ flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
        return pool;
 }
 
+/**
+ * Restore skipped counters in the pool.
+ *
+ * As counter pool query requires the first counter dcs
+ * ID start with 4 alinged, if the pool counters with
+ * min_dcs ID are not aligned with 4, the counters will
+ * be skipped.
+ * Once other min_dcs ID less than these skipped counter
+ * dcs ID appears, the skipped counters will be safe to
+ * use.
+ * Should be called when min_dcs is updated.
+ *
+ * @param[in] pool
+ *   Current counter pool.
+ * @param[in] last_min_dcs
+ *   Last min_dcs.
+ */
+static void
+flow_dv_counter_restore(struct mlx5_flow_counter_pool *pool,
+                       struct mlx5_devx_obj *last_min_dcs)
+{
+       struct mlx5_flow_counter_ext *cnt_ext;
+       uint32_t offset, new_offset;
+       uint32_t skip_cnt = 0;
+       uint32_t i;
+
+       if (!pool->skip_cnt)
+               return;
+       /*
+        * If last min_dcs is not valid. The skipped counter may even after
+        * last min_dcs, set the offset to the whole pool.
+        */
+       if (last_min_dcs->id & (MLX5_CNT_BATCH_QUERY_ID_ALIGNMENT - 1))
+               offset = MLX5_COUNTERS_PER_POOL;
+       else
+               offset = last_min_dcs->id % MLX5_COUNTERS_PER_POOL;
+       new_offset = pool->min_dcs->id % MLX5_COUNTERS_PER_POOL;
+       /*
+        * Check the counters from 1 to the last_min_dcs range. Counters
+        * before new min_dcs indicates pool still has skipped counters.
+        * Counters be skipped after new min_dcs will be ready to use.
+        * Offset 0 counter must be empty or min_dcs, start from 1.
+        */
+       for (i = 1; i < offset; i++) {
+               cnt_ext = MLX5_GET_POOL_CNT_EXT(pool, i);
+               if (cnt_ext->skipped) {
+                       if (i > new_offset) {
+                               cnt_ext->skipped = 0;
+                               TAILQ_INSERT_TAIL
+                                       (&pool->counters[pool->query_gen],
+                                        MLX5_POOL_GET_CNT(pool, i), next);
+                       } else {
+                               skip_cnt++;
+                       }
+               }
+       }
+       if (!skip_cnt)
+               pool->skip_cnt = 0;
+}
+
 /**
  * Prepare a new counter and/or a new counter pool.
  *
@@ -4429,6 +4488,7 @@ flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
        struct mlx5_pools_container *cont;
        struct mlx5_flow_counter_pool *pool;
        struct mlx5_counters tmp_tq;
+       struct mlx5_devx_obj *last_min_dcs;
        struct mlx5_devx_obj *dcs = NULL;
        struct mlx5_flow_counter *cnt;
        uint32_t add2other;
@@ -4463,13 +4523,44 @@ retry:
                                }
                        }
                }
-               if (dcs->id < pool->min_dcs->id)
+               if ((dcs->id < pool->min_dcs->id ||
+                   pool->min_dcs->id &
+                   (MLX5_CNT_BATCH_QUERY_ID_ALIGNMENT - 1)) &&
+                   !(dcs->id & (MLX5_CNT_BATCH_QUERY_ID_ALIGNMENT - 1))) {
+                       /*
+                        * Update the pool min_dcs only if current dcs is
+                        * valid and exist min_dcs is not valid or greater
+                        * than new dcs.
+                        */
+                       last_min_dcs = pool->min_dcs;
                        rte_atomic64_set(&pool->a64_dcs,
                                         (int64_t)(uintptr_t)dcs);
+                       /*
+                        * Restore any skipped counters if the new min_dcs
+                        * ID is smaller or min_dcs is not valid.
+                        */
+                       if (dcs->id < last_min_dcs->id ||
+                           last_min_dcs->id &
+                           (MLX5_CNT_BATCH_QUERY_ID_ALIGNMENT - 1))
+                               flow_dv_counter_restore(pool, last_min_dcs);
+               }
                i = dcs->id % MLX5_COUNTERS_PER_POOL;
                cnt = MLX5_POOL_GET_CNT(pool, i);
                cnt->pool = pool;
                MLX5_GET_POOL_CNT_EXT(pool, i)->dcs = dcs;
+               /*
+                * If min_dcs is not valid, it means the new allocated dcs
+                * also fail to become the valid min_dcs, just skip it.
+                * Or if min_dcs is valid, and new dcs ID is smaller than
+                * min_dcs, but not become the min_dcs, also skip it.
+                */
+               if (pool->min_dcs->id &
+                   (MLX5_CNT_BATCH_QUERY_ID_ALIGNMENT - 1) ||
+                   dcs->id < pool->min_dcs->id) {
+                       MLX5_GET_POOL_CNT_EXT(pool, i)->skipped = 1;
+                       pool->skip_cnt = 1;
+                       goto retry;
+               }
                if (add2other) {
                        TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen],
                                          cnt, next);
@@ -6452,8 +6543,8 @@ flow_dv_translate_item_nvgre(void *matcher, void *key,
        const struct rte_flow_item_nvgre *nvgre_v = item->spec;
        void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
        void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
-       const char *tni_flow_id_m = (const char *)nvgre_m->tni;
-       const char *tni_flow_id_v = (const char *)nvgre_v->tni;
+       const char *tni_flow_id_m;
+       const char *tni_flow_id_v;
        char *gre_key_m;
        char *gre_key_v;
        int size;
@@ -6478,6 +6569,8 @@ flow_dv_translate_item_nvgre(void *matcher, void *key,
                return;
        if (!nvgre_m)
                nvgre_m = &rte_flow_item_nvgre_mask;
+       tni_flow_id_m = (const char *)nvgre_m->tni;
+       tni_flow_id_v = (const char *)nvgre_v->tni;
        size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
        gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
        gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);