net/mlx5: support Tx interface query via DevX

[dpdk.git] / drivers / net / mlx5 / mlx5_prm.h

diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h
index 4f20dea..b5de0c3 100644 (file)
--- a/drivers/net/mlx5/mlx5_prm.h
+++ b/drivers/net/mlx5/mlx5_prm.h
@@ -627,6 +627,7 @@ enum {
        MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
        MLX5_CMD_OP_CREATE_MKEY = 0x200,
        MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
+       MLX5_CMD_OP_QUERY_TIS = 0x915,
        MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
        MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
 };
@@ -1234,6 +1235,39 @@ struct mlx5_ifc_query_nic_vport_context_in_bits {
        u8 reserved_at_68[0x18];
 };
 
+struct mlx5_ifc_tisc_bits {
+       u8 strict_lag_tx_port_affinity[0x1];
+       u8 reserved_at_1[0x3];
+       u8 lag_tx_port_affinity[0x04];
+       u8 reserved_at_8[0x4];
+       u8 prio[0x4];
+       u8 reserved_at_10[0x10];
+       u8 reserved_at_20[0x100];
+       u8 reserved_at_120[0x8];
+       u8 transport_domain[0x18];
+       u8 reserved_at_140[0x8];
+       u8 underlay_qpn[0x18];
+       u8 reserved_at_160[0x3a0];
+};
+
+struct mlx5_ifc_query_tis_out_bits {
+       u8 status[0x8];
+       u8 reserved_at_8[0x18];
+       u8 syndrome[0x20];
+       u8 reserved_at_40[0x40];
+       struct mlx5_ifc_tisc_bits tis_context;
+};
+
+struct mlx5_ifc_query_tis_in_bits {
+       u8 opcode[0x10];
+       u8 reserved_at_10[0x10];
+       u8 reserved_at_20[0x10];
+       u8 op_mod[0x10];
+       u8 reserved_at_40[0x8];
+       u8 tisn[0x18];
+       u8 reserved_at_60[0x20];
+};
+
 /* CQE format mask. */
 #define MLX5E_CQE_FORMAT_MASK 0xc