net: add rte prefix to ether defines

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx_vec_sse.h

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index f0d8888..dce3ee4 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -104,11 +104,11 @@ txq_scatter_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts,
                sizeof(struct mlx5_wqe) / MLX5_WQE_DWORD_SIZE;
        unsigned int n;
        volatile struct mlx5_wqe *wqe = NULL;
+       bool metadata_ol =
+               txq->offloads & DEV_TX_OFFLOAD_MATCH_METADATA ? true : false;
 
        assert(elts_n > pkts_n);
        mlx5_tx_complete(txq);
-       /* A CQE slot must always be available. */
-       assert((1u << txq->cqe_n) - (txq->cq_pi - txq->cq_ci));
        if (unlikely(!pkts_n))
                return 0;
        for (n = 0; n < pkts_n; ++n) {
@@ -127,6 +127,9 @@ txq_scatter_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts,
                uint16_t max_wqe;
                __m128i *t_wqe, *dseg;
                __m128i ctrl;
+               rte_be32_t metadata =
+                       metadata_ol && (buf->ol_flags & PKT_TX_METADATA) ?
+                       buf->tx_metadata : 0;
 
                assert(segs_n);
                max_elts = elts_n - (elts_head - txq->elts_tail);
@@ -167,9 +170,9 @@ txq_scatter_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts,
                _mm_store_si128(t_wqe, ctrl);
                /* Fill ESEG in the header. */
                _mm_store_si128(t_wqe + 1,
-                               _mm_set_epi16(0, 0, 0, 0,
-                                             rte_cpu_to_be_16(len), cs_flags,
-                                             0, 0));
+                               _mm_set_epi32(0, metadata,
+                                             (rte_cpu_to_be_16(len) << 16) |
+                                             cs_flags, 0));
                txq->wqe_ci = wqe_ci;
        }
        if (!n)
@@ -177,12 +180,11 @@ txq_scatter_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts,
        txq->elts_comp += (uint16_t)(elts_head - txq->elts_head);
        txq->elts_head = elts_head;
        if (txq->elts_comp >= MLX5_TX_COMP_THRESH) {
+               /* A CQE slot must always be available. */
+               assert((1u << txq->cqe_n) - (txq->cq_pi++ - txq->cq_ci));
                wqe->ctrl[2] = rte_cpu_to_be_32(8);
                wqe->ctrl[3] = txq->elts_head;
                txq->elts_comp = 0;
-#ifndef NDEBUG
-               ++txq->cq_pi;
-#endif
        }
 #ifdef MLX5_PMD_SOFT_COUNTERS
        txq->stats.opackets += n;
@@ -205,13 +207,15 @@ txq_scatter_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts,
  *   Number of packets to be sent (<= MLX5_VPMD_TX_MAX_BURST).
  * @param cs_flags
  *   Checksum offload flags to be written in the descriptor.
+ * @param metadata
+ *   Metadata value to be written in the descriptor.
  *
  * @return
  *   Number of packets successfully transmitted (<= pkts_n).
  */
 static inline uint16_t
 txq_burst_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts, uint16_t pkts_n,
-           uint8_t cs_flags)
+           uint8_t cs_flags, rte_be32_t metadata)
 {
        struct rte_mbuf **elts;
        uint16_t elts_head = txq->elts_head;
@@ -244,8 +248,6 @@ txq_burst_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts, uint16_t pkts_n,
        assert(elts_n > pkts_n);
        mlx5_tx_complete(txq);
        max_elts = (elts_n - (elts_head - txq->elts_tail));
-       /* A CQE slot must always be available. */
-       assert((1u << txq->cqe_n) - (txq->cq_pi - txq->cq_ci));
        max_wqe = (1u << txq->wqe_n) - (txq->wqe_ci - txq->wqe_pi);
        pkts_n = RTE_MIN((unsigned int)RTE_MIN(pkts_n, max_wqe), max_elts);
        assert(pkts_n <= MLX5_DSEG_MAX - nb_dword_in_hdr);
@@ -283,11 +285,10 @@ txq_burst_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts, uint16_t pkts_n,
        if (txq->elts_comp + pkts_n < MLX5_TX_COMP_THRESH) {
                txq->elts_comp += pkts_n;
        } else {
+               /* A CQE slot must always be available. */
+               assert((1u << txq->cqe_n) - (txq->cq_pi++ - txq->cq_ci));
                /* Request a completion. */
                txq->elts_comp = 0;
-#ifndef NDEBUG
-               ++txq->cq_pi;
-#endif
                comp_req = 8;
        }
        /* Fill CTRL in the header. */
@@ -298,11 +299,7 @@ txq_burst_v(struct mlx5_txq_data *txq, struct rte_mbuf **pkts, uint16_t pkts_n,
        ctrl = _mm_shuffle_epi8(ctrl, shuf_mask_ctrl);
        _mm_store_si128(t_wqe, ctrl);
        /* Fill ESEG in the header. */
-       _mm_store_si128(t_wqe + 1,
-                       _mm_set_epi8(0, 0, 0, 0,
-                                    0, 0, 0, 0,
-                                    0, 0, 0, cs_flags,
-                                    0, 0, 0, 0));
+       _mm_store_si128(t_wqe + 1, _mm_set_epi32(0, metadata, cs_flags, 0));
 #ifdef MLX5_PMD_SOFT_COUNTERS
        txq->stats.opackets += pkts_n;
 #endif
@@ -377,16 +374,16 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
                            -1, -1, -1, -1  /* skip packet_type */);
        /* Restore the compressed count. Must be 16 bits. */
        const uint16_t mcqe_n = t_pkt->data_len +
-                               (rxq->crc_present * ETHER_CRC_LEN);
+                               (rxq->crc_present * RTE_ETHER_CRC_LEN);
        const __m128i rearm =
                _mm_loadu_si128((__m128i *)&t_pkt->rearm_data);
        const __m128i rxdf =
                _mm_loadu_si128((__m128i *)&t_pkt->rx_descriptor_fields1);
        const __m128i crc_adj =
                _mm_set_epi16(0, 0, 0,
-                             rxq->crc_present * ETHER_CRC_LEN,
+                             rxq->crc_present * RTE_ETHER_CRC_LEN,
                              0,
-                             rxq->crc_present * ETHER_CRC_LEN,
+                             rxq->crc_present * RTE_ETHER_CRC_LEN,
                              0, 0);
        const uint32_t flow_tag = t_pkt->hash.fdir.hi;
 #ifdef MLX5_PMD_SOFT_COUNTERS
@@ -702,9 +699,9 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,
        const __m128i ones = _mm_cmpeq_epi32(zero, zero);
        const __m128i crc_adj =
                _mm_set_epi16(0, 0, 0, 0, 0,
-                             rxq->crc_present * ETHER_CRC_LEN,
+                             rxq->crc_present * RTE_ETHER_CRC_LEN,
                              0,
-                             rxq->crc_present * ETHER_CRC_LEN);
+                             rxq->crc_present * RTE_ETHER_CRC_LEN);
        const __m128i flow_mark_adj = _mm_set_epi32(rxq->mark * (-1), 0, 0, 0);
 
        assert(rxq->sges_n == 0);
@@ -724,7 +721,7 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n,
         *   N - (rq_ci - rq_pi) := # of buffers consumed (to be replenished).
         */
        repl_n = q_n - (rxq->rq_ci - rxq->rq_pi);
-       if (repl_n >= MLX5_VPMD_RXQ_RPLNSH_THRESH(q_n))
+       if (repl_n >= rxq->rq_repl_thresh)
                mlx5_rx_replenish_bulk_mbuf(rxq, repl_n);
        /* See if there're unreturned mbufs from compressed CQE. */
        rcvd_pkt = rxq->cq_ci - rxq->rq_pi;