net/nfp: fix possible memory leak
[dpdk.git] / drivers / net / nfp / nfp_nspu.c
index dbb5305..f908983 100644 (file)
@@ -3,8 +3,12 @@
 #include <string.h>
 #include <unistd.h>
 #include <sys/types.h>
+#include <sys/file.h>
+#include <sys/stat.h>
+#include <fcntl.h>
 
 #include <rte_log.h>
+#include <rte_byteorder.h>
 
 #include "nfp_nfpu.h"
 
 /* NFP target for NSP access */
 #define NFP_NSP_TARGET   7
 
+/* Expansion BARs for mapping PF vnic BARs */
+#define NFP_NET_PF_CFG_EXP_BAR          6
+#define NFP_NET_PF_HW_QUEUES_EXP_BAR    5
+
 /*
  * This is an NFP internal address used for configuring properly an NFP
  * expansion BAR.
 #define NSP_STATUS_MINOR(x)      (int)(((x) >> 32) & 0xfff)
 
 /* NSP commands */
-#define NSP_CMD_RESET                  1
+#define NSP_CMD_RESET                   1
+#define NSP_CMD_FW_LOAD                 6
+#define NSP_CMD_READ_ETH_TABLE          7
+#define NSP_CMD_WRITE_ETH_TABLE         8
+#define NSP_CMD_GET_SYMBOL             14
 
 #define NSP_BUFFER_CFG_SIZE_MASK       (0xff)
 
@@ -292,7 +304,7 @@ nspu_command(nspu_desc_t *desc, uint16_t cmd, int read, int write,
        return ret;
 }
 
-int
+static int
 nfp_fw_reset(nspu_desc_t *nspu_desc)
 {
        int res;
@@ -304,3 +316,327 @@ nfp_fw_reset(nspu_desc_t *nspu_desc)
 
        return res;
 }
+
+#define DEFAULT_FW_PATH       "/lib/firmware/netronome"
+#define DEFAULT_FW_FILENAME   "nic_dpdk_default.nffw"
+
+static int
+nfp_fw_upload(nspu_desc_t *nspu_desc)
+{
+       int fw_f;
+       char *fw_buf;
+       char filename[100];
+       struct stat file_stat;
+       off_t fsize, bytes;
+       ssize_t size;
+       int ret;
+
+       size = nspu_desc->buf_size;
+
+       sprintf(filename, "%s/%s", DEFAULT_FW_PATH, DEFAULT_FW_FILENAME);
+       fw_f = open(filename, O_RDONLY);
+       if (fw_f < 0) {
+               RTE_LOG(INFO, PMD, "Firmware file %s/%s not found.",
+                       DEFAULT_FW_PATH, DEFAULT_FW_FILENAME);
+               return -ENOENT;
+       }
+
+       if (fstat(fw_f, &file_stat) < 0) {
+               RTE_LOG(INFO, PMD, "Firmware file %s/%s size is unknown",
+                       DEFAULT_FW_PATH, DEFAULT_FW_FILENAME);
+               close(fw_f);
+               return -ENOENT;
+       }
+
+       fsize = file_stat.st_size;
+       RTE_LOG(DEBUG, PMD, "Firmware file with size: %" PRIu64 "\n",
+                           (uint64_t)fsize);
+
+       if (fsize > (off_t)size) {
+               RTE_LOG(INFO, PMD, "fw file too big: %" PRIu64
+                                  " bytes (%" PRIu64 " max)",
+                                 (uint64_t)fsize, (uint64_t)size);
+               close(fw_f);
+               return -EINVAL;
+       }
+
+       fw_buf = malloc((size_t)size);
+       if (!fw_buf) {
+               RTE_LOG(INFO, PMD, "malloc failed for fw buffer");
+               close(fw_f);
+               return -ENOMEM;
+       }
+       memset(fw_buf, 0, size);
+
+       bytes = read(fw_f, fw_buf, fsize);
+       if (bytes != fsize) {
+               RTE_LOG(INFO, PMD, "Reading fw to buffer failed.\n"
+                                  "Just %" PRIu64 " of %" PRIu64 " bytes read.",
+                                  (uint64_t)bytes, (uint64_t)fsize);
+               free(fw_buf);
+               close(fw_f);
+               return -EIO;
+       }
+
+       ret = nspu_command(nspu_desc, NSP_CMD_FW_LOAD, 0, 1, fw_buf, 0, bytes);
+
+       free(fw_buf);
+       close(fw_f);
+
+       return ret;
+}
+
+/* Firmware symbol descriptor size */
+#define NFP_SYM_DESC_LEN 40
+
+#define SYMBOL_DATA(b, off)     (*(int64_t *)((b) + (off)))
+#define SYMBOL_UDATA(b, off)     (*(uint64_t *)((b) + (off)))
+
+/* Firmware symbols contain information about how to access what they
+ * represent. It can be as simple as an numeric variable declared at a
+ * specific NFP memory, but it can also be more complex structures and
+ * related to specific hardware functionalities or components. Target,
+ * domain and address allow to create the BAR window for accessing such
+ * hw object and size defines the length to map.
+ *
+ * A vNIC is a network interface implemented inside the NFP and using a
+ * subset of device PCI BARs. Specific firmware symbols allow to map those
+ * vNIC bars by host drivers like the NFP PMD.
+ *
+ * Accessing what the symbol represents implies to map the access through
+ * a PCI BAR window. NFP expansion BARs are used in this regard through
+ * the NSPU interface.
+ */
+static int
+nfp_nspu_set_bar_from_symbl(nspu_desc_t *desc, const char *symbl,
+                           uint32_t expbar, uint64_t *pcie_offset,
+                           ssize_t *size)
+{
+       int64_t type;
+       int64_t target;
+       int64_t domain;
+       uint64_t addr;
+       char *sym_buf;
+       int ret = 0;
+
+       sym_buf = malloc(desc->buf_size);
+       if (!sym_buf)
+               return -ENOMEM;
+
+       strncpy(sym_buf, symbl, strlen(symbl));
+       ret = nspu_command(desc, NSP_CMD_GET_SYMBOL, 1, 1, sym_buf,
+                          NFP_SYM_DESC_LEN, strlen(symbl));
+       if (ret) {
+               RTE_LOG(DEBUG, PMD, "symbol resolution (%s) failed\n", symbl);
+               goto clean;
+       }
+
+       /* Reading symbol information */
+       type = SYMBOL_DATA(sym_buf, 0);
+       target = SYMBOL_DATA(sym_buf, 8);
+       domain =  SYMBOL_DATA(sym_buf, 16);
+       addr = SYMBOL_UDATA(sym_buf, 24);
+       *size = (ssize_t)SYMBOL_UDATA(sym_buf, 32);
+
+       if (type != 1) {
+               RTE_LOG(INFO, PMD, "wrong symbol type\n");
+               ret = -EINVAL;
+               goto clean;
+       }
+       if (!(target == 7 || target == -7)) {
+               RTE_LOG(INFO, PMD, "wrong symbol target\n");
+               ret = -EINVAL;
+               goto clean;
+       }
+       if (domain == 8 || domain == 9) {
+               RTE_LOG(INFO, PMD, "wrong symbol domain\n");
+               ret = -EINVAL;
+               goto clean;
+       }
+
+       /* Adjusting address based on symbol location */
+       if ((domain >= 24) && (domain < 28) && (target == 7)) {
+               addr = 1ULL << 37 | addr | ((uint64_t)domain & 0x3) << 35;
+       } else {
+               addr = 1ULL << 39 | addr | ((uint64_t)domain & 0x3f) << 32;
+               if (target == -7)
+                       target = 7;
+       }
+
+       /* Configuring NFP expansion bar for mapping specific PCI BAR window */
+       nfp_nspu_mem_bar_cfg(desc, expbar, target, addr, pcie_offset);
+
+       /* This is the PCI BAR offset to use by the host */
+       *pcie_offset |= ((expbar & 0x7) << (desc->barsz - 3));
+
+clean:
+       free(sym_buf);
+       return ret;
+}
+
+int
+nfp_nsp_fw_setup(nspu_desc_t *desc, const char *sym, uint64_t *pcie_offset)
+{
+       ssize_t bar0_sym_size;
+
+       /* If the symbol resolution works, it implies a firmware app
+        * is already there.
+        */
+       if (!nfp_nspu_set_bar_from_symbl(desc, sym, NFP_NET_PF_CFG_EXP_BAR,
+                                        pcie_offset, &bar0_sym_size))
+               return 0;
+
+       /* No firmware app detected or not the right one */
+       RTE_LOG(INFO, PMD, "No firmware detected. Resetting NFP...\n");
+       if (nfp_fw_reset(desc) < 0) {
+               RTE_LOG(ERR, PMD, "nfp fw reset failed\n");
+               return -ENODEV;
+       }
+
+       RTE_LOG(INFO, PMD, "Reset done.\n");
+       RTE_LOG(INFO, PMD, "Uploading firmware...\n");
+
+       if (nfp_fw_upload(desc) < 0) {
+               RTE_LOG(ERR, PMD, "nfp fw upload failed\n");
+               return -ENODEV;
+       }
+
+       RTE_LOG(INFO, PMD, "Done.\n");
+
+       /* Now the symbol should be there */
+       if (nfp_nspu_set_bar_from_symbl(desc, sym, NFP_NET_PF_CFG_EXP_BAR,
+                                       pcie_offset, &bar0_sym_size)) {
+               RTE_LOG(ERR, PMD, "nfp PF BAR symbol resolution failed\n");
+               return -ENODEV;
+       }
+
+       return 0;
+}
+
+int
+nfp_nsp_map_ctrl_bar(nspu_desc_t *desc, uint64_t *pcie_offset)
+{
+       ssize_t bar0_sym_size;
+
+       if (nfp_nspu_set_bar_from_symbl(desc, "_pf0_net_bar0",
+                                       NFP_NET_PF_CFG_EXP_BAR,
+                                       pcie_offset, &bar0_sym_size))
+               return -ENODEV;
+
+       return 0;
+}
+
+/*
+ * This is a hardcoded fixed NFP internal CPP bus address for the hw queues unit
+ * inside the PCIE island.
+ */
+#define NFP_CPP_PCIE_QUEUES ((uint64_t)(1ULL << 39) |  0x80000 | \
+                            ((uint64_t)0x4 & 0x3f) << 32)
+
+/* Configure a specific NFP expansion bar for accessing the vNIC rx/tx BARs */
+void
+nfp_nsp_map_queues_bar(nspu_desc_t *desc, uint64_t *pcie_offset)
+{
+       nfp_nspu_mem_bar_cfg(desc, NFP_NET_PF_HW_QUEUES_EXP_BAR, 0,
+                            NFP_CPP_PCIE_QUEUES, pcie_offset);
+
+       /* This is the pcie offset to use by the host */
+       *pcie_offset |= ((NFP_NET_PF_HW_QUEUES_EXP_BAR & 0x7) << (27 - 3));
+}
+
+int
+nfp_nsp_eth_config(nspu_desc_t *desc, int port, int up)
+{
+       union eth_table_entry *entries, *entry;
+       int modified;
+       int ret, idx;
+       int i;
+
+       idx = port;
+
+       RTE_LOG(INFO, PMD, "Hw ethernet port %d configure...\n", port);
+       rte_spinlock_lock(&desc->nsp_lock);
+       entries = malloc(NSP_ETH_TABLE_SIZE);
+       if (!entries) {
+               rte_spinlock_unlock(&desc->nsp_lock);
+               return -ENOMEM;
+       }
+
+       ret = nspu_command(desc, NSP_CMD_READ_ETH_TABLE, 1, 0, entries,
+                          NSP_ETH_TABLE_SIZE, 0);
+       if (ret) {
+               rte_spinlock_unlock(&desc->nsp_lock);
+               free(entries);
+               return ret;
+       }
+
+       entry = entries;
+
+       for (i = 0; i < NSP_ETH_MAX_COUNT; i++) {
+               /* ports in use do not appear sequentially in the table */
+               if (!(entry->port & NSP_ETH_PORT_LANES_MASK)) {
+                       /* entry not in use */
+                       entry++;
+                       continue;
+               }
+               if (idx == 0)
+                       break;
+               idx--;
+               entry++;
+       }
+
+       if (i == NSP_ETH_MAX_COUNT) {
+               rte_spinlock_unlock(&desc->nsp_lock);
+               free(entries);
+               return -EINVAL;
+       }
+
+       if (up && !(entry->state & NSP_ETH_STATE_CONFIGURED)) {
+               entry->control |= NSP_ETH_STATE_CONFIGURED;
+               modified = 1;
+       }
+
+       if (!up && (entry->state & NSP_ETH_STATE_CONFIGURED)) {
+               entry->control &= ~NSP_ETH_STATE_CONFIGURED;
+               modified = 1;
+       }
+
+       if (modified) {
+               ret = nspu_command(desc, NSP_CMD_WRITE_ETH_TABLE, 0, 1, entries,
+                                  0, NSP_ETH_TABLE_SIZE);
+               if (!ret)
+                       RTE_LOG(INFO, PMD,
+                               "Hw ethernet port %d configure done\n", port);
+               else
+                       RTE_LOG(INFO, PMD,
+                               "Hw ethernet port %d configure failed\n", port);
+       }
+       rte_spinlock_unlock(&desc->nsp_lock);
+       free(entries);
+       return ret;
+}
+
+int
+nfp_nsp_eth_read_table(nspu_desc_t *desc, union eth_table_entry **table)
+{
+       int ret;
+
+       if (!table)
+               return -EINVAL;
+
+       RTE_LOG(INFO, PMD, "Reading hw ethernet table...\n");
+
+       /* port 0 allocates the eth table and read it using NSPU */
+       *table = malloc(NSP_ETH_TABLE_SIZE);
+       if (!*table)
+               return -ENOMEM;
+
+       ret = nspu_command(desc, NSP_CMD_READ_ETH_TABLE, 1, 0, *table,
+                          NSP_ETH_TABLE_SIZE, 0);
+       if (ret)
+               return ret;
+
+       RTE_LOG(INFO, PMD, "Done\n");
+
+       return 0;
+}