memset(dev_info, 0, sizeof(struct qed_dev_info));
- if (tun->tunn_mode & OSAL_BIT(ECORE_MODE_VXLAN_TUNN) &&
- tun->tunn_clss_vxlan == ECORE_TUNN_CLSS_MAC_VLAN)
+ if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
+ tun->vxlan.b_mode_enabled)
dev_info->vxlan_enable = true;
- if (tun->tunn_mode & OSAL_BIT(ECORE_MODE_L2GRE_TUNN) &&
- tun->tunn_mode & OSAL_BIT(ECORE_MODE_IPGRE_TUNN) &&
- tun->tunn_clss_l2gre == ECORE_TUNN_CLSS_MAC_VLAN &&
- tun->tunn_clss_ipgre == ECORE_TUNN_CLSS_MAC_VLAN)
+ if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
+ tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
+ tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
dev_info->gre_enable = true;
- if (tun->tunn_mode & OSAL_BIT(ECORE_MODE_L2GENEVE_TUNN) &&
- tun->tunn_mode & OSAL_BIT(ECORE_MODE_IPGENEVE_TUNN) &&
- tun->tunn_clss_l2geneve == ECORE_TUNN_CLSS_MAC_VLAN &&
- tun->tunn_clss_ipgeneve == ECORE_TUNN_CLSS_MAC_VLAN)
+ if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
+ tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
+ tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
dev_info->geneve_enable = true;
dev_info->num_hwfns = edev->num_hwfns;