/*-
* BSD LICENSE
*
- * Copyright (c) 2015 CESNET
+ * Copyright (c) 2015 - 2016 CESNET
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#include <err.h>
#include <sys/types.h>
#include <dirent.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/mman.h>
#include <libsze2.h>
#include <rte_memcpy.h>
#include <rte_kvargs.h>
#include <rte_dev.h>
+#include <rte_atomic.h>
#include "rte_eth_szedata2.h"
*/
#define RTE_SZE2_PACKET_HEADER_SIZE_ALIGNED 8
-#define RTE_SZEDATA2_DRIVER_NAME "rte_szedata2_pmd"
+#define RTE_SZEDATA2_DRIVER_NAME net_szedata2
#define RTE_SZEDATA2_PCI_DRIVER_NAME "rte_szedata2_pmd"
#define SZEDATA2_DEV_PATH_FMT "/dev/szedataII%u"
static struct ether_addr eth_addr = {
.addr_bytes = { 0x00, 0x11, 0x17, 0x00, 0x00, 0x00 }
};
-static struct rte_eth_link pmd_link = {
- .link_speed = ETH_LINK_SPEED_10G,
- .link_duplex = ETH_LINK_FULL_DUPLEX,
- .link_status = 0
-};
static uint16_t
eth_szedata2_rx(void *queue,
goto err_tx;
}
- dev->data->dev_link.link_status = 1;
return 0;
err_tx:
for (i = 0; i < nb_rx; i++)
eth_rx_queue_stop(dev, i);
-
- dev->data->dev_link.link_status = 0;
}
static int
dev_info->max_rx_queues = internals->max_rx_queues;
dev_info->max_tx_queues = internals->max_tx_queues;
dev_info->min_rx_bufsize = 0;
+ dev_info->speed_capa = ETH_LINK_SPEED_100G;
}
static void
}
static int
-eth_link_update(struct rte_eth_dev *dev __rte_unused,
+eth_link_update(struct rte_eth_dev *dev,
int wait_to_complete __rte_unused)
{
+ struct rte_eth_link link;
+ struct rte_eth_link *link_ptr = &link;
+ struct rte_eth_link *dev_link = &dev->data->dev_link;
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+
+ switch (cgmii_link_speed(ibuf)) {
+ case SZEDATA2_LINK_SPEED_10G:
+ link.link_speed = ETH_SPEED_NUM_10G;
+ break;
+ case SZEDATA2_LINK_SPEED_40G:
+ link.link_speed = ETH_SPEED_NUM_40G;
+ break;
+ case SZEDATA2_LINK_SPEED_100G:
+ link.link_speed = ETH_SPEED_NUM_100G;
+ break;
+ default:
+ link.link_speed = ETH_SPEED_NUM_10G;
+ break;
+ }
+
+ /* szedata2 uses only full duplex */
+ link.link_duplex = ETH_LINK_FULL_DUPLEX;
+
+ link.link_status = (cgmii_ibuf_is_enabled(ibuf) &&
+ cgmii_ibuf_is_link_up(ibuf)) ? ETH_LINK_UP : ETH_LINK_DOWN;
+
+ link.link_autoneg = ETH_LINK_SPEED_FIXED;
+
+ rte_atomic64_cmpset((uint64_t *)dev_link, *(uint64_t *)dev_link,
+ *(uint64_t *)link_ptr);
+
+ return 0;
+}
+
+static int
+eth_dev_set_link_up(struct rte_eth_dev *dev)
+{
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+ volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_OBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_obuf *);
+
+ cgmii_ibuf_enable(ibuf);
+ cgmii_obuf_enable(obuf);
+ return 0;
+}
+
+static int
+eth_dev_set_link_down(struct rte_eth_dev *dev)
+{
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+ volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_OBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_obuf *);
+
+ cgmii_ibuf_disable(ibuf);
+ cgmii_obuf_disable(obuf);
return 0;
}
{
}
-static struct eth_dev_ops ops = {
- .dev_start = eth_dev_start,
- .dev_stop = eth_dev_stop,
- .dev_close = eth_dev_close,
- .dev_configure = eth_dev_configure,
- .dev_infos_get = eth_dev_info,
- .rx_queue_start = eth_rx_queue_start,
- .rx_queue_stop = eth_rx_queue_stop,
- .tx_queue_start = eth_tx_queue_start,
- .tx_queue_stop = eth_tx_queue_stop,
- .rx_queue_setup = eth_rx_queue_setup,
- .tx_queue_setup = eth_tx_queue_setup,
- .rx_queue_release = eth_rx_queue_release,
- .tx_queue_release = eth_tx_queue_release,
- .link_update = eth_link_update,
- .stats_get = eth_stats_get,
- .stats_reset = eth_stats_reset,
- .mac_addr_set = eth_mac_addr_set,
+static void
+eth_promiscuous_enable(struct rte_eth_dev *dev)
+{
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+ cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC);
+}
+
+static void
+eth_promiscuous_disable(struct rte_eth_dev *dev)
+{
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+ cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+}
+
+static void
+eth_allmulticast_enable(struct rte_eth_dev *dev)
+{
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+ cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST);
+}
+
+static void
+eth_allmulticast_disable(struct rte_eth_dev *dev)
+{
+ volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR(
+ dev, SZEDATA2_CGMII_IBUF_BASE_OFF,
+ volatile struct szedata2_cgmii_ibuf *);
+ cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID);
+}
+
+static const struct eth_dev_ops ops = {
+ .dev_start = eth_dev_start,
+ .dev_stop = eth_dev_stop,
+ .dev_set_link_up = eth_dev_set_link_up,
+ .dev_set_link_down = eth_dev_set_link_down,
+ .dev_close = eth_dev_close,
+ .dev_configure = eth_dev_configure,
+ .dev_infos_get = eth_dev_info,
+ .promiscuous_enable = eth_promiscuous_enable,
+ .promiscuous_disable = eth_promiscuous_disable,
+ .allmulticast_enable = eth_allmulticast_enable,
+ .allmulticast_disable = eth_allmulticast_disable,
+ .rx_queue_start = eth_rx_queue_start,
+ .rx_queue_stop = eth_rx_queue_stop,
+ .tx_queue_start = eth_tx_queue_start,
+ .tx_queue_stop = eth_tx_queue_stop,
+ .rx_queue_setup = eth_rx_queue_setup,
+ .tx_queue_setup = eth_tx_queue_setup,
+ .rx_queue_release = eth_rx_queue_release,
+ .tx_queue_release = eth_tx_queue_release,
+ .link_update = eth_link_update,
+ .stats_get = eth_stats_get,
+ .stats_reset = eth_stats_reset,
+ .mac_addr_set = eth_mac_addr_set,
};
/*
struct szedata *szedata_temp;
int ret;
uint32_t szedata2_index;
- struct rte_pci_addr pciaddr = dev->pci_dev->addr;
+ struct rte_pci_addr *pci_addr = &dev->pci_dev->addr;
+ struct rte_mem_resource *pci_rsc =
+ &dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER];
+ char rsc_filename[PATH_MAX];
+ void *pci_resource_ptr = NULL;
+ int fd;
RTE_LOG(INFO, PMD, "Initializing szedata2 device (" PCI_PRI_FMT ")\n",
- pciaddr.domain, pciaddr.bus, pciaddr.devid,
- pciaddr.function);
+ pci_addr->domain, pci_addr->bus, pci_addr->devid,
+ pci_addr->function);
/* Get index of szedata2 device file and create path to device file */
ret = get_szedata2_index(dev, &szedata2_index);
SZE2_DIR_TX);
szedata_close(szedata_temp);
- RTE_LOG(INFO, PMD, "Available DMA channels RX: %u, TX: %u\n",
+ RTE_LOG(INFO, PMD, "Available DMA channels RX: %u TX: %u\n",
internals->max_rx_queues, internals->max_tx_queues);
/* Set rx, tx burst functions */
rte_eth_copy_pci_info(dev, dev->pci_dev);
- data->dev_link = pmd_link;
+ /* mmap pci resource0 file to rte_mem_resource structure */
+ if (dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].phys_addr ==
+ 0) {
+ RTE_LOG(ERR, PMD, "Missing resource%u file\n",
+ PCI_RESOURCE_NUMBER);
+ return -EINVAL;
+ }
+ snprintf(rsc_filename, PATH_MAX,
+ "%s/" PCI_PRI_FMT "/resource%u", pci_get_sysfs_path(),
+ pci_addr->domain, pci_addr->bus,
+ pci_addr->devid, pci_addr->function, PCI_RESOURCE_NUMBER);
+ fd = open(rsc_filename, O_RDWR);
+ if (fd < 0) {
+ RTE_LOG(ERR, PMD, "Could not open file %s\n", rsc_filename);
+ return -EINVAL;
+ }
+ pci_resource_ptr = mmap(0,
+ dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len,
+ PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
+ close(fd);
+ if (pci_resource_ptr == NULL) {
+ RTE_LOG(ERR, PMD, "Could not mmap file %s (fd = %d)\n",
+ rsc_filename, fd);
+ return -EINVAL;
+ }
+ dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr =
+ pci_resource_ptr;
+
+ RTE_LOG(DEBUG, PMD, "resource%u phys_addr = 0x%llx len = %llu "
+ "virt addr = %llx\n", PCI_RESOURCE_NUMBER,
+ (unsigned long long)pci_rsc->phys_addr,
+ (unsigned long long)pci_rsc->len,
+ (unsigned long long)pci_rsc->addr);
+
+ /* Get link state */
+ eth_link_update(dev, 0);
+
+ /* Allocate space for one mac address */
data->mac_addrs = rte_zmalloc(data->name, sizeof(struct ether_addr),
RTE_CACHE_LINE_SIZE);
if (data->mac_addrs == NULL) {
RTE_LOG(ERR, PMD, "Could not alloc space for MAC address!\n");
+ munmap(dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr,
+ dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len);
return -EINVAL;
}
ether_addr_copy(ð_addr, data->mac_addrs);
+ /* At initial state COMBO card is in promiscuous mode so disable it */
+ eth_promiscuous_disable(dev);
+
+ RTE_LOG(INFO, PMD, "szedata2 device ("
+ PCI_PRI_FMT ") successfully initialized\n",
+ pci_addr->domain, pci_addr->bus, pci_addr->devid,
+ pci_addr->function);
+
return 0;
}
static int
rte_szedata2_eth_dev_uninit(struct rte_eth_dev *dev)
{
+ struct rte_pci_addr *pci_addr = &dev->pci_dev->addr;
+
rte_free(dev->data->mac_addrs);
dev->data->mac_addrs = NULL;
+ munmap(dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr,
+ dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len);
+
+ RTE_LOG(INFO, PMD, "szedata2 device ("
+ PCI_PRI_FMT ") successfully uninitialized\n",
+ pci_addr->domain, pci_addr->bus, pci_addr->devid,
+ pci_addr->function);
+
return 0;
}
static struct eth_driver szedata2_eth_driver = {
.pci_drv = {
- .name = RTE_SZEDATA2_PCI_DRIVER_NAME,
.id_table = rte_szedata2_pci_id_table,
+ .probe = rte_eth_dev_pci_probe,
+ .remove = rte_eth_dev_pci_remove,
},
.eth_dev_init = rte_szedata2_eth_dev_init,
.eth_dev_uninit = rte_szedata2_eth_dev_uninit,
.dev_private_size = sizeof(struct pmd_internals),
};
-static int
-rte_szedata2_init(const char *name __rte_unused,
- const char *args __rte_unused)
-{
- rte_eth_driver_register(&szedata2_eth_driver);
- return 0;
-}
-
-static int
-rte_szedata2_uninit(const char *name __rte_unused)
-{
- return 0;
-}
-
-static struct rte_driver rte_szedata2_driver = {
- .type = PMD_PDEV,
- .name = RTE_SZEDATA2_DRIVER_NAME,
- .init = rte_szedata2_init,
- .uninit = rte_szedata2_uninit,
-};
-
-PMD_REGISTER_DRIVER(rte_szedata2_driver);
+RTE_PMD_REGISTER_PCI(RTE_SZEDATA2_DRIVER_NAME, szedata2_eth_driver.pci_drv);
+RTE_PMD_REGISTER_PCI_TABLE(RTE_SZEDATA2_DRIVER_NAME, rte_szedata2_pci_id_table);
+RTE_PMD_REGISTER_KMOD_DEP(RTE_SZEDATA2_DRIVER_NAME,
+ "* combo6core & combov3 & szedata2 & szedata2_cv3");
git.droids-corp.org / dpdk.git / blobdiff