#define VMXNET3_RX_OFFLOAD_CAP \
(DEV_RX_OFFLOAD_VLAN_STRIP | \
+ DEV_RX_OFFLOAD_VLAN_FILTER | \
DEV_RX_OFFLOAD_SCATTER | \
DEV_RX_OFFLOAD_IPV4_CKSUM | \
DEV_RX_OFFLOAD_UDP_CKSUM | \
uint16_t vid, int on);
static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
- struct ether_addr *mac_addr);
+ struct rte_ether_addr *mac_addr);
static void vmxnet3_interrupt_handler(void *param);
int vmxnet3_logtype_init;
ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
- if (ver & (1 << VMXNET3_REV_3)) {
+ if (ver & (1 << VMXNET3_REV_4)) {
+ VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
+ 1 << VMXNET3_REV_4);
+ hw->version = VMXNET3_REV_4 + 1;
+ } else if (ver & (1 << VMXNET3_REV_3)) {
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
1 << VMXNET3_REV_3);
hw->version = VMXNET3_REV_3 + 1;
return -ENOMEM;
}
/* Copy the permanent MAC address */
- ether_addr_copy((struct ether_addr *) hw->perm_addr,
+ ether_addr_copy((struct rte_ether_addr *)hw->perm_addr,
ð_dev->data->mac_addrs[0]);
PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
+ /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
+
/* Put device in Quiesce Mode */
VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
}
+ if (VMXNET3_VERSION_GE_4(hw)) {
+ /* Check for additional RSS */
+ ret = vmxnet3_v4_rss_configure(dev);
+ if (ret != VMXNET3_SUCCESS) {
+ PMD_INIT_LOG(ERR, "Failed to configure v4 RSS");
+ return ret;
+ }
+ }
+
/* Disable interrupts */
vmxnet3_disable_intr(hw);
vmxnet3_dev_stop(dev);
vmxnet3_free_queues(dev);
-
- /*
- * flag to rte_eth_dev_close() that it should release the port resources
- * (calling rte_eth_dev_release_port()) in addition to closing it.
- */
- dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
}
static void
vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
struct rte_eth_dev_info *dev_info)
{
+ struct vmxnet3_hw *hw = dev->data->dev_private;
+
dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
+ if (VMXNET3_VERSION_GE_4(hw)) {
+ dev_info->flow_type_rss_offloads |= VMXNET3_V4_RSS_MASK;
+ }
+
dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
.nb_max = VMXNET3_RX_RING_MAX_SIZE,
.nb_min = VMXNET3_DEF_RX_RING_SIZE,
}
static int
-vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
+vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr)
{
struct vmxnet3_hw *hw = dev->data->dev_private;
- ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
+ ether_addr_copy(mac_addr, (struct rte_ether_addr *)(hw->perm_addr));
vmxnet3_write_mac(hw, mac_addr->addr_bytes);
return 0;
}