/*-
* BSD LICENSE
*
- * Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
+ * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
#define MAX_RX_QUEUE_PER_LCORE 16
#define MAX_TX_QUEUE_PER_PORT 16
struct lcore_queue_conf {
- unsigned n_rx_queue;
- unsigned rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
+ unsigned n_rx_port;
+ unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
unsigned tx_queue_id;
struct mbuf_table tx_mbufs[LSI_MAX_PORTS];
.hw_strip_crc = 0, /**< CRC stripped by hardware */
},
.txmode = {
+ .mq_mode = ETH_DCB_NONE,
},
.intr_conf = {
.lsc = 1, /**< lsc interrupt feature enabled */
eth = rte_pktmbuf_mtod(m, struct ether_hdr *);
- /* 00:09:c0:00:00:xx */
+ /* 02:00:00:00:00:xx */
tmp = ð->d_addr.addr_bytes[0];
- *((uint64_t *)tmp) = 0x000000c00900 + (dst_port << 24);
+ *((uint64_t *)tmp) = 0x000000000002 + ((uint64_t)dst_port << 40);
/* src addr */
ether_addr_copy(&lsi_ports_eth_addr[dst_port], ð->s_addr);
lcore_id = rte_lcore_id();
qconf = &lcore_queue_conf[lcore_id];
- if (qconf->n_rx_queue == 0) {
+ if (qconf->n_rx_port == 0) {
RTE_LOG(INFO, LSI, "lcore %u has nothing to do\n", lcore_id);
while(1);
}
RTE_LOG(INFO, LSI, "entering main loop on lcore %u\n", lcore_id);
- for (i = 0; i < qconf->n_rx_queue; i++) {
+ for (i = 0; i < qconf->n_rx_port; i++) {
- portid = qconf->rx_queue_list[i];
+ portid = qconf->rx_port_list[i];
RTE_LOG(INFO, LSI, " -- lcoreid=%u portid=%u\n", lcore_id,
portid);
}
/*
* Read packet from RX queues
*/
- for (i = 0; i < qconf->n_rx_queue; i++) {
+ for (i = 0; i < qconf->n_rx_port; i++) {
- portid = qconf->rx_queue_list[i];
+ portid = qconf->rx_port_list[i];
nb_rx = rte_eth_rx_burst((uint8_t) portid, 0,
pkts_burst, MAX_PKT_BURST);
printf("\n\nIn registered callback...\n");
printf("Event type: %s\n", type == RTE_ETH_EVENT_INTR_LSC ? "LSC interrupt" : "unknown event");
- rte_eth_link_get(port_id, &link);
+ rte_eth_link_get_nowait(port_id, &link);
if (link.link_status) {
printf("Port %d Link Up - speed %u Mbps - %s\n\n",
port_id, (unsigned)link.link_speed,
printf("Port %d Link Down\n\n", port_id);
}
+/* Check the link status of all ports in up to 9s, and print them finally */
+static void
+check_all_ports_link_status(uint8_t port_num, uint32_t port_mask)
+{
+#define CHECK_INTERVAL 100 /* 100ms */
+#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */
+ uint8_t portid, count, all_ports_up, print_flag = 0;
+ struct rte_eth_link link;
+
+ printf("\nChecking link status");
+ fflush(stdout);
+ for (count = 0; count <= MAX_CHECK_TIME; count++) {
+ all_ports_up = 1;
+ for (portid = 0; portid < port_num; portid++) {
+ if ((port_mask & (1 << portid)) == 0)
+ continue;
+ memset(&link, 0, sizeof(link));
+ rte_eth_link_get_nowait(portid, &link);
+ /* print link status if flag set */
+ if (print_flag == 1) {
+ if (link.link_status)
+ printf("Port %d Link Up - speed %u "
+ "Mbps - %s\n", (uint8_t)portid,
+ (unsigned)link.link_speed,
+ (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
+ ("full-duplex") : ("half-duplex\n"));
+ else
+ printf("Port %d Link Down\n",
+ (uint8_t)portid);
+ continue;
+ }
+ /* clear all_ports_up flag if any link down */
+ if (link.link_status == 0) {
+ all_ports_up = 0;
+ break;
+ }
+ }
+ /* after finally printing all link status, get out */
+ if (print_flag == 1)
+ break;
+
+ if (all_ports_up == 0) {
+ printf(".");
+ fflush(stdout);
+ rte_delay_ms(CHECK_INTERVAL);
+ }
+
+ /* set the print_flag if all ports up or timeout */
+ if (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {
+ print_flag = 1;
+ printf("done\n");
+ }
+ }
+}
+
int
MAIN(int argc, char **argv)
{
struct lcore_queue_conf *qconf;
struct rte_eth_dev_info dev_info;
- struct rte_eth_link link;
int ret;
- unsigned int nb_ports, nb_lcores;
- unsigned portid, portid_last = 0, queueid = 0;
+ unsigned int nb_ports;
+ unsigned portid, portid_last = 0;
unsigned lcore_id, rx_lcore_id;
- unsigned n_tx_queue, max_tx_queues;
unsigned nb_ports_in_mask = 0;
/* init EAL */
rte_panic("Cannot init mbuf pool\n");
/* init driver(s) */
-#ifdef RTE_LIBRTE_IGB_PMD
- if (rte_igb_pmd_init() < 0)
- rte_panic("Cannot init igb pmd\n");
-#endif
-#ifdef RTE_LIBRTE_IXGBE_PMD
- if (rte_ixgbe_pmd_init() < 0)
- rte_panic("Cannot init ixgbe pmd\n");
-#endif
+ if (rte_pmd_init_all() < 0)
+ rte_panic("Cannot init pmd\n");
if (rte_eal_pci_probe() < 0)
rte_panic("Cannot probe PCI\n");
if (nb_ports > LSI_MAX_PORTS)
nb_ports = LSI_MAX_PORTS;
- nb_lcores = rte_lcore_count();
-
/*
* Each logical core is assigned a dedicated TX queue on each port.
- * Compute the maximum number of TX queues that can be used.
*/
- max_tx_queues = nb_lcores;
for (portid = 0; portid < nb_ports; portid++) {
/* skip ports that are not enabled */
if ((lsi_enabled_port_mask & (1 << portid)) == 0)
nb_ports_in_mask++;
rte_eth_dev_info_get((uint8_t) portid, &dev_info);
- if (max_tx_queues > dev_info.max_tx_queues)
- max_tx_queues = dev_info.max_tx_queues;
}
-
if (nb_ports_in_mask < 2 || nb_ports_in_mask % 2)
rte_exit(EXIT_FAILURE, "Current enabled port number is %u, "
"but it should be even and at least 2\n",
rx_lcore_id = 0;
qconf = &lcore_queue_conf[rx_lcore_id];
- qconf->tx_queue_id = 0;
- n_tx_queue = 1;
/* Initialize the port/queue configuration of each logical core */
for (portid = 0; portid < nb_ports; portid++) {
/* get the lcore_id for this port */
while (rte_lcore_is_enabled(rx_lcore_id) == 0 ||
- lcore_queue_conf[rx_lcore_id].n_rx_queue ==
+ lcore_queue_conf[rx_lcore_id].n_rx_port ==
lsi_rx_queue_per_lcore) {
rx_lcore_id++;
if (rx_lcore_id >= RTE_MAX_LCORE)
rte_exit(EXIT_FAILURE, "Not enough cores\n");
- if (n_tx_queue == max_tx_queues)
- rte_exit(EXIT_FAILURE, "Not enough TX queues\n");
}
- if (qconf != &lcore_queue_conf[rx_lcore_id]) {
+ if (qconf != &lcore_queue_conf[rx_lcore_id])
/* Assigned a new logical core in the loop above. */
qconf = &lcore_queue_conf[rx_lcore_id];
- qconf->tx_queue_id = n_tx_queue;
- n_tx_queue++;
- }
- qconf->rx_queue_list[qconf->n_rx_queue] = portid;
- qconf->n_rx_queue++;
- printf("Lcore %u: RX port %u TX queue %u\n",
- rx_lcore_id, portid, qconf->tx_queue_id);
+
+ qconf->rx_port_list[qconf->n_rx_port] = portid;
+ qconf->n_rx_port++;
+ printf("Lcore %u: RX port %u\n",rx_lcore_id, portid);
}
/* Initialise each port */
for (portid = 0; portid < nb_ports; portid++) {
-
/* skip ports that are not enabled */
if ((lsi_enabled_port_mask & (1 << portid)) == 0) {
printf("Skipping disabled port %u\n", portid);
/* init port */
printf("Initializing port %u... ", portid);
fflush(stdout);
- ret = rte_eth_dev_configure((uint8_t) portid, 1,
- (uint16_t) n_tx_queue, &port_conf);
+ ret = rte_eth_dev_configure((uint8_t) portid, 1, 1, &port_conf);
if (ret < 0)
rte_exit(EXIT_FAILURE, "Cannot configure device: err=%d, port=%u\n",
ret, portid);
ret, portid);
/* init one TX queue logical core on each port */
- for (queueid = 0; queueid < n_tx_queue; queueid++) {
- fflush(stdout);
- ret = rte_eth_tx_queue_setup((uint8_t) portid,
- (uint16_t) queueid, nb_txd,
- SOCKET0, &tx_conf);
- if (ret < 0)
- rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d, "
- "port=%u queue=%u\n",
- ret, portid, queueid);
- }
+ fflush(stdout);
+ ret = rte_eth_tx_queue_setup((uint8_t) portid, 0, nb_txd,
+ SOCKET0, &tx_conf);
+ if (ret < 0)
+ rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: err=%d,port=%u\n",
+ ret, portid);
/* Start device */
ret = rte_eth_dev_start((uint8_t) portid);
if (ret < 0)
rte_exit(EXIT_FAILURE, "rte_eth_dev_start: err=%d, port=%u\n",
ret, portid);
-
- printf("done: ");
-
- /* get link status */
- rte_eth_link_get((uint8_t) portid, &link);
- if (link.link_status) {
- printf(" Link Up - speed %u Mbps - %s\n",
- (unsigned) link.link_speed,
- (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
- ("full-duplex") : ("half-duplex\n"));
- } else {
- printf(" Link Down\n");
- }
+ printf("done:\n");
printf("Port %u, MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n\n",
portid,
memset(&port_statistics, 0, sizeof(port_statistics));
}
+ check_all_ports_link_status((uint8_t)nb_ports, lsi_enabled_port_mask);
+
/* launch per-lcore init on every lcore */
rte_eal_mp_remote_launch(lsi_launch_one_lcore, NULL, CALL_MASTER);
RTE_LCORE_FOREACH_SLAVE(lcore_id) {
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