/*-
* BSD LICENSE
- *
- * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
* All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
* are met:
- *
- * * Redistributions of source code must retain the above copyright
+ *
+ * * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
* distribution.
- * * Neither the name of Intel Corporation nor the names of its
- * contributors may be used to endorse or promote products derived
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
*/
#include <sys/queue.h>
-#include <endian.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "e1000_logs.h"
#include "e1000/e1000_api.h"
#include "e1000_ethdev.h"
+#include "e1000/e1000_osdep.h"
#define E1000_TXD_VLAN_SHIFT 16
volatile struct e1000_rx_desc *rx_ring; /**< RX ring virtual address. */
uint64_t rx_ring_phys_addr; /**< RX ring DMA address. */
volatile uint32_t *rdt_reg_addr; /**< RDT register address. */
+ volatile uint32_t *rdh_reg_addr; /**< RDH register address. */
struct em_rx_entry *sw_ring; /**< address of RX software ring. */
struct rte_mbuf *pkt_first_seg; /**< First segment of current packet. */
struct rte_mbuf *pkt_last_seg; /**< Last segment of current packet. */
cmd_len = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_C;
l2len = hdrlen.f.l2_len;
- ipcse = l2len + hdrlen.f.l3_len;
+ ipcse = (uint16_t)(l2len + hdrlen.f.l3_len);
/* setup IPCS* fields */
- ctx.lower_setup.ip_fields.ipcss = l2len;
- ctx.lower_setup.ip_fields.ipcso =l2len +
- offsetof(struct ipv4_hdr, hdr_checksum);
+ ctx.lower_setup.ip_fields.ipcss = (uint8_t)l2len;
+ ctx.lower_setup.ip_fields.ipcso = (uint8_t)(l2len +
+ offsetof(struct ipv4_hdr, hdr_checksum));
/*
* When doing checksum or TCP segmentation with IPv6 headers,
* IPCSE field should be set t0 0.
*/
if (flags & PKT_TX_IP_CKSUM) {
- ctx.lower_setup.ip_fields.ipcse = rte_cpu_to_le_16(ipcse - 1);
+ ctx.lower_setup.ip_fields.ipcse =
+ (uint16_t)rte_cpu_to_le_16(ipcse - 1);
cmd_len |= E1000_TXD_CMD_IP;
cmp_mask |= TX_MACIP_LEN_CMP_MASK;
} else {
}
/* setup TUCS* fields */
- ctx.upper_setup.tcp_fields.tucss = ipcse;
+ ctx.upper_setup.tcp_fields.tucss = (uint8_t)ipcse;
ctx.upper_setup.tcp_fields.tucse = 0;
switch (flags & PKT_TX_L4_MASK) {
case PKT_TX_UDP_CKSUM:
- ctx.upper_setup.tcp_fields.tucso = ipcse +
- offsetof(struct udp_hdr, dgram_cksum);
+ ctx.upper_setup.tcp_fields.tucso = (uint8_t)(ipcse +
+ offsetof(struct udp_hdr, dgram_cksum));
cmp_mask |= TX_MACIP_LEN_CMP_MASK;
break;
case PKT_TX_TCP_CKSUM:
- ctx.upper_setup.tcp_fields.tucso = ipcse +
- offsetof(struct tcp_hdr, cksum);
+ ctx.upper_setup.tcp_fields.tucso = (uint8_t)(ipcse +
+ offsetof(struct tcp_hdr, cksum));
cmd_len |= E1000_TXD_CMD_TCP;
cmp_mask |= TX_MACIP_LEN_CMP_MASK;
break;
uint16_t nb_tx_to_clean;
/* Determine the last descriptor needing to be cleaned */
- desc_to_clean_to = last_desc_cleaned + txq->tx_rs_thresh;
+ desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh);
if (desc_to_clean_to >= nb_tx_desc)
- desc_to_clean_to = desc_to_clean_to - nb_tx_desc;
+ desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc);
/* Check to make sure the last descriptor to clean is done */
desc_to_clean_to = sw_ring[desc_to_clean_to].last_id;
/* Figure out how many descriptors will be cleaned */
if (last_desc_cleaned > desc_to_clean_to)
- nb_tx_to_clean = ((nb_tx_desc - last_desc_cleaned) +
- desc_to_clean_to);
+ nb_tx_to_clean = (uint16_t)((nb_tx_desc - last_desc_cleaned) +
+ desc_to_clean_to);
else
- nb_tx_to_clean = desc_to_clean_to - last_desc_cleaned;
+ nb_tx_to_clean = (uint16_t)(desc_to_clean_to -
+ last_desc_cleaned);
PMD_TX_FREE_LOG(DEBUG,
"Cleaning %4u TX descriptors: %4u to %4u "
/* Update the txq to reflect the last descriptor that was cleaned */
txq->last_desc_cleaned = desc_to_clean_to;
- txq->nb_tx_free += nb_tx_to_clean;
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean);
/* No Error */
return (0);
ol_flags = tx_pkt->ol_flags;
/* If hardware offload required */
- tx_ol_req = ol_flags & (PKT_TX_IP_CKSUM | PKT_TX_L4_MASK);
+ tx_ol_req = (uint16_t)(ol_flags & (PKT_TX_IP_CKSUM |
+ PKT_TX_L4_MASK));
if (tx_ol_req) {
hdrlen = tx_pkt->pkt.vlan_macip;
/* If new context to be built or reuse the exist ctx. */
* This will always be the number of segments + the number of
* Context descriptors required to transmit the packet
*/
- nb_used = tx_pkt->pkt.nb_segs + new_ctx;
+ nb_used = (uint16_t)(tx_pkt->pkt.nb_segs + new_ctx);
/*
* The number of descriptors that must be allocated for a
* The last packet data descriptor needs End Of Packet (EOP)
*/
cmd_type_len |= E1000_TXD_CMD_EOP;
- txq->nb_tx_used += nb_used;
- txq->nb_tx_free -= nb_used;
+ txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used);
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used);
/* Set RS bit only on threshold packets' last descriptor */
if (txq->nb_tx_used >= txq->tx_rs_thresh) {
uint16_t pkt_flags;
/* Check if VLAN present */
- pkt_flags = (uint16_t) (rx_status & E1000_RXD_STAT_VP) ?
- PKT_RX_VLAN_PKT : 0;
+ pkt_flags = (uint16_t)((rx_status & E1000_RXD_STAT_VP) ?
+ PKT_RX_VLAN_PKT : 0);
return pkt_flags;
}
rxm->pkt.in_port = rxq->port_id;
rxm->ol_flags = rx_desc_status_to_pkt_flags(status);
- rxm->ol_flags |= rx_desc_error_to_pkt_flags(rxd.errors);
+ rxm->ol_flags = (uint16_t)(rxm->ol_flags |
+ rx_desc_error_to_pkt_flags(rxd.errors));
/* Only valid if PKT_RX_VLAN_PKT set in pkt_flags */
rxm->pkt.vlan_macip.f.vlan_tci = rte_le_to_cpu_16(rxd.special);
first_seg->pkt.in_port = rxq->port_id;
first_seg->ol_flags = rx_desc_status_to_pkt_flags(status);
- first_seg->ol_flags |= rx_desc_error_to_pkt_flags(rxd.errors);
+ first_seg->ol_flags = (uint16_t)(first_seg->ol_flags |
+ rx_desc_error_to_pkt_flags(rxd.errors));
/* Only valid if PKT_RX_VLAN_PKT set in pkt_flags */
rxm->pkt.vlan_macip.f.vlan_tci = rte_le_to_cpu_16(rxd.special);
if ((mz = rte_memzone_lookup(z_name)) != 0)
return (mz);
- return rte_memzone_reserve(z_name, (uint64_t) ring_size, socket_id, 0);
+#ifdef RTE_LIBRTE_XEN_DOM0
+ return rte_memzone_reserve_bounded(z_name, ring_size,
+ socket_id, 0, CACHE_LINE_SIZE, RTE_PGSIZE_2M);
+#else
+ return rte_memzone_reserve(z_name, ring_size, socket_id, 0);
+#endif
}
static void
tx_free_thresh = tx_conf->tx_free_thresh;
if (tx_free_thresh == 0)
- tx_free_thresh = RTE_MIN(nb_desc / 4, DEFAULT_TX_FREE_THRESH);
+ tx_free_thresh = (uint16_t)RTE_MIN(nb_desc / 4,
+ DEFAULT_TX_FREE_THRESH);
tx_rs_thresh = tx_conf->tx_rs_thresh;
if (tx_rs_thresh == 0)
- tx_rs_thresh = RTE_MIN(tx_free_thresh, DEFAULT_TX_RS_THRESH);
+ tx_rs_thresh = (uint16_t)RTE_MIN(tx_free_thresh,
+ DEFAULT_TX_RS_THRESH);
if (tx_free_thresh >= (nb_desc - 3)) {
- RTE_LOG(ERR, PMD,
- "tx_free_thresh must be less than the "
- "number of TX descriptors minus 3. "
- "(tx_free_thresh=%u port=%d queue=%d)\n",
- tx_free_thresh, dev->data->port_id, queue_idx);
+ RTE_LOG(ERR, PMD, "tx_free_thresh must be less than the "
+ "number of TX descriptors minus 3. (tx_free_thresh=%u "
+ "port=%d queue=%d)\n", (unsigned int)tx_free_thresh,
+ (int)dev->data->port_id, (int)queue_idx);
return -(EINVAL);
}
if (tx_rs_thresh > tx_free_thresh) {
- RTE_LOG(ERR, PMD,
- "tx_rs_thresh must be less than or equal to "
- "tx_free_thresh. "
- "(tx_free_thresh=%u tx_rs_thresh=%u "
- "port=%d queue=%d)\n",
- tx_free_thresh, tx_rs_thresh, dev->data->port_id,
- queue_idx);
+ RTE_LOG(ERR, PMD, "tx_rs_thresh must be less than or equal to "
+ "tx_free_thresh. (tx_free_thresh=%u tx_rs_thresh=%u "
+ "port=%d queue=%d)\n", (unsigned int)tx_free_thresh,
+ (unsigned int)tx_rs_thresh, (int)dev->data->port_id,
+ (int)queue_idx);
return -(EINVAL);
}
* accumulates WTHRESH descriptors.
*/
if (tx_conf->tx_thresh.wthresh != 0 && tx_rs_thresh != 1) {
- RTE_LOG(ERR, PMD,
- "TX WTHRESH must be set to 0 if "
- "tx_rs_thresh is greater than 1. "
- "(tx_rs_thresh=%u port=%d queue=%d)\n",
- tx_rs_thresh, dev->data->port_id, queue_idx);
+ RTE_LOG(ERR, PMD, "TX WTHRESH must be set to 0 if "
+ "tx_rs_thresh is greater than 1. (tx_rs_thresh=%u "
+ "port=%d queue=%d)\n", (unsigned int)tx_rs_thresh,
+ (int)dev->data->port_id, (int)queue_idx);
return -(EINVAL);
}
txq->port_id = dev->data->port_id;
txq->tdt_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_TDT(queue_idx));
+#ifndef RTE_LIBRTE_XEN_DOM0
txq->tx_ring_phys_addr = (uint64_t) tz->phys_addr;
+#else
+ txq->tx_ring_phys_addr = rte_mem_phy2mch(tz->memseg_id, tz->phys_addr);
+#endif
txq->tx_ring = (struct e1000_data_desc *) tz->addr;
PMD_INIT_LOG(DEBUG, "sw_ring=%p hw_ring=%p dma_addr=0x%"PRIx64"\n",
0 : ETHER_CRC_LEN);
rxq->rdt_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_RDT(queue_idx));
+ rxq->rdh_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_RDH(queue_idx));
+#ifndef RTE_LIBRTE_XEN_DOM0
rxq->rx_ring_phys_addr = (uint64_t) rz->phys_addr;
+#else
+ rxq->rx_ring_phys_addr = rte_mem_phy2mch(rz->memseg_id, rz->phys_addr);
+#endif
rxq->rx_ring = (struct e1000_rx_desc *) rz->addr;
PMD_INIT_LOG(DEBUG, "sw_ring=%p hw_ring=%p dma_addr=0x%"PRIx64"\n",
return (0);
}
+uint32_t
+eth_em_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+#define EM_RXQ_SCAN_INTERVAL 4
+ volatile struct e1000_rx_desc *rxdp;
+ struct em_rx_queue *rxq;
+ uint32_t desc = 0;
+
+ if (rx_queue_id >= dev->data->nb_rx_queues) {
+ PMD_RX_LOG(DEBUG,"Invalid RX queue_id=%d\n", rx_queue_id);
+ return 0;
+ }
+
+ rxq = dev->data->rx_queues[rx_queue_id];
+ rxdp = &(rxq->rx_ring[rxq->rx_tail]);
+
+ while ((desc < rxq->nb_rx_desc) &&
+ (rxdp->status & E1000_RXD_STAT_DD)) {
+ desc += EM_RXQ_SCAN_INTERVAL;
+ rxdp += EM_RXQ_SCAN_INTERVAL;
+ if (rxq->rx_tail + desc >= rxq->nb_rx_desc)
+ rxdp = &(rxq->rx_ring[rxq->rx_tail +
+ desc - rxq->nb_rx_desc]);
+ }
+
+ return desc;
+}
+
+int
+eth_em_rx_descriptor_done(void *rx_queue, uint16_t offset)
+{
+ volatile struct e1000_rx_desc *rxdp;
+ struct em_rx_queue *rxq = rx_queue;
+ uint32_t desc;
+
+ if (unlikely(offset >= rxq->nb_rx_desc))
+ return 0;
+ desc = rxq->rx_tail + offset;
+ if (desc >= rxq->nb_rx_desc)
+ desc -= rxq->nb_rx_desc;
+
+ rxdp = &rxq->rx_ring[desc];
+ return !!(rxdp->status & E1000_RXD_STAT_DD);
+}
+
void
em_dev_clear_queues(struct rte_eth_dev *dev)
{
* Returns (BSIZE | BSEX | FLXBUF) fields of RCTL register.
*/
static uint32_t
-em_rctl_bsize(enum e1000_mac_type hwtyp, uint32_t *bufsz)
+em_rctl_bsize(__rte_unused enum e1000_mac_type hwtyp, uint32_t *bufsz)
{
/*
* For BSIZE & BSEX all configurable sizes are:
* limit for packet length, jumbo frame of any size
* can be accepted, thus we have to enable scattered
* rx if jumbo frames are enabled (or if buffer size
- * is too small to accomodate non-jumbo packets)
+ * is too small to accommodate non-jumbo packets)
* to avoid splitting packets that don't fit into
* one buffer.
*/
git.droids-corp.org / dpdk.git / blobdiff