net/ena/base: align IO CQ allocation to 4K
authorMichal Krawczyk <mk@semihalf.com>
Fri, 30 Oct 2020 11:31:19 +0000 (12:31 +0100)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 3 Nov 2020 22:35:06 +0000 (23:35 +0100)
commit4be6bc7fa13d2ea52a07c8423a09cfda17b5691c
tree739ef988dfd3f0d4838663975cdd45e6efc8648e
parentf7138b91f80020d634248712bea1470a6c3a36f4
net/ena/base: align IO CQ allocation to 4K

Latest generation HW requires IO completion queue descriptors to be
aligned to a 4K in order to achieve the best performance.

Because of that, the new allocation macros were added, which allows
driver to allocate the memory with specified alignment.

The previous allocation macros are now wrappers around the macros
doing the alignment, with the alignment value equal to cacheline size.

Fixes: b68309be44c0 ("net/ena/base: update communication layer for the ENAv2")
Cc: stable@dpdk.org
Signed-off-by: Ido Segev <idose@amazon.com>
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Amit Bernstein <amitbern@amazon.com>
drivers/net/ena/base/ena_com.c
drivers/net/ena/base/ena_com.h
drivers/net/ena/base/ena_plat_dpdk.h