net/memif: optimize with one-way barrier
authorPhil Yang <phil.yang@arm.com>
Mon, 26 Aug 2019 11:00:14 +0000 (19:00 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 23 Oct 2019 14:43:09 +0000 (16:43 +0200)
commita2aafb9aa6517160a2621e2140e36d67326190d5
treef5641e159790a509d3adc0241e99098567bce913
parent2b5243d796f996350f3633d998db8becf1f916f0
net/memif: optimize with one-way barrier

Using 'rte_mb' to synchronize the shared ring head/tail between producer
and consumer will stall the pipeline and damage performance on the weak
memory model platforms, such like aarch64. Meanwhile update the shared
ring head and tail are observable and ordered between CPUs on IA.

Optimized this full barrier with the one-way barrier can improve the
throughput. On aarch64 n1sdp server this patch make testpmd throughput
boost 2.1%. On Intel E5-2640, testpmd got 3.98% performance gain.

Signed-off-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
drivers/net/memif/memif.h
drivers/net/memif/rte_eth_memif.c