port: add reassembly stats
authorMaciej Gajdzica <maciejx.t.gajdzica@intel.com>
Fri, 19 Jun 2015 09:41:18 +0000 (11:41 +0200)
committerThomas Monjalon <thomas.monjalon@6wind.com>
Tue, 23 Jun 2015 21:31:14 +0000 (23:31 +0200)
commitb42ed36368ce79089fb275076fefbc2be3ee03c7
treee1afe106034284742b02c8e4aa625be809262a0a
parenta2ba0b9fe8f744570592eb85825e87f5afd71e8f
port: add reassembly stats

Added statistics for IPv4 and IPv6 reassembly ports.

Signed-off-by: Maciej Gajdzica <maciejx.t.gajdzica@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
lib/librte_port/rte_port_ras.c