raw/ifpga/base: fix NIOS SPI init
authorTianfei Zhang <tianfei.zhang@intel.com>
Tue, 14 Jul 2020 21:35:09 +0000 (05:35 +0800)
committerThomas Monjalon <thomas@monjalon.net>
Tue, 21 Jul 2020 22:42:11 +0000 (00:42 +0200)
commitcbcf2263fb9514dfc207906f95b02bc4e32dcca5
tree309c81318cbe158a075f0e69bd7038ea5d6cb71d
parent6f583cd8b01b5b6568668ce8efb78d3eaaa55b61
raw/ifpga/base: fix NIOS SPI init

Add fecmode setting on NIOS SPI primary initialization.
this SPI is shared by NIOS core inside FPGA, NIOS will
use this SPI primary to do some one-time initialization
after power up, and then release the control to DPDK.

Fix the timeout initialization for polling the
NIOS_INIT_DONE.

Fixes: bc44402f ("raw/ifpga/base: configure FEC mode")
Cc: stable@dpdk.org
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
drivers/raw/ifpga/base/ifpga_fme.c
drivers/raw/ifpga/base/opae_spi.h