net/mlx5: replace memory barrier type
authorShahaf Shuler <shahafs@mellanox.com>
Sun, 27 Aug 2017 06:47:08 +0000 (09:47 +0300)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 6 Oct 2017 00:49:47 +0000 (02:49 +0200)
commitf9fbd2b3ad227555cd7ba06ccbb8b23ae577b89b
tree87514cf0fb21b9bc7e5007d5f3f3336bc494c6ad
parentef86e67ad5d873573882e19d92a206a842d22927
net/mlx5: replace memory barrier type

The reason for the requirement of a barrier between the txq writes
and the doorbell record writes is to avoid a case where the device
reads the doorbell record's new value before the txq writes are flushed
to memory.

The current use of rte_wmb is not necessary, and can be replaced by
rte_io_wmb which is more relaxed.

Replacing the rte_wmb is also expected to improve the throughput.

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Alexander Solganik <solganik@gmail.com>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
drivers/net/mlx5/mlx5_rxtx.h