dpdk.git
6 years agonet/mlx4: fix Rx interrupts management
Adrien Mazarguil [Wed, 14 Jun 2017 11:49:13 +0000 (13:49 +0200)]
net/mlx4: fix Rx interrupts management

This commit addresses various issues that may lead to undefined behavior
when configuring Rx interrupts.

While failure to create a Rx queue completion channel in rxq_setup()
prevents that queue from being created, existing queues still have theirs.
Since the error handler disables dev_conf.intr_conf.rxq as well, subsequent
calls to rxq_setup() create Rx queues without interrupts. This leads to a
scenario where not all Rx queues support interrupts; missing checks on the
presence of completion channels may crash the application.

Considering that the PMD is not supposed to disable user-provided
configuration parameters (dev_conf.intr_conf.rxq), and that these can
change for subsequent rxq_setup() calls anyway, properly supporting a mixed
mode where not all Rx queues have interrupts enabled is a better approach.

To do so with a minimum set of changes, priv_intr_efd_enable() and
priv_create_intr_vec() are first refactored as a single
priv_rx_intr_vec_enable() function (same for their "disable" counterparts).
Since they had to be used together, there was no point in keeping them
separate.

Remaining changes:

- Always clean up before reconfiguring interrupts to avoid memory leaks.
- Always clean up when closing the device.
- Use malloc()/free() instead of their rte_*() counterparts since there is
  no need to store the vector in huge pages-backed memory.
- Allow more Rx queues than the size of the event file descriptor array as
  long as Rx interrupts are not requested on all of them.
- Properly clean up interrupt handle when disabling Rx interrupts (nb_efd
  and intr_vec reset to 0).
- Check completion channel presence while toggling Rx interrupts on a given
  queue.

Fixes: 9f05a4b81809 ("net/mlx4: support user space Rx interrupt event")

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Moti Haimovsky <motih@mellanox.com>
6 years agonet/mlx4: fix Rx interrupts with multiple ports
Adrien Mazarguil [Wed, 14 Jun 2017 11:49:12 +0000 (13:49 +0200)]
net/mlx4: fix Rx interrupts with multiple ports

Several Ethernet device structures are allocated on top of a common PCI
device for mlx4 adapters with multiple ports. These inherit a common
interrupt handle from their parent PCI device, which prevents Rx interrupts
from working properly on all ports as their configuration is overwritten.

Use a local interrupt handle to address this issue.

Fixes: 9f05a4b81809 ("net/mlx4: support user space Rx interrupt event")

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Moti Haimovsky <motih@mellanox.com>
6 years agonet/mlx4: fix typos from prior commit
Adrien Mazarguil [Wed, 14 Jun 2017 11:49:11 +0000 (13:49 +0200)]
net/mlx4: fix typos from prior commit

Fixes: 9f05a4b81809 ("net/mlx4: support user space Rx interrupt event")

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Moti Haimovsky <motih@mellanox.com>
6 years agoapp/testpmd: enable DDP get info feature
Andrey Chilikin [Fri, 16 Jun 2017 09:25:15 +0000 (10:25 +0100)]
app/testpmd: enable DDP get info feature

This patch demonstrates how to get information about dynamic device
personalization (DDP) profile.

Command 'ddp get info (path_to_profile)' extracts and prints
information about the given profile.

Signed-off-by: Andrey Chilikin <andrey.chilikin@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
6 years agonet/i40e: get information about DDP profile
Andrey Chilikin [Fri, 16 Jun 2017 09:25:14 +0000 (10:25 +0100)]
net/i40e: get information about DDP profile

This patch adds ability to request information about dynamic device
personalization (DDP) profile.

Signed-off-by: Andrey Chilikin <andrey.chilikin@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
6 years agodoc: add testpmd commands for DDP
Beilei Xing [Fri, 16 Jun 2017 02:43:35 +0000 (10:43 +0800)]
doc: add testpmd commands for DDP

Add testpmd commands for loading dynamic device personalization (DDP)
package and getting loaded DDP info list.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
6 years agodoc: add VLAN flow limitation on mlx5 PMD
Shahaf Shuler [Tue, 13 Jun 2017 10:20:58 +0000 (13:20 +0300)]
doc: add VLAN flow limitation on mlx5 PMD

On mlx5 PMD Flow pattern without any specific vlan will match for vlan
packets as well.

Cc: stable@dpdk.org
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
6 years agonet/tap: support flow API isolated mode
Pascal Mazon [Wed, 24 May 2017 15:41:12 +0000 (17:41 +0200)]
net/tap: support flow API isolated mode

With this patch, it is possible to enable or disable the isolate
feature anytime, even immediately after a probe while the tap has not
been configured yet. It will do its job as soon as the netdevice gets
created.

A specific implicit flow rule is created with the lowest priority (all
other flow rules will be evaluated before), at the end of the list. If
isolated mode is enabled, the associated action will be to drop the
packet. Otherwise, the action would be passthrough.

In case of a remote netdevice, implicit rules on it will be removed in
isolated mode, to ensure only actual flow rules redirect packets to the
tap.

Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com>
6 years agonet/mlx5: implement isolated mode from flow API
Nélio Laranjeiro [Wed, 24 May 2017 13:44:08 +0000 (15:44 +0200)]
net/mlx5: implement isolated mode from flow API

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
6 years agonet/mlx5: fix creation of drop flows
Nélio Laranjeiro [Thu, 15 Jun 2017 08:25:16 +0000 (10:25 +0200)]
net/mlx5: fix creation of drop flows

Drop flows being created when the port is stop should not access to the
drop table hash queues as it is invalid.

Fixes: 028761059aeb ("net/mlx5: use an RSS drop queue")
Cc: stable@dpdk.org
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
6 years agonet/cxgbe: fix alignment for data offset in mbuf
Rahul Lakkireddy [Thu, 15 Jun 2017 02:13:54 +0000 (07:43 +0530)]
net/cxgbe: fix alignment for data offset in mbuf

Fixup alignment for data offset when refilling mbufs.

Fixes: edd04c619685 ("net/cxgbe: update Rx path for Chelsio T6")

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
6 years agodoc: announce igb flow API support
Wei Zhao [Wed, 14 Jun 2017 08:47:56 +0000 (16:47 +0800)]
doc: announce igb flow API support

Add release notes update to announce support of rte_flow on igb NIC.
And update NIC features document for this feature.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
6 years agonet/szedata2: use macro from common library
Matej Vido [Wed, 14 Jun 2017 11:08:57 +0000 (13:08 +0200)]
net/szedata2: use macro from common library

Macro for alignment is defined in the common library.
Use macro from the common library in own macro definition.

Signed-off-by: Matej Vido <vido@cesnet.cz>
6 years agonet/szedata2: remove unused macro
Matej Vido [Wed, 14 Jun 2017 08:21:20 +0000 (10:21 +0200)]
net/szedata2: remove unused macro

Fixes: 2f3193cf0f3e ("pci: inherit common driver in PCI driver")

Signed-off-by: Matej Vido <vido@cesnet.cz>
6 years agonet/ixgbe: support packet type parsing in SSE Rx
Qi Zhang [Tue, 13 Jun 2017 08:58:26 +0000 (04:58 -0400)]
net/ixgbe: support packet type parsing in SSE Rx

Hardware PTYPE in Rx desc will be parsed to fill mbuf's packet_type.

Signed-off-by: Ray Kinsella <ray.kinsella@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agonet/mlx5: implement drop action in hardware classifier
Shachar Beiser [Sun, 4 Jun 2017 05:25:21 +0000 (05:25 +0000)]
net/mlx5: implement drop action in hardware classifier

The current drop action is implemented as a queue tail drop,
requiring to instantiate multiple WQs to maintain high drop rate.
This commit, implements the drop action in hardware classifier.
This enables to reduce the amount of contexts needed for the drop,
without affecting the drop rate.

Signed-off-by: Shachar Beiser <shacharbe@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
6 years agoapp/testpmd: print statistics periodically
Pablo de Lara [Thu, 6 Jul 2017 03:05:16 +0000 (04:05 +0100)]
app/testpmd: print statistics periodically

Add parameter to print port statistics periodically
(disabled by default), if interactive mode is not enabled.

This is useful to allow the user to see port statistics
without having to get into the internal command line.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Tested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
6 years agoapp/testpmd: add parameter to start forwarding Tx first
Pablo de Lara [Thu, 15 Jun 2017 04:04:03 +0000 (05:04 +0100)]
app/testpmd: add parameter to start forwarding Tx first

Add parameter to start forwarding sending first
a burst of packets, which is useful when testing
a loopback connection.

This was already implemented as an internal command,
but adding it as a parameter is interesting, as it
allows the user to test a loopback connection without
entering in the internal command line.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
6 years agopci: increase domain storage to 32 bits
Stephen Hemminger [Wed, 5 Jul 2017 16:55:32 +0000 (09:55 -0700)]
pci: increase domain storage to 32 bits

In some environments, the PCI domain can be larger than 16 bits.
For example, a PCI device passed through in Azure gets a synthetic domain
id  which is internally generated based on GUID. The PCI standard does
not restrict domain to be 16 bits.

This change breaks ABI for API's that expose PCI address structure.

The printf format for PCI remains unchanged, so that on most
systems (with only 16 bit domain) the output format is unchanged
and is 4 characters wide.  For example: 0000:00:01.0
Only on sysetms with higher bits will the domain take up more
space; example: 12000:00:01.0

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
6 years agopci: remove unnecessary casts in address parsing
Stephen Hemminger [Wed, 5 Jul 2017 16:55:31 +0000 (09:55 -0700)]
pci: remove unnecessary casts in address parsing

The function strtoul returns unsigned long and can be directly
assigned to a smaller type. Removing the casts allows easier
expansion of PCI domain.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
6 years agousertools: add option to unbind all devices
Ferruh Yigit [Thu, 4 May 2017 14:10:50 +0000 (15:10 +0100)]
usertools: add option to unbind all devices

-u accepts "dpdk" argument to unbind all devices bound to a DPDK driver.

Usage:
usertools/dpdk-devbind.py -u dpdk

Example:
$ usertools/dpdk-devbind.py -s

Network devices using DPDK-compatible driver
============================================
0000:08:00.1 '...' drv=igb_uio unused=
0000:81:00.0 '...' drv=igb_uio unused=
0000:88:00.0 '...' drv=igb_uio unused=
0000:88:00.1 '...' drv=igb_uio unused=
...

$ usertools/dpdk-devbind.py -u dpdk
$ usertools/dpdk-devbind.py -s

Network devices using DPDK-compatible driver
============================================
<none>
....

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
6 years agoethdev: use device name from device structure
Ferruh Yigit [Fri, 9 Jun 2017 18:36:06 +0000 (19:36 +0100)]
ethdev: use device name from device structure

Device name resides in two different locations, in rte_device->name and
in ethernet device private data.

For now, the copy in the ethernet device private data is required for
multi process support, the name is the how secondary process finds about
primary process device.

But in the ethdev library some eth_dev->data->name usage can be
converted to rte_device->name.

This patch updates ethdev to use rte_device->name when possible.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
6 years agodrivers/net: use device name from device structure
Ferruh Yigit [Fri, 9 Jun 2017 18:36:05 +0000 (19:36 +0100)]
drivers/net: use device name from device structure

Device name resides in two different locations, in rte_device->name and
in ethernet device private data.

For now, the copy in the ethernet device private data is required for
multi process support, the name is the how secondary process finds about
primary process device.

But for drivers there is no reason to use the copy in the ethernet
device private data.

This patch updates PMDs to use only rte_device->name.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
6 years agoethdev: ensure same name size for device and ethdev
Ferruh Yigit [Fri, 9 Jun 2017 18:36:04 +0000 (19:36 +0100)]
ethdev: ensure same name size for device and ethdev

rte_device->name copied into eth_dev->name, right now size is same for
both but the requirement is not clear.

This patch highlights the relation without changing actual sizes.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
6 years agoethdev: add fuzzy match in flow API
Qi Zhang [Tue, 13 Jun 2017 03:07:05 +0000 (23:07 -0400)]
ethdev: add fuzzy match in flow API

Add new meta pattern item RTE_FLOW_TYPE_ITEM_FUZZY in flow API.

This is for device that support fuzzy match option.
Usually a fuzzy match is fast but the cost is accuracy.
i.e. Signature Match only match pattern's hash value, but it is
possible that two different patterns have the same hash value.

Matching accuracy level can be configured by subfield threshold.
Driver can divide the range of threshold and map to different
accuracy levels that device support.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
6 years agoeal: fix config file path when checking process
Jianfeng Tan [Mon, 26 Jun 2017 06:49:46 +0000 (06:49 +0000)]
eal: fix config file path when checking process

When primary process is booted with --file-prefix option, the API,
rte_eal_primary_proc_alive(), uses a wrong config file path to
check if primary process is alive.

Fix it by calling helper function to get config file path.

Fixes: dd3e00138d74 ("eal: check if primary process is alive")
Cc: stable@dpdk.org
Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
6 years agoethdev: fix secondary process crash on unused virtio
Jianfeng Tan [Mon, 3 Jul 2017 06:37:31 +0000 (06:37 +0000)]
ethdev: fix secondary process crash on unused virtio

Suppose we have 2 virtio devices for a VM, with only the first one,
virtio0, binding to igb_uio. Start a primary DPDK process, driving
only virtio0. Then start a secondary DPDK process, it encounters
segfault at eth_virtio_dev_init() because hw is NULL, when trying
to initialize the 2nd virtio devices.
    1539                    if (!hw->virtio_user_dev) {

We could add a precheck to return error when hw is NULL. But the
root cause is that virtio devices which are not driven by the primary
process are not exluded by secondary eal probe function.

To support legacy virtio devices bound to none kernel driver, we
removed RTE_PCI_DRV_NEED_MAPPING in
commit 962cf902e6eb ("pci: export device mapping functions").
At the boot of primary process, ether dev is allocated in rte_eth_devices
array, rte_eth_dev_data is also allocated in rte_eth_dev_data array; then
probe function fails; and ether dev is released. However, the entry in
rte_eth_dev_data array is not cleared. Then we start secondary process,
and try to attach the virtio device that not used in primary process,
the field, dev_private (or hw), in rte_eth_dev_data, is NULL.

To fail the dev attach, we need to clear the field, name, when we
release any ether devices in primary, so that below loop in
rte_eth_dev_attach_secondary() will not find any matched names.
        for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
                if (strcmp(rte_eth_dev_data[i].name, name) == 0)
                        break;
        }

Fixes: 6d890f8ab512 ("net/virtio: fix multiple process support")
Cc: stable@dpdk.org
Reported-by: Reshma Pattan <reshma.pattan@intel.com>
Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
6 years agomem: do not advertise physical address when no hugepages
Olivier Matz [Mon, 3 Jul 2017 10:04:07 +0000 (12:04 +0200)]
mem: do not advertise physical address when no hugepages

When populating a mempool with a virtual memory area, the mempool
library expects to be able to get the physical address of each page.

When started with --no-huge, the physical addresses may not be available
because the pages are not locked in memory. It sometimes returns
RTE_BAD_PHYS_ADDR, which makes the mempool_populate() function to fail.

This was working before the commit cdc242f260e7 ("eal/linux: support
running as unprivileged user"), because rte_mem_virt2phy() was returning
0 instead of RTE_BAD_PHYS_ADDR, which was seen as a valid physical
address.

Since --no-huge is a debug function that breaks the support of physical
drivers, always set physical addresses to RTE_BAD_PHYS_ADDR in memzones
or in rte_mem_virt2phy(), and ensure that mempool won't complain in that
case.

Fixes: cdc242f260e7 ("eal/linux: support running as unprivileged user")
Cc: stable@dpdk.org
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Jan Blunck <jblunck@infradead.org>
6 years agoexamples/l3fwd: add loop count for hash multi-lookup
Jianbo Liu [Tue, 4 Jul 2017 10:24:04 +0000 (18:24 +0800)]
examples/l3fwd: add loop count for hash multi-lookup

New macro to define how many times of hash lookup in one time, and this
makes the code more concise.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoexamples/l3fwd: add NEON implementation
Jianbo Liu [Tue, 4 Jul 2017 10:24:03 +0000 (18:24 +0800)]
examples/l3fwd: add NEON implementation

Use ARM NEON intrinsics to accelerate l3 fowarding.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoarch/arm: add vcopyq_laneq_u32 for old gcc
Jianbo Liu [Tue, 4 Jul 2017 10:24:02 +0000 (18:24 +0800)]
arch/arm: add vcopyq_laneq_u32 for old gcc

Implement vcopyq_laneq_u32 if gcc version is lower than 7.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoexamples/l3fwd: rearrange LPM code
Jianbo Liu [Tue, 4 Jul 2017 10:24:01 +0000 (18:24 +0800)]
examples/l3fwd: rearrange LPM code

Some common code can be used by other ARCHs, move to l3fwd_lpm.c

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoexamples/l3fwd: extract common code from multi packet send
Jianbo Liu [Tue, 4 Jul 2017 10:24:00 +0000 (18:24 +0800)]
examples/l3fwd: extract common code from multi packet send

Keep x86 related code in l3fwd_sse.h, and move common code to
l3fwd_common.h, which will be used by other Archs.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoexamples/l3fwd: rename file for sequential hash lookup
Jianbo Liu [Tue, 4 Jul 2017 10:23:59 +0000 (18:23 +0800)]
examples/l3fwd: rename file for sequential hash lookup

The l3fwd_em_sse.h is enabled by NO_HASH_LOOKUP_MULTI.
Renaming it because it's only for sequential hash lookup,
and doesn't include any x86 SSE instructions.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoexamples/l3fwd: reorganise multi hash lookup
Jianbo Liu [Tue, 4 Jul 2017 10:23:58 +0000 (18:23 +0800)]
examples/l3fwd: reorganise multi hash lookup

Extract common code from l3fwd_em_hlm_sse.h, and add to the new file
l3fwd_em_hlm.h.

Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agonet: implement CRC for ARM64 NEON
Ashwin Sekhar T K [Tue, 4 Jul 2017 09:24:07 +0000 (02:24 -0700)]
net: implement CRC for ARM64 NEON

Added CRC compute APIs for arm64 utilizing the pmull
capability.

Added new file net_crc_neon.h to hold the arm64 pmull
CRC implementation.

Added wrappers in rte_vect.h for those neon intrinsics
which are not supported in GCC version < 7.

Verified the changes with crc_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoeal: move gcc version definition to common header
Ashwin Sekhar T K [Tue, 4 Jul 2017 09:24:06 +0000 (02:24 -0700)]
eal: move gcc version definition to common header

Moved the definition of GCC_VERSION from lib/librte_table/rte_lru.h
to lib/librte_eal/common/include/rte_common.h.

Tested compilation on:
 * arm64 with gcc
 * x86 with gcc and clang

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jan Viktorin <viktorin@rehivetech.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agomk: add crypto capability for armv8a and thunderx
Ashwin Sekhar T K [Tue, 4 Jul 2017 09:24:05 +0000 (02:24 -0700)]
mk: add crypto capability for armv8a and thunderx

armv8-a has optional CRYPTO extension which adds the
AES, PMULL, SHA1 and SHA2 capabilities. -march=armv8-a+crypto
enables code generation for the ARMv8-A architecture together
with the optional CRYPTO extensions.

Added the following flags to detect the corresponding
capability at compile time.
 * RTE_MACHINE_CPUFLAG_AES
 * RTE_MACHINE_CPUFLAG_PMULL
 * RTE_MACHINE_CPUFLAG_SHA1
 * RTE_MACHINE_CPUFLAG_SHA2

At run-time, the following flags can be used to detect the
capabilities.
 * RTE_CPUFLAG_AES
 * RTE_CPUFLAG_PMULL
 * RTE_CPUFLAG_SHA1
 * RTE_CPUFLAG_SHA2

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jan Viktorin <viktorin@rehivetech.com>
6 years agoexamples/performance-thread: support ARM64
Ashwin Sekhar T K [Tue, 4 Jul 2017 08:22:41 +0000 (01:22 -0700)]
examples/performance-thread: support ARM64

Updated Makefile to allow compilation for arm64 architecture.

Added necessary arm64 support for lthread.

Fixed minor compilation errors for arm64 compilation.

Tested the apps l3fwd-thread and lthread_pthread_shim on thunderx
and x86_64.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
6 years agoexamples/performance-thread: reorganise arch code
Ashwin Sekhar T K [Tue, 4 Jul 2017 08:22:40 +0000 (01:22 -0700)]
examples/performance-thread: reorganise arch code

Moved the architecture dependent stack set code to architecture
specific directory.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
6 years agoexamples/performance-thread: remove non-SSE4 fallbacks
Bruce Richardson [Tue, 20 Jun 2017 15:23:13 +0000 (16:23 +0100)]
examples/performance-thread: remove non-SSE4 fallbacks

Since this example is for x86_64 platforms only, and since SSE4 is now a
mandatory requirement, we can remove the ifdefs checking for that
instruction set level, and the fallbacks if it is not present.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agoexamples/l3fwd: remove checks for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:12 +0000 (16:23 +0100)]
examples/l3fwd: remove checks for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agoexamples/ip_pipeline: remove macro check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:11 +0000 (16:23 +0100)]
examples/ip_pipeline: remove macro check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agonet/ixgbe: remove fallback code for x86 non-SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:10 +0000 (16:23 +0100)]
net/ixgbe: remove fallback code for x86 non-SSE4

Since SSE4 is now part of minimum requirements for DPDK on x86, we no
longer need this fallback code.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agonet/i40e: remove checks for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:09 +0000 (16:23 +0100)]
net/i40e: remove checks for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we no longer
need these checks.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agonet/enic: replace check for SSE4 with check for x86
Bruce Richardson [Tue, 20 Jun 2017 15:23:08 +0000 (16:23 +0100)]
net/enic: replace check for SSE4 with check for x86

Since SSE4 is now minimum requirement for x86 platforms we can replace the
check for SSE4 with a check for x86

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agocrypto/zuc: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:07 +0000 (16:23 +0100)]
crypto/zuc: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agocrypto/snow3g: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:06 +0000 (16:23 +0100)]
crypto/snow3g: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agocrypto/kasumi: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:05 +0000 (16:23 +0100)]
crypto/kasumi: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agocrypto/aesni_mb: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:04 +0000 (16:23 +0100)]
crypto/aesni_mb: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agotable: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:03 +0000 (16:23 +0100)]
table: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
the scalar version on x86.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agosched: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:03 +0000 (16:23 +0100)]
sched: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agonet: remove check for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:02 +0000 (16:23 +0100)]
net: remove check for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agoip_frag: check for x86 rather than SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:23:01 +0000 (16:23 +0100)]
ip_frag: check for x86 rather than SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
to check for its presence any more.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agohash: remove checks for SSE
Bruce Richardson [Tue, 20 Jun 2017 15:23:00 +0000 (16:23 +0100)]
hash: remove checks for SSE

Since SSE4 is now part of the minimum requirements for DPDK, we don't need
a fallback case to handle selection of algorithm when SSE4 is unavailable.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
6 years agodistributor: remove checks for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:22:58 +0000 (16:22 +0100)]
distributor: remove checks for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we now longer
need this check.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agoacl: remove checks for SSE4
Bruce Richardson [Tue, 20 Jun 2017 15:22:57 +0000 (16:22 +0100)]
acl: remove checks for SSE4

Since SSE4 is now part of the minimum requirements for DPDK, we now longer
need this check.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agoeal: remove unneeded conditionals for SSE headers
Bruce Richardson [Tue, 20 Jun 2017 15:22:59 +0000 (16:22 +0100)]
eal: remove unneeded conditionals for SSE headers

Our x86 baseline is to have support for SSE4.2, so therefore there is no
point in conditions around the inclusion of SSE1 - SSE4 headers.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
6 years agomk: require SSE4.2 support on all x86 platforms
Bruce Richardson [Tue, 20 Jun 2017 15:22:56 +0000 (16:22 +0100)]
mk: require SSE4.2 support on all x86 platforms

Increase the default baseline from "core2" architecture to "corei7". This
means that all builds will have SSE4.2 support included, and we can remove
special case manipulation of CFLAGS for the same. Naturally, this does mean
that some machines that previously could run DPDK now can't do so, but
hardware with SSE4.2 has been around for almost a decade now, so this
should not be a major problem.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
6 years agocontigmem: do not zero pages during each mmap
Tiwei Bie [Sun, 4 Jun 2017 05:53:24 +0000 (13:53 +0800)]
contigmem: do not zero pages during each mmap

Don't zero the pages during each mmap. Instead, only zero the pages
when they are not already mmapped. Otherwise, the multi-process
support will be broken, as the pages will be zeroed when secondary
processes map the memory. Besides, track the open and mmap operations
on the cdev, and prevent the module from being unloaded when it is
still in use.

Fixes: 82f931805506 ("contigmem: zero all pages during mmap")
Cc: stable@dpdk.org
Signed-off-by: Tiwei Bie <tiwei.bie@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
6 years agocontigmem: free allocated memory on error
Tiwei Bie [Sun, 4 Jun 2017 05:53:23 +0000 (13:53 +0800)]
contigmem: free allocated memory on error

Fixes: 764bf26873b9 ("add FreeBSD support")
Cc: stable@dpdk.org
Signed-off-by: Tiwei Bie <tiwei.bie@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
6 years agoeal: use new hotplug API in attach
Jan Blunck [Fri, 30 Jun 2017 18:19:43 +0000 (20:19 +0200)]
eal: use new hotplug API in attach

Using the new hotplug API allows attach to be backwards compatible while
decoupling it from the concrete bus implementations.

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agoethdev: use device handle to detach
Jan Blunck [Fri, 30 Jun 2017 18:19:42 +0000 (20:19 +0200)]
ethdev: use device handle to detach

This is changing the API of rte_eal_dev_detach().

Signed-off-by: Jan Blunck <jblunck@infradead.org>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
6 years agoeal: add hotplug add/remove device
Jan Blunck [Fri, 30 Jun 2017 18:19:41 +0000 (20:19 +0200)]
eal: add hotplug add/remove device

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus/pci: implement plug/unplug operations
Gaetan Rivet [Fri, 30 Jun 2017 18:19:40 +0000 (20:19 +0200)]
bus/pci: implement plug/unplug operations

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
6 years agobus/vdev: implement unplug operation
Jan Blunck [Fri, 30 Jun 2017 18:19:39 +0000 (20:19 +0200)]
bus/vdev: implement unplug operation

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus: introduce device plug/unplug
Jan Blunck [Fri, 30 Jun 2017 18:19:38 +0000 (20:19 +0200)]
bus: introduce device plug/unplug

This allows the buses to plug and probe specific devices.
This is meant to be a building block for hotplug support.

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus: add helper to find bus by name
Jan Blunck [Fri, 30 Jun 2017 18:19:37 +0000 (20:19 +0200)]
bus: add helper to find bus by name

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus: add helper to find which bus holds a device
Jan Blunck [Fri, 30 Jun 2017 18:19:35 +0000 (20:19 +0200)]
bus: add helper to find which bus holds a device

Signed-off-by: Jan Blunck <jblunck@infradead.org>
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
6 years agobus: require to implement device finding
Jan Blunck [Fri, 30 Jun 2017 18:19:36 +0000 (20:19 +0200)]
bus: require to implement device finding

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus/fslmc: implement method to find device
Jan Blunck [Fri, 30 Jun 2017 18:19:34 +0000 (20:19 +0200)]
bus/fslmc: implement method to find device

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus/pci: implement method to find device
Jan Blunck [Fri, 30 Jun 2017 18:19:33 +0000 (20:19 +0200)]
bus/pci: implement method to find device

Signed-off-by: Jan Blunck <jblunck@infradead.org>
6 years agobus/vdev: implement method to find device
Jan Blunck [Fri, 30 Jun 2017 18:19:32 +0000 (20:19 +0200)]
bus/vdev: implement method to find device

Signed-off-by: Jan Blunck <jblunck@infradead.org>
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
6 years agobus: add method to find device
Jan Blunck [Fri, 30 Jun 2017 18:19:31 +0000 (20:19 +0200)]
bus: add method to find device

This new method allows buses to expose their devices in a controlled
manner. A comparison function is provided by the user to discriminate
between devices, using arbitrary data as identifier.

It is possible to start an iteration from a specific point, in order to
continue a search.

Signed-off-by: Jan Blunck <jblunck@infradead.org>
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
6 years agobus: add iterator to find a bus
Jan Blunck [Fri, 30 Jun 2017 18:19:30 +0000 (20:19 +0200)]
bus: add iterator to find a bus

This helper allows to iterate over all registered buses and find one
matching data used as parameter.

Signed-off-by: Jan Blunck <jblunck@infradead.org>
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
6 years agobus/vdev: use standard bus registration
Gaetan Rivet [Tue, 27 Jun 2017 16:11:15 +0000 (18:11 +0200)]
bus/vdev: use standard bus registration

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
6 years agoeal: switch to architecture specific pause function
Jerin Jacob [Mon, 5 Jun 2017 08:58:43 +0000 (14:28 +0530)]
eal: switch to architecture specific pause function

Remove rte_pause() definition from rte_common.h and
switchover to architecture specific rte_pause.h

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
6 years agoeal/ppc64: add empty pause function
Jerin Jacob [Mon, 5 Jun 2017 08:58:42 +0000 (14:28 +0530)]
eal/ppc64: add empty pause function

The patch does not provide any functional change for ppc64
with respect to existing rte_pause() definition.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
6 years agoeal/x86: copy pause function
Jerin Jacob [Mon, 5 Jun 2017 08:58:41 +0000 (14:28 +0530)]
eal/x86: copy pause function

The patch does not provide any functional change for x86
with respect to existing rte_pause() definition.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
6 years agoeal/arm64: add pause function
Jerin Jacob [Mon, 5 Jun 2017 08:58:40 +0000 (14:28 +0530)]
eal/arm64: add pause function

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoeal/arm32: add empty pause function
Jerin Jacob [Mon, 5 Jun 2017 08:58:39 +0000 (14:28 +0530)]
eal/arm32: add empty pause function

The patch does not provide any functional change for ARM32
with respect to existing rte_pause() definition.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jan Viktorin <viktorin@rehivetech.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoeal: introduce architecture specific pause function
Jerin Jacob [Mon, 5 Jun 2017 08:58:38 +0000 (14:28 +0530)]
eal: introduce architecture specific pause function

Each architecture may have different instructions for optimized
and power consumption aware rte_pause() implementation.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
6 years agomk: allow exec-env specific targets
Jerin Jacob [Tue, 6 Jun 2017 12:58:36 +0000 (18:28 +0530)]
mk: allow exec-env specific targets

Add a hook in generic rte.sdkbuild.mk file
to include exec-env specific targets.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
6 years agoconfig: support clang for ARMv8 Linux
Ashwin Sekhar T K [Fri, 12 May 2017 05:45:47 +0000 (22:45 -0700)]
config: support clang for ARMv8 Linux

Moved all common defines from defconfig_arm64-armv8a-linuxapp-gcc
to common_armv8a_linuxapp.

Created new config arm64-armv8a-linuxapp-clang which adds the
clang support to armv8a.

Now defconfigs arm64-armv8a-linuxapp-gcc/clang contain only the
CONFIG_RTE_TOOLCHAIN* defines and all other common defines are
inherited from common_armv8a_linuxapp.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
6 years agoeal/arm: fix build with clang
Ashwin Sekhar T K [Fri, 12 May 2017 05:45:46 +0000 (22:45 -0700)]
eal/arm: fix build with clang

Fixed warning -Wasm-operand-widths seen with armv8a
clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
6 years agoacl: fix build with ARMv8 clang
Ashwin Sekhar T K [Fri, 12 May 2017 05:45:45 +0000 (22:45 -0700)]
acl: fix build with ARMv8 clang

Fixed warning -Wunknown-warning-option seen with
armv8a clang compilation.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
6 years agonet/thunderx: fix build with clang
Ashwin Sekhar T K [Fri, 12 May 2017 05:45:44 +0000 (22:45 -0700)]
net/thunderx: fix build with clang

Replaced usage of %a0 in inline assembly with [%x0]

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
6 years agohash: compile ARMv8 CRC32 support conditionally
Ashwin Sekhar T K [Fri, 12 May 2017 05:45:43 +0000 (22:45 -0700)]
hash: compile ARMv8 CRC32 support conditionally

Compile the armv8a CRC32 support only if the machine
has the CRC extensions i.e if RTE_MACHINE_CPUFLAG_CRC32
is defined.

Removed the .arch assembly directives as these are no
more necessary.

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
6 years agoeal: pause while busy-waiting for lcore slave
Ashwin Sekhar T K [Fri, 12 May 2017 05:45:42 +0000 (22:45 -0700)]
eal: pause while busy-waiting for lcore slave

Instead of simply busy-waiting for slave in rte_eal_wait_lcore()
do rte_pause(). This will give power savings.

This also fixes warning -Wempty-body seen with armv8a clang
compilation.

Suggested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
6 years agotable: add NEON implementation of LRU strategy 3
Ashwin Sekhar T K [Fri, 28 Apr 2017 08:58:31 +0000 (01:58 -0700)]
table: add NEON implementation of LRU strategy 3

* Added new file rte_lru_arm64.h for holding arm64 specific
  definitions
* Verified the changes with table_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
6 years agotable: separate out x86-specific from LRU header
Ashwin Sekhar T K [Fri, 28 Apr 2017 08:58:30 +0000 (01:58 -0700)]
table: separate out x86-specific from LRU header

* Moved all x86 related lru defines to rte_lru_x86.h while
  retaining all common defines in rte_lru.h
* Verified the changes with table_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
6 years agoefd: support lookup using NEON intrinsics
Ashwin Sekhar T K [Thu, 27 Apr 2017 12:44:18 +0000 (05:44 -0700)]
efd: support lookup using NEON intrinsics

* Added file lib/librte_efd/rte_efd_arm64.h to hold arm64
  specific definitions
* Verified the changes with efd_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
6 years agosched: add NEON optimizations
Ashwin Sekhar T K [Fri, 28 Apr 2017 06:15:48 +0000 (23:15 -0700)]
sched: add NEON optimizations

* Removed setting CONFIG_RTE_SCHED_VECTOR=n from armv8a config
  so that the setting from common_base is taken as the default
  setting for armv8a
* Verified the changes with sched_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agohash: support NEON for Toeplitz algo
Ashwin Sekhar T K [Thu, 27 Apr 2017 12:33:49 +0000 (05:33 -0700)]
hash: support NEON for Toeplitz algo

Verified the changes with thash_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
6 years agoapp/testpmd: fix comments for bonding commands
RongQiang Xie [Thu, 15 Jun 2017 10:20:48 +0000 (18:20 +0800)]
app/testpmd: fix comments for bonding commands

Because the comments in function cmd_add_bonding_slave_parsed() and
cmd_remove_bonding_slave_parsed() is 'Set the primary slave for
a bonded device',so fix it with 'add the slave for a bonded device'
and 'remove the slave from a bonded device'.

Signed-off-by: RongQiang Xie <xie.rongqiang@zte.com.cn>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
6 years agoeal: introduce integer log2 function
Olivier Matz [Thu, 6 Apr 2017 14:15:36 +0000 (16:15 +0200)]
eal: introduce integer log2 function

At some places, the log2() function is used despite this function
works on float. This introduces a dependency to the math lib but
most of the time it is not required because we want an integer log2.

Add a new helper to do this job and fix nfp driver.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Alejandro Lucero <alejandro.lucero@netronome.com>
6 years agoethdev: fix a typo in global API introduction
Nikhil Rao [Mon, 1 Aug 2016 05:49:48 +0000 (11:19 +0530)]
ethdev: fix a typo in global API introduction

This patch fixes a typo in the eth device API doc, device
config. not stored between calls to rte_eth_dev_start/stop()
should be restored before a call to rte_eth_dev_start()
instead of after a call to rte_eth_dev_start().

Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
6 years agodoc: fix typos in virtio howto guide
Yong Wang [Mon, 19 Jun 2017 10:14:23 +0000 (06:14 -0400)]
doc: fix typos in virtio howto guide

Signed-off-by: Yong Wang <wang.yong19@zte.com.cn>
Acked-by: John McNamara <john.mcnamara@intel.com>
6 years agodoc: fix typos in perf guide
Xingyou Chen [Thu, 8 Jun 2017 02:14:24 +0000 (10:14 +0800)]
doc: fix typos in perf guide

Signed-off-by: Xingyou Chen <niatlantice@gmail.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
6 years agodoc: fix typo in Linux guide
Harrison McCullough [Mon, 19 Jun 2017 13:38:40 +0000 (13:38 +0000)]
doc: fix typo in Linux guide

Signed-off-by: Harrison McCullough <harrison_mccullough@labs.att.com>
Acked-by: John McNamara <john.mcnamara@intel.com>