dpdk.git
4 years agonet/i40e: enable VF to program MAC address
Guinan Sun [Tue, 24 Mar 2020 04:36:46 +0000 (04:36 +0000)]
net/i40e: enable VF to program MAC address

Due to the restriction of the flag I40E_FLAG_VF_MAC_BY_PF,
VF cannot program the MAC address.
In order to solve this inflexibility, the use of I40E_FLAG_VF_MAC_BY_PF
has been deleted in the code implementation to ensure that
VF can flexibly program the MAC address.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ice/base: check memory pointer before copying
Haiyue Wang [Tue, 31 Mar 2020 06:50:34 +0000 (14:50 +0800)]
net/ice/base: check memory pointer before copying

The ice_memdup doesn't check the new allocated memory pointer, it calls
the rte_memcpy directly. It should check it.

Fixes: 5f0978e96220 ("net/ice/base: add OS specific implementation")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agodoc: update ixgbe features list
Qi Zhang [Mon, 23 Mar 2020 10:54:31 +0000 (18:54 +0800)]
doc: update ixgbe features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agodoc: update iavf features list
Qi Zhang [Mon, 23 Mar 2020 10:54:30 +0000 (18:54 +0800)]
doc: update iavf features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agodoc: update ice features list
Qi Zhang [Mon, 23 Mar 2020 10:54:29 +0000 (18:54 +0800)]
doc: update ice features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agodoc: update i40e features list
Qi Zhang [Mon, 23 Mar 2020 10:54:28 +0000 (18:54 +0800)]
doc: update i40e features list

Remove vector path feature list, if a feature only be supported
in non-vector path, use "P" to represent.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ice/base: enable RSS for PFCP/L2TP/ESP/AH
Qi Zhang [Mon, 30 Mar 2020 11:45:38 +0000 (19:45 +0800)]
net/ice/base: enable RSS for PFCP/L2TP/ESP/AH

Add support for PFCP, L2TP, ESP and AH RSS enabling.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix binary order for GTPU filter
Qi Zhang [Mon, 30 Mar 2020 11:45:37 +0000 (19:45 +0800)]
net/ice/base: fix binary order for GTPU filter

Take network order for gtpu fdir filter.

Fixes: b5c274f4e2ad ("net/ice/base: support FDIR for GTPU QFI field")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: change function to static
Qi Zhang [Mon, 30 Mar 2020 11:45:36 +0000 (19:45 +0800)]
net/ice/base: change function to static

Change ice_set_fd_desc_val to static, since it only be used
internally.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support PFCP and NAT-T of switch
Qi Zhang [Mon, 30 Mar 2020 11:45:35 +0000 (19:45 +0800)]
net/ice/base: support PFCP and NAT-T of switch

This patch add support switch rule for PFCP and NAT-T
packet base on profile rule, PFCP and NAT-T packet will not
be matched on any packet fields, but instead matches
the profile that the packet hits in the switch block.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: move some macros
Qi Zhang [Mon, 30 Mar 2020 11:45:34 +0000 (19:45 +0800)]
net/ice/base: move some macros

Move some macro from ice_switch.c to ice_switch.h. Currently this
is only required by kernel driver, DPDK just to sync the code.

Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: group case statements
Qi Zhang [Mon, 30 Mar 2020 11:45:33 +0000 (19:45 +0800)]
net/ice/base: group case statements

ICE_BLK_FD and ICE_BLK_RSS are executing the same code so group the case
statements together instead of duplicating code for each block.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: handle critical FW error
Qi Zhang [Mon, 30 Mar 2020 11:45:32 +0000 (19:45 +0800)]
net/ice/base: handle critical FW error

A race condition between FW and SW can occur between admin queue setup
and the first command sent. A link event may occur and FW attempts to
notify a non-existent queue. FW will set the critical error bit and
disable the queue. When this happens retry queue setup.

Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: improve GTPU extend header handle
Qi Zhang [Mon, 30 Mar 2020 11:45:31 +0000 (19:45 +0800)]
net/ice/base: improve GTPU extend header handle

A GTPU header can stack with a extend header or not, while
current implementation does not allow HDR bit sets like below:

ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_EH
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_UP
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_DWN

Which is not convenient for upper layer flow parser to
generate correct HDR bit.

but it could be if we have below assumptions:

ICE_FLOW_SEG_HDR_GTPU_DWN -- for GTPU with extend header down link
ICE_FLOW_SEG_HDR_GTPU_UP  -- for GTPU with extend header up link
ICE_FLOW_SEG_HDR_GTPU_EH  -- for GTPU with any extend header
ICE_FLOW_SEG_HDR_GTPU_IP  -- for any GTPU header, but when it combined
                             with any above it downgrade to a dummy one.

And handle from specific case to generic case will hit all the cases
as expected.

if else (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_IP {
...
}

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: allow profile based switch rules
Qi Zhang [Mon, 30 Mar 2020 11:45:30 +0000 (19:45 +0800)]
net/ice/base: allow profile based switch rules

Switch rules usually match packet fields to take actions. Add capability
to add a switch rule that does not match any packet fields, but instead
matches the profile that the packet hits in the switch block.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add default DCB parameters
Qi Zhang [Mon, 30 Mar 2020 11:45:29 +0000 (19:45 +0800)]
net/ice/base: add default DCB parameters

Added new value for cmd_flag:
Persistently set the DCB configuration mode for the current port.
Added new value for valid_flags: represent bit#1 of command flag

Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: allow adding MAC VLAN filter on port
Qi Zhang [Mon, 30 Mar 2020 11:45:28 +0000 (19:45 +0800)]
net/ice/base: allow adding MAC VLAN filter on port

Add new API function to allow user to choose port
on which mac vlan rule going to be added.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: refactor flow control function
Qi Zhang [Mon, 30 Mar 2020 11:45:27 +0000 (19:45 +0800)]
net/ice/base: refactor flow control function

We will remove the logic of configuring the flow control out of the
ice_set_fc(...) function. The goal is to enable any driver to combine
all PHY related flow logic, without repeatedly call ice_aq_set_phy_cfg.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add ethertype check for dummy packet
Qi Zhang [Mon, 30 Mar 2020 11:45:26 +0000 (19:45 +0800)]
net/ice/base: add ethertype check for dummy packet

In order to support switch rule for ethertype filter
with ipv6 ethertype id, it has to check ethertype
then find a proper dummy packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: ignore EMODE when setting PHY config
Qi Zhang [Mon, 30 Mar 2020 11:45:25 +0000 (19:45 +0800)]
net/ice/base: ignore EMODE when setting PHY config

When setting the PHY cfg (CQ cmd 0x0601), if the firmware responds
with an EMODE error, software will ignore the error as it simply
means that manageability (ex: BMC) is in control of the link and that
the new setting may not be applied.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: reduce scope of variables
Qi Zhang [Mon, 30 Mar 2020 11:45:24 +0000 (19:45 +0800)]
net/ice/base: reduce scope of variables

The scope of these variables can be reduced, so do so. This also
eliminates the need for the extra wrapping/braces.

Also, compact a line since it can fit within 80 columns

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add more macros for FDID priority
Qi Zhang [Mon, 30 Mar 2020 11:45:23 +0000 (19:45 +0800)]
net/ice/base: add more macros for FDID priority

Add macro for FDID  priority 0 and 3, also adjust the
fdid_prio position to sync with kernel driver.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/mlx5: fix imissed counter overflow
Jiawei Wang [Mon, 30 Mar 2020 03:02:10 +0000 (06:02 +0300)]
net/mlx5: fix imissed counter overflow

The Hw counters is defined as 32bit unsigned value and read from
the sysfs. Firstly read the base value while application start,
then fetch the new value while do query and minus the base value.
If the new value is less than base value, will result in a
negative value and convert to the big value as unsigned 64bit.

PMD add xstats field to store the last successfully read counter,
use it if failed to read hw counter from sysfs.
PMD also record the last output value to handle the wrap around case,
if overflow happened, increase the wrap count by 1 and save into the
higher 32bit, and update the new value into lower 32bit, finally
return the 64bit counter value.

Fixes: ce9494d76c47 ("net/mlx5: report imissed statistics")
Cc: stable@dpdk.org
Signed-off-by: Jiawei Wang <jiaweiw@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: introduce buffer size parameter for hairpin
Bing Zhao [Tue, 24 Mar 2020 12:59:01 +0000 (20:59 +0800)]
net/mlx5: introduce buffer size parameter for hairpin

When creating a hairpin queue, the total data size and the maximal
number of packets are interrelated. The differ is the stride size.
Larger buffer size means big packet like jumbo could be supported,
but in the meanwhile, it will introduce more cache misses and have a
side effect on the performance.
Now a new device parameter "hp_buf_log_sz" is introduced for
applications to set the total data buffer size (the logarithm value).
Then the maximal number of packets will also be calculated
automatically by this value.
Applications could also change this value to a larger one in order
to support larger packets in hairpin case. A smaller value will be
beneficial for memory consumption.
If it is not set, the default value will be used.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/thunderx: use dynamic log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:56 +0000 (21:41 -0700)]
net/thunderx: use dynamic log type

The PMD static logtype is original DPDK legacy and should not be used.

Fixes: 43362c6a7647 ("net/thunderx: support RSS and RETA query and update")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/dpaa: use dynamic log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:55 +0000 (21:41 -0700)]
net/dpaa: use dynamic log type

The static PMD logtype should not be used by drivers.
Instead, use existing log macros in this driver.

Also use standard rte_ether routine to format ether address.

Fixes: 37f9b54bd3cf ("net/dpaa: support Tx and Rx queue setup")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/bnxt: do not use PMD log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:54 +0000 (21:41 -0700)]
net/bnxt: do not use PMD log type

Accidental use of PMD logtype rather than per-driver logtype.

Fixes: 14255b351537 ("net/bnxt: fix queue start/stop operations")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
4 years agonet/pfe: do not use PMD log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:53 +0000 (21:41 -0700)]
net/pfe: do not use PMD log type

The PMD logtype is a legacy from original DPDK logging.
All drivers must use their own dynamic log type.

Fixes: b1bc1afa4a0e ("net/pfe: support dynamic logging")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/tap: do not use PMD log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:52 +0000 (21:41 -0700)]
net/tap: do not use PMD log type

The PMD logtype is legacy and drivers should use their own logtype.

Fixes: 050316a88313 ("net/tap: support TSO (TCP Segment Offload)")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/virtio: do not use PMD log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:51 +0000 (21:41 -0700)]
net/virtio: do not use PMD log type

Virtio driver has its own logtype and should not use legacy
PMD logtype.

Fixes: 32c118fd0059 ("virtio: free mbuf's with threshold")
Fixes: e5f456a98d3c ("net/virtio: support in-order Rx and Tx")
Fixes: 1c8489da561b ("net/virtio-user: fix multi-process support")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/mvneta: do not use PMD log type
Stephen Hemminger [Tue, 31 Mar 2020 04:41:50 +0000 (21:41 -0700)]
net/mvneta: do not use PMD log type

The PMD logtype is legacy and should not be used.

Fixes: 3378383dceab ("net/mvneta: support statistics reset")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agoexamples/vmdq: fix output of pools/queues
Junyu Jiang [Mon, 2 Mar 2020 06:41:21 +0000 (06:41 +0000)]
examples/vmdq: fix output of pools/queues

To match the pools/queues configuration, the pools/queues output
should start from VMDQ base queue. This patch fixed the issue.

Fixes: 6bb97df521aa ("examples/vmdq: new app")
Cc: stable@dpdk.org
Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Tested-by: Yingya Han <yingyax.han@intel.com>
4 years agonet/ice: support flow ops thread safe
Beilei Xing [Mon, 30 Mar 2020 17:38:53 +0000 (01:38 +0800)]
net/ice: support flow ops thread safe

For DCF, flow ops may be executed in different threads,
so an thread safe option for generic flow APIs is needed.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice: support flow redirect
Beilei Xing [Mon, 30 Mar 2020 17:38:52 +0000 (01:38 +0800)]
net/ice: support flow redirect

Add a new ops "redirect" to flow engine, it's used to implement the
function that redirect a flow's destination. Currently only support
VSI-Redirect which will be used by DCF for handling VF-VSI mapping
table change.
A new API "ice_flow_redirect" is exposed, current usage is: it could
be called when there's VF-VSI mapping table change caused by VF reset.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agocommon/mlx5: fix RSS key copy to TIR context
Dekel Peled [Sun, 29 Mar 2020 09:18:27 +0000 (12:18 +0300)]
common/mlx5: fix RSS key copy to TIR context

In function mlx5_devx_cmd_create_tir(), the 40 bytes of RSS key are
copied in 10 iterations, 4 bytes each time using the MLX5_SET macro.
As result the RSS key is copied into TIR context in swapped byte order.
This patch fixes the issue, using memcpy() to copy the RSS key as is.
The struct member mlx5_devx_tir_attr.rx_hash_toeplitz_key is updated
to byte array type.

Fixes: c3aea272eed8 ("net/mlx5: create advanced Rx object via DevX")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: check device status before creating flow
Bing Zhao [Tue, 24 Mar 2020 15:34:00 +0000 (15:34 +0000)]
net/mlx5: check device status before creating flow

By default, flows are categorized into two types of a mlx5 device.
  1. The PMD driver will create some default flows to enable the
     traffic and give some default behaviors on the packets. And
     this is transparent to the upper layer application.
  2. Other flows will be created in the application based on its
     needs.
When in the old cached mode for application flows, it is allowed
to created the flow before the device is started. And when
starting the device, all the flows will be applied to the hardware
and take effect. The cached flows will be also applied in the same
time.
In non-cached mode, all the flows will never be cached when stopping
a device. So it makes no sense to insert any flow into the device
before it is started. Default flows owned by PMD driver are not
affected in this case.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: separate the flow handle resource
Bing Zhao [Tue, 24 Mar 2020 15:33:59 +0000 (15:33 +0000)]
net/mlx5: separate the flow handle resource

Only the members of flow handle structure will be used when trying
to destroy a flow. Other members of mlx5 device flow resource will
only be used for flow creating, and they could be reused for different
flows.
So only the device flow handle structure needs to be saved for further
usage. This could be separated from the whole mlx5 device flow and
stored with a list for each rte flow.
Other members will be pre-allocated with an array, and an index will
be used to help to apply each device flow to the hardware.
The flow handle sizes of Verbs and DV mode will be different, and
some calculation could be done before allocating a verbs handle.
Then the total memory consumption will less for Verbs when there is
no inbox driver being used.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: reorganize flow structures
Bing Zhao [Tue, 24 Mar 2020 15:33:58 +0000 (15:33 +0000)]
net/mlx5: reorganize flow structures

Common structures used for mlx5 flow creating and destroying are
reorganized in order to separating the parts only for destroying
from all the items.
The "mlx5_flow" will contain the common items of DV and Verbs flow,
specific items for DV / Verbs only. These items will only be used
when creating a flow.
At the end of "mlx5_flow", a nested structure "mlx5_flow_handle"
located. It contains all the items used both for creating and
destroying a flow. Also, it consists of common items, and DV / Verbs
specific items.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: change operations for non-cached flows
Bing Zhao [Tue, 24 Mar 2020 15:33:57 +0000 (15:33 +0000)]
net/mlx5: change operations for non-cached flows

When stopping a mlx5 device, all the flows inserted will be flushed
since they are with non-cached mode. And no more action will be done
for these flows in the device closing stage.
If the device restarts after stopped, no flow with non-cached mode
will be re-inserted.
The flush operation through rte interface will remain the same, and
all the flows will be flushed actively.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix zero value validation for metadata
Wisam Jaddo [Thu, 26 Mar 2020 10:22:00 +0000 (10:22 +0000)]
net/mlx5: fix zero value validation for metadata

MARK and META items are interrelated with datapath -
they might move from/to the applications in mbuf.

zero value for these items has the special meaning -
it means "no metadata are provided", not zero values
are treated by applications and PMD as valid ones.

Moreover in the flow engine domain the value zero is
acceptable to match and set, and we should allow to
specify zero values as rte_flow parameters for the
META and MARK items and actions. In the same time
zero mask has no meaning and should be rejected
on validation stage.

Fixes: fcc8d2f716fd ("net/mlx5: extend flow metadata support")
Fixes: e554b672aa05 ("net/mlx5: support flow tag")
Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")
Cc: stable@dpdk.org
Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: fix call to modify action without init item
Asaf Penso [Wed, 25 Mar 2020 19:53:18 +0000 (19:53 +0000)]
net/mlx5: fix call to modify action without init item

The item is being set according to the attribute value, whether it is
udp/tcp or ipv4/6.
Also, there are two condition calls.

If the attribute is neither udp/tcp or ipv4/6 the item is not
initialized at all, but the call to the flow_dv_convert_modify_action is
still being done.
Also, even if the attribute is tcp/udp or ipv4/6, we still have two
conditions.

This patch changes the conditions, so the item will always be set.
By doing this, there is also a save in the number of condition calls.

Fixes: 4bb14c83df95 ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org
Signed-off-by: Asaf Penso <asafp@mellanox.com>
Reviewed-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: update VLAN and encap actions validation
Dekel Peled [Tue, 24 Mar 2020 12:58:11 +0000 (14:58 +0200)]
net/mlx5: update VLAN and encap actions validation

Flow rule in NIC table on VF representor should not contain VLAN pop
or push actions, and encap or decap actions. Using these actions in
NIC table on VF representor is not a valid use case.
This patch updates the various validation functions to reject such
rules.

Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Jack Min <jackmin@mellanox.com>
4 years agonet/mlx5: prefetch CQEs for a faster decompression
Alexander Kozyrev [Tue, 24 Mar 2020 14:45:30 +0000 (16:45 +0200)]
net/mlx5: prefetch CQEs for a faster decompression

Invalidation of consumed CQEs incurs a performance penalty
due to many cache misses caused by a non-sequential CQEs access.
Prefetch CQEs to get a better data locality and speed up the
decompression of CQEs. Prefetching reduces CPI rate of the
rxq_cq_decompress_v() function from 1 to 0.85 in my environment,
resulting in 2% boost in mpps for 64B frames single core test.

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix metadata for compressed Rx CQEs
Viacheslav Ovsiienko [Tue, 24 Mar 2020 12:15:18 +0000 (12:15 +0000)]
net/mlx5: fix metadata for compressed Rx CQEs

If packets with the same metadata are received with compressed CQE
the metadata value is not copied from the title packet in vectorized
rx_burst routines, it causes wrong metadata values seeing by
applications.

Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: create relaxed ordering memory regions
Shiri Kuzin [Tue, 24 Mar 2020 11:39:39 +0000 (13:39 +0200)]
net/mlx5: create relaxed ordering memory regions

In the current state, when preforming read/write
transactions we must wait for a completion in order
to run the next transaction, and all transactions are
performed by order.

Relaxed Ordering is a PCI optimization which by enabling it
we allow the system to perform read/writes in a different
order without having to wait for completion and improve
the performance in that matter.

This commit introduces the creation of relaxed ordering
memory regions in mlx5.
As relaxed ordering is an optimization, drivers that
do not support it can simply ignore it and therefore
it is enabled by default.

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agodoc: update mlx5 firmware configuration guidelines
Dekel Peled [Tue, 24 Mar 2020 11:31:25 +0000 (13:31 +0200)]
doc: update mlx5 firmware configuration guidelines

This patch updates the MLX5 PMD documentations, adding Flex parser
settings and correcting minimal versions numbers.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix validation of VXLAN/VXLAN-GPE specs
Raslan Darawsheh [Mon, 23 Mar 2020 14:21:33 +0000 (16:21 +0200)]
net/mlx5: fix validation of VXLAN/VXLAN-GPE specs

Trying to create zero spec for vni wasn't allowed, to
avoid matching all packets from previous layer (udp).
This behavior is incorrect, since VXLAN is being identified
through the outer UDP destination port.

Currently, if the user didn't specify outer UDP destination
port the PMD will automatically match only on  outer
UDP port of 4798, and if the user want to match on some none
standard port he need to specify it explicitly in the rule.

This removes the limitation of vni spec to be able to match any
vni.

Fixes: 23c1d42c7138 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/ixgbe: fix e-tag definition
Wei Zhao [Mon, 30 Mar 2020 06:33:23 +0000 (14:33 +0800)]
net/ixgbe: fix e-tag definition

e_tag_ether_type has been wrongly defined as bool type which introduces
a bug for etag/etag_strip for x550 NIC. Fixes it by defining it as
uint16_t.

Fixes: ad43b7bce95b ("net/ixgbe: avoid multiple definitions of bool")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
4 years agonet/ixgbe: fix link status inconsistencies
Tao Zhu [Wed, 26 Feb 2020 12:06:37 +0000 (20:06 +0800)]
net/ixgbe: fix link status inconsistencies

Setting LINK UP or LINK DOWN is divided into two parts, with
the main task done in a separate thread, which can take up
to 9 seconds. If cancel the thread in execution, may cause state
inconsistencies. Therefore, must wait for the previous setting
to exit normally before setting the new state.

Note: before using threads, use alarm to handle main tasks.
When canceling alarm, the execution of alarm will not be interrupted.

Fixes: 819d0d1d57f1 ("net/ixgbe: fix blocking system events")
Cc: stable@dpdk.org
Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Tested-by: Yu Jiang <yux.jiang@intel.com>
4 years agonet/ice: get VF hardware index in DCF
Haiyue Wang [Fri, 27 Mar 2020 02:56:41 +0000 (10:56 +0800)]
net/ice: get VF hardware index in DCF

The DCF (Device Config Function) needs the hardware index of the VFs to
control the flow setting. And also if the VF resets, the index may be
changed, so it should handle this in VF reset event.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice: handle PF initialization by DCF
Haiyue Wang [Fri, 27 Mar 2020 02:56:40 +0000 (10:56 +0800)]
net/ice: handle PF initialization by DCF

The DCF (Device Config Function) works at the user PF level, it can't
access the real PF hardware directly. So it will pass through the PF's
AdminQ command by the DCF's mailbox.

And the DCF is mainly used to control the flow setting of other VFs, so
it only needs to initialize some core functions related to the flow.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice: export DDP definition symbols
Haiyue Wang [Fri, 27 Mar 2020 02:56:39 +0000 (10:56 +0800)]
net/ice: export DDP definition symbols

A new DCF PMD will be introduced, which runs on Intel VF hardware, and
it is a pure software design to control the advance functionality (such
as switch, ACL) for rest of the VFs.

The DCF (Device Config Function) feature shares the core functions of
the ICE PMD, like it needs to export the DDP definition symbols for the
new DCF PMD use.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice: handle AdminQ command by DCF
Haiyue Wang [Fri, 27 Mar 2020 02:56:38 +0000 (10:56 +0800)]
net/ice: handle AdminQ command by DCF

The DCF (Device Config Function) splits the AdminQ command into two
parts: one is the descriptor of AdminQ command, the other is the buffer
of AdminQ command (the descriptor has BUF flag set). When both of them
are received by the PF, the PF will handle them as one command.

And also, the filled descriptor and buffer of the response will be sent
back to DCF one by one through the virtchnl from PF.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice: acquire and disable DCF capability
Haiyue Wang [Fri, 27 Mar 2020 02:56:37 +0000 (10:56 +0800)]
net/ice: acquire and disable DCF capability

Since the DCF (Device Config Function) controls the flow setting of
other VFs by the mailbox with PF, for security, it needs to acquire
the DCF capability from PF when starts, and disable it when exits.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/ice: add DCF hardware initialization
Haiyue Wang [Fri, 27 Mar 2020 02:56:36 +0000 (10:56 +0800)]
net/ice: add DCF hardware initialization

Introduce the DCF (Device Config Function) feature in the ice PMD, it
works as a standalone PMD which doesn't handle the packet Rx/Tx related
things. Its hardware entity is the VF.

Add the basic DCF hardware initialization, this is specified by devarg
'cap=dcf'.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: stop PCI probe in DCF mode
Haiyue Wang [Fri, 27 Mar 2020 02:56:35 +0000 (10:56 +0800)]
net/iavf: stop PCI probe in DCF mode

A new DCF PMD will be introduced, which runs on Intel VF hardware, and
it is a pure software design to control the advance functionality (such
as switch, ACL) for rest of the VFs.

So if the DCF (Device Config Function) mode is specified by the devarg
'cap=dcf', then it will stop the PCI probe in the iavf PMD.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
4 years agonet/iavf: unify Rx packet type table
Shougang Wang [Fri, 6 Mar 2020 02:24:19 +0000 (02:24 +0000)]
net/iavf: unify Rx packet type table

This patch unified the Rx ptype table.

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
4 years agocommon/iavf: support VSI mapping table
Qi Zhang [Tue, 10 Mar 2020 00:37:11 +0000 (08:37 +0800)]
common/iavf: support VSI mapping table

Add an opcode for getting VSI mapping table.
Add an virtchnl event code for VF reset done.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
4 years agocommon/iavf: support DCF capability negotiation
Qi Zhang [Tue, 10 Mar 2020 00:37:10 +0000 (08:37 +0800)]
common/iavf: support DCF capability negotiation

Add DCF capability flag for VF.
Add an opcode for disabling DCF capability.
Add an virtchnl event code for AVF resetting completion.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
4 years agocommon/iavf: add two opcodes to send AdminQ command
Qi Zhang [Tue, 10 Mar 2020 00:37:09 +0000 (08:37 +0800)]
common/iavf: add two opcodes to send AdminQ command

Add two virtchnl opcodes to send the AdminQ command, one is used to
send the descriptor, the other is used to send the buffer payload if
the AdminQ command has BUF flag set.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
4 years agocommon/iavf: update copyright date
Qi Zhang [Tue, 10 Mar 2020 00:37:08 +0000 (08:37 +0800)]
common/iavf: update copyright date

Update copyright date to 2020.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
4 years agonet/ice/base: add PPPoE IPv6 dummy packet
Qi Zhang [Mon, 23 Mar 2020 07:17:59 +0000 (15:17 +0800)]
net/ice/base: add PPPoE IPv6 dummy packet

In order to support switch rule for PPPOE packet
with ipv6 payload, it has to use a new dummy packet
with ipv6 format.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add reference count to tunnels
Qi Zhang [Mon, 23 Mar 2020 07:17:58 +0000 (15:17 +0800)]
net/ice/base: add reference count to tunnels

Add a lock for protecting the tunnel table while adding, removing
and searching tunnels.

Add reference counting to tunnels so that multiple instances
of the same tunnel port can be created. Only physically
destroy the tunnel when all instances of that tunnel have been
destroyed.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add check to IPv4 next protocol
Qi Zhang [Mon, 23 Mar 2020 07:17:57 +0000 (15:17 +0800)]
net/ice/base: add check to IPv4 next protocol

In order to support switch rule for NVGRE packets,
it need to check ipv4 next protocol number, if it is 0x2F,
which means next payload is NVGRE, we need to use NVGRE
format dummy packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: cleanup flow director functions
Qi Zhang [Mon, 23 Mar 2020 07:17:56 +0000 (15:17 +0800)]
net/ice/base: cleanup flow director functions

Cleanup some things found while doing code review:

- Remove unnecessary initializations, parenthesis, and braces
- Fix a couple of function headers

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix MAC write command
Qi Zhang [Mon, 23 Mar 2020 07:17:55 +0000 (15:17 +0800)]
net/ice/base: fix MAC write command

The manage MAC write command was implemented in an overly complex way
that actually didn't work, as it wasn't symmetric to the manage MAC
read command, and was feeding bytes out of order to the firmware. Fix
the implementation by just using a simple array to represent the MAC
address when it is being written via firmware command.

Fixes: a90fae1d0755 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: check DDP package compatibility
Qi Zhang [Mon, 23 Mar 2020 07:17:54 +0000 (15:17 +0800)]
net/ice/base: check DDP package compatibility

Check the OS and NVM package versions before downloading the package.
If the OS package version is not compatible with NVM then return an
appropriate error.

Split the 32-byte segment name into a 28-byte segment name and
a 4-byte Track-ID. Older packages will still work with this change
because no package has a name that will take up more than 28 bytes;
in this case the Track-ID will be 0.

Note that the driver will store the segment name as 32-bytes in the
ice_hw structure, in order to normalize the length of the various
package name strings that it uses.

Also add section ID and structure for the segment metadata section.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: discover and store size of available flash
Qi Zhang [Mon, 23 Mar 2020 07:17:53 +0000 (15:17 +0800)]
net/ice/base: discover and store size of available flash

When reading from the NVM using a flat address, it is useful to know the
upper bound on the size of the flash contents. This value is not stored
within the NVM.

We can determine the size by performing a bisection between upper and
lower bounds. It is known that the size cannot exceed 16 MB (offset of
0xFFFFFF).

Use a while loop to bisect the upper and lower bounds by reading one
byte at a time. On a failed read, lower the maximum bound. On
a successful read, increase the lower bound.

Save this as the flash_size in the ice_nvm_info structure that contains
data related to the NVM.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: move functions from common to NVM module
Qi Zhang [Mon, 23 Mar 2020 07:17:52 +0000 (15:17 +0800)]
net/ice/base: move functions from common to NVM module

The ice_get_pfa_module_tlv and ice_read_pba_string functions primarily
deal with reading from the Shadow RAM portion of the NVM contents. As
these functions are NVM focused, move them into the ice_nvm.c file.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: do not access some hardware registers in DCF
Qi Zhang [Mon, 23 Mar 2020 07:17:51 +0000 (15:17 +0800)]
net/ice/base: do not access some hardware registers in DCF

DCF runs as a VF so it can't access PF registers. And export the filter
management list static functions as public for make DCF initialization.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add hook to send AdminQ command
Qi Zhang [Mon, 23 Mar 2020 07:17:50 +0000 (15:17 +0800)]
net/ice/base: add hook to send AdminQ command

Add the hook to send the PF's AdminQ command in another path, like not
directly to the firmware.

If the AdminQ command is sent through the hook path, it needs to save
the AQ error codes from firmware as the last status for admin control
queue, so that the AdminQ command function can use it to do exception
handling like the buffer size is not enough according to error ENOMEM.

And convert explicitly the hook path result to the ice_status type.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: update copyright date
Qi Zhang [Mon, 23 Mar 2020 07:17:49 +0000 (15:17 +0800)]
net/ice/base: update copyright date

Update copyright date to 2020.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add ACL module
Qi Zhang [Mon, 23 Mar 2020 07:17:48 +0000 (15:17 +0800)]
net/ice/base: add ACL module

Add all ACL related code.

Signed-off-by: Real Valiquette <real.valiquette@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: store NVM version in extracted format
Qi Zhang [Mon, 23 Mar 2020 07:17:47 +0000 (15:17 +0800)]
net/ice/base: store NVM version in extracted format

Currently the NVM and Option ROM version information is stored in
a minimal format. The ice_get_nvm_version function exists to extract
this information for display.

This needlessly complicates using these fields as the extraction
function must be called to parse the NVM and Option ROM data. Further
confusion occurs because the prefix of "oem_" is used for the Option
ROM version. This appears to have been done because the Option ROM data
was requested for display by OEMs.

Refactor this code so that the NVM version and Option ROM version
components are extracted immediately.

Introduce a new struct ice_orom_info which will store the Option ROM
major, build, and patch numbers. Introduce the new major_ver and
minor_ver fields to store the NVM version in its high and low byte
components.

Remove the ice_get_nvm_version function. Instead, use the same logic to
convert the fields read from the NVM into the extracted format.

This simplifies use of these fields as they will be stored already
parsed, without needing to use the bit masks or call
ice_get_nvm_version.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support PHY persistent feature
Qi Zhang [Mon, 23 Mar 2020 07:17:46 +0000 (15:17 +0800)]
net/ice/base: support PHY persistent feature

In this patch, we will modify the ice_copy_phy_caps_to_cfg(...) function
to conditionally fill up the
ice_aqc_set_phy_cfg_data.module_compliance_enforcement with correct
value, based on the PHY persistent feature.

Apply the ice_copy_phy_caps_to_cfg() function inside ice_set_fc()

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix a couple of casting
Qi Zhang [Mon, 23 Mar 2020 07:17:45 +0000 (15:17 +0800)]
net/ice/base: fix a couple of casting

Adjust variable size between u8 and u16 to fix casting issues
Also fix couple coding style issues

Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: implement new shadow RAM read
Qi Zhang [Mon, 23 Mar 2020 07:17:44 +0000 (15:17 +0800)]
net/ice/base: implement new shadow RAM read

Remove the ice_read_sr_aq function and implement ice_read_sr_word_aq
directly in terms of the new ice_read_flat_nvm function. This simplifies
the code by reducing a now unnecessary reading function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add macro specifying max NVM offset
Qi Zhang [Mon, 23 Mar 2020 07:17:43 +0000 (15:17 +0800)]
net/ice/base: add macro specifying max NVM offset

The ice_aq_read_nvm function uses a somewhat weird construction for
verifying that the incoming offset is valid. Replace this construction
with a simple greater-than expression, and define the maximum value
(24bits) in the ice_adminq_cmd.h

By providing a macro, the check becomes more clear. Additionally the
maximum offset can be used in other locations.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: extract logic of flat NVM read to function
Qi Zhang [Mon, 23 Mar 2020 07:17:42 +0000 (15:17 +0800)]
net/ice/base: extract logic of flat NVM read to function

The ice_read_sr_buf_aq function implements logic to correctly break
apart NVM reads into 4Kb chunks. Additionally, it ensures that each read
never crosses a Shadow RAM sector boundary. This logic is useful when
reading the flat NVM as a byte-addressable stream.

Extract that logic in terms of bytes and implement it as
ice_read_flat_nvm. Use this new function to implement ice_read_sr_buf_aq
function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add AN masks to get PHY capabilities
Qi Zhang [Mon, 23 Mar 2020 07:17:41 +0000 (15:17 +0800)]
net/ice/base: add AN masks to get PHY capabilities

Adds masks indicating AN clauses to the Get PHY Capabilities
command. Changes the name of the low_power_ctrl field to be
properly descriptive of it being an AN field.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add shared driver parameter command
Qi Zhang [Mon, 23 Mar 2020 07:17:40 +0000 (15:17 +0800)]
net/ice/base: add shared driver parameter command

Adds the Driver Shared Parameters (0x0C90) AQ command.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add PHY number definition values
Qi Zhang [Mon, 23 Mar 2020 07:17:39 +0000 (15:17 +0800)]
net/ice/base: add PHY number definition values

As title.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: capitalize abbreviations
Qi Zhang [Mon, 23 Mar 2020 07:17:38 +0000 (15:17 +0800)]
net/ice/base: capitalize abbreviations

Fix abbreviations as found by abbrevcheck

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add dedicate MAC type for E810
Qi Zhang [Mon, 23 Mar 2020 07:17:37 +0000 (15:17 +0800)]
net/ice/base: add dedicate MAC type for E810

Add a new MAC type ICE_MAC_E810 to distinguish E810 devices from other
devices. MAC types for all other devices will be ICE_MAC_GENERIC till
there's a need to distinguish further between devices.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support link default override
Qi Zhang [Mon, 23 Mar 2020 07:17:36 +0000 (15:17 +0800)]
net/ice/base: support link default override

Adds functions to check for link override firmware support and get
the override settings for a port. Link override allows a user to force
link settings that are not normally supported.

Firmware support is version dependent so a function to check support has
been added.

The link FC settings will use the override if available.

Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support GTPU uplink and downlink
Qi Zhang [Mon, 23 Mar 2020 07:17:35 +0000 (15:17 +0800)]
net/ice/base: support GTPU uplink and downlink

Enable GTPU uplink and downlink flag usage.
TCAM with different GTPU extend header flag can be separated.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: minor fixes
Qi Zhang [Mon, 23 Mar 2020 07:17:34 +0000 (15:17 +0800)]
net/ice/base: minor fixes

This is a collection of minor fixes that were found during code review.
Changes are:
- Call ice_hweight8() instead of calculating it ourselves in
  ice_bits_max_set().
- Call ice_test_and_clear_bit() over calling ice_is_bit_set() then
  ice_clear_bit() in ice_rem_vsi_rss_list().
- Remove 'chrs' variable in ice_add_prof_id_flow() as it's not being
  used for anything.
- Return result directly instead of assigning to variable then
  returning the variable in ice_rem_vsig().
- Reduce scope, and don't initialize, 'or_vsig' in
  ice_add_prof_id_flow().
- Return error immediately in ice_add_prof_id_vsig(). Since the memory
  wasn't allocated, there is no need to goto and attempt to free memory.
- Show that values 37-38 are reserved in ice_flow_avf_hdr_field as the
  other reserved values are shown.
- Fix RCT ordering
- Remove initialization of values that aren't needed
- Fix function headers to match function names
- Use offsetof instead of calculating ourselves in ice_pkg_buf_alloc()
- In ice_rem_prof(), do not set status to ICE_SUCCESS as, due to code
  flow, this will always be ICE_SUCCESS.
- Remove unnecessary semicolon in ice_prof_gen_key()
- Remove unnecessary initializations
- correct bw_alloc type in ice_sched_add_root_node

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add NVM netlist macros
Qi Zhang [Mon, 23 Mar 2020 07:17:33 +0000 (15:17 +0800)]
net/ice/base: add NVM netlist macros

As title, these macros are added for future use.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: refactor a function
Qi Zhang [Mon, 23 Mar 2020 07:17:32 +0000 (15:17 +0800)]
net/ice/base: refactor a function

Refactor function ice_prof_bld_xlt2, a switch statement is better suited
for this situation and eliminates the need for the "found" variable.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: use descriptive variable name than type
Qi Zhang [Mon, 23 Mar 2020 07:17:31 +0000 (15:17 +0800)]
net/ice/base: use descriptive variable name than type

The variable name 'type' is not very descriptive. Replace instances of
those with a variable name that is more descriptive or replace it if not
needed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: use struct size helper
Qi Zhang [Mon, 23 Mar 2020 07:17:30 +0000 (15:17 +0800)]
net/ice/base: use struct size helper

For structures using the common C "struct hack" technique to create a
flexible length structure member at the end of the structure, use the
ice_struct_size macro to determine the length of the structure instead
of open coding the calculation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: replace u16 with enum
Qi Zhang [Mon, 23 Mar 2020 07:17:29 +0000 (15:17 +0800)]
net/ice/base: replace u16 with enum

Use enum ice_flow_field directly so no need to be converted
from u16 for ice_flow_xtract_fld

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: allow VLAN and ethertype filter for port
Qi Zhang [Mon, 23 Mar 2020 07:17:28 +0000 (15:17 +0800)]
net/ice/base: allow VLAN and ethertype filter for port

Add new API function which allow user to choose port on which
VLAN and ethertype rule going to be added.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: read PSM clock frequency from register
Qi Zhang [Mon, 23 Mar 2020 07:17:27 +0000 (15:17 +0800)]
net/ice/base: read PSM clock frequency from register

Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock
frequency is selected.  This ensures that the rate limiter profile
calculations will be correct.

Fixes: 453d087ccaff ("net/ice/base: add common functions")
Cc: stable@dpdk.org
Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix removing MAC rule
Qi Zhang [Mon, 23 Mar 2020 07:17:26 +0000 (15:17 +0800)]
net/ice/base: fix removing MAC rule

Send correct recp_list to ice_remove_mac_rule. ICE_SW_LKUP_ETHERTYPE
rule list was sent instead of ICE_SW_LKUP_MAC. That caused problem
with adding new mac rule on VF, because rule wasn't removed correctly.

Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Cc: stable@dpdk.org
Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add and update E822 device IDs
Qi Zhang [Mon, 23 Mar 2020 07:17:25 +0000 (15:17 +0800)]
net/ice/base: add and update E822 device IDs

Add the device IDs for the Intel(R) Ethernet Connection E822-L and
E822-X SKUs. Update the codenames and branding strings for the previous
C822N device IDs which should be using E822-C.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix uninitialized stack variables
Qi Zhang [Mon, 23 Mar 2020 07:17:24 +0000 (15:17 +0800)]
net/ice/base: fix uninitialized stack variables

Via code inspection, I found that some partially initialized
stack variables were being passed along to called functions,
which could eventually result in those uninitialized members
being used.  To fix this, make sure the local variables are
zeroed out before partially initializing them.  This should
prevent any unintended consequences from using stack memory that
might have junk in it.

In addition to the memsets, this patch also initializes one
member in one function, that needed to be initialized to non-zero.

Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/hns3: fix return value of setting VLAN offload
Chengwen Feng [Thu, 26 Mar 2020 07:14:33 +0000 (15:14 +0800)]
net/hns3: fix return value of setting VLAN offload

Currently, the '.vlan_offload_set' ops implementation function named
hns3vf_vlan_offload_set always return 0 in hns3 VF PMD driver.

This patch fixes it with the following modification in the function
named hns3vf_vlan_offload_set.
1. Avoid setting hardware configuration and return -EIO during resetting.
2. Add the return value detection process for calling internal static
   function named hns3vf_en_hw_strip_rxvtag.

Fixes: a5475d61fa34 ("net/hns3: support VF")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: fix mailbox opcode data type
Min Hu (Connor) [Thu, 26 Mar 2020 07:14:32 +0000 (15:14 +0800)]
net/hns3: fix mailbox opcode data type

The mailbox opcode is defined as one byte in datasheet which is not
compatible with that in the current hns3 PMD driver.

This patch fixes the data type of the local variable for mailbox opcode
in driver, changing from uint16_t to uint8_t.

Fixes: 463e748964f5 ("net/hns3: support mailbox")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
4 years agonet/hns3: fix configuring RSS hash when rules are flushed
Lijun Ou [Thu, 26 Mar 2020 07:14:31 +0000 (15:14 +0800)]
net/hns3: fix configuring RSS hash when rules are flushed

Currently, when performing test case as follow:
1. Run testpmd application based on hns3 network engine with multiple
   receive queues(--rxq=N --txq=N, N>1).
2. Create the special RSS rules by "create flow ..." command in the
   command prompt of the testpmd application.
3. Flush the RSS rules created in step 2 by "flow flush ..." command.
4. Enable RSS by "port config all rss all" command.
In step 4, the command exeuctes successfully. This phenomenon is
inconsistent with the expectation. The API function named
rte_eth_dev_rss_hash_update called in the command should return error
and the command should fail.

This patch fixes it by adding a flag for disabling RSS in the driver.
When RSS rules is flushed, we set the the flag with true, and the
'.rss_hash_update' ops implementation function named
hns3_dev_rss_hash_update return -EINVAL.

Fixes: c37ca66f2b27 ("net/hns3: support RSS")
Cc: stable@dpdk.org
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>