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37 #include <sys/queue.h>
39 #include <rte_memory.h>
40 #include <rte_memzone.h>
41 #include <rte_per_lcore.h>
42 #include <rte_launch.h>
43 #include <rte_atomic.h>
44 #include <rte_tailq.h>
46 #include <rte_per_lcore.h>
47 #include <rte_lcore.h>
55 * - The main test function performs three subtests. The first test
56 * checks that the usual inc/dec/add/sub functions are working
59 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to specific
62 * - These variables are incremented and decremented on each core at
63 * the same time in ``test_atomic_usual()``.
65 * - The function checks that once all lcores finish their function,
66 * the value of the atomic variables are still the same.
68 * - The second test verifies the behavior of "test and set" functions.
70 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
72 * - Invoke ``test_atomic_tas()`` on each lcore: before doing anything
73 * else. The cores are waiting a synchro using ``while
74 * (rte_atomic32_read(&val) == 0)`` which is triggered by the main test
75 * function. Then all cores do a
76 * ``rte_atomicXX_test_and_set()`` at the same time. If it is successful,
77 * it increments another atomic counter.
79 * - The main function checks that the atomic counter was incremented
80 * twice only (one for 16-bit, one for 32-bit and one for 64-bit values).
82 * - Test "add/sub and return"
84 * - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
86 * - Invoke ``test_atomic_addsub_return()`` on each lcore. Before doing
87 * anything else, the cores are waiting a synchro. Each lcore does
88 * this operation several times::
90 * tmp = rte_atomicXX_add_return(&a, 1);
91 * atomic_add(&count, tmp);
92 * tmp = rte_atomicXX_sub_return(&a, 1);
93 * atomic_sub(&count, tmp+1);
95 * - At the end of the test, the *count* value must be 0.
98 #define NUM_ATOMIC_TYPES 3
102 static rte_atomic16_t a16;
103 static rte_atomic32_t a32;
104 static rte_atomic64_t a64;
105 static rte_atomic64_t count;
106 static rte_atomic32_t synchro;
109 test_atomic_usual(__attribute__((unused)) void *arg)
113 while (rte_atomic32_read(&synchro) == 0)
116 for (i = 0; i < N; i++)
117 rte_atomic16_inc(&a16);
118 for (i = 0; i < N; i++)
119 rte_atomic16_dec(&a16);
120 for (i = 0; i < (N / 5); i++)
121 rte_atomic16_add(&a16, 5);
122 for (i = 0; i < (N / 5); i++)
123 rte_atomic16_sub(&a16, 5);
125 for (i = 0; i < N; i++)
126 rte_atomic32_inc(&a32);
127 for (i = 0; i < N; i++)
128 rte_atomic32_dec(&a32);
129 for (i = 0; i < (N / 5); i++)
130 rte_atomic32_add(&a32, 5);
131 for (i = 0; i < (N / 5); i++)
132 rte_atomic32_sub(&a32, 5);
134 for (i = 0; i < N; i++)
135 rte_atomic64_inc(&a64);
136 for (i = 0; i < N; i++)
137 rte_atomic64_dec(&a64);
138 for (i = 0; i < (N / 5); i++)
139 rte_atomic64_add(&a64, 5);
140 for (i = 0; i < (N / 5); i++)
141 rte_atomic64_sub(&a64, 5);
147 test_atomic_tas(__attribute__((unused)) void *arg)
149 while (rte_atomic32_read(&synchro) == 0)
152 if (rte_atomic16_test_and_set(&a16))
153 rte_atomic64_inc(&count);
154 if (rte_atomic32_test_and_set(&a32))
155 rte_atomic64_inc(&count);
156 if (rte_atomic64_test_and_set(&a64))
157 rte_atomic64_inc(&count);
163 test_atomic_addsub_and_return(__attribute__((unused)) void *arg)
170 while (rte_atomic32_read(&synchro) == 0)
173 for (i = 0; i < N; i++) {
174 tmp16 = rte_atomic16_add_return(&a16, 1);
175 rte_atomic64_add(&count, tmp16);
177 tmp16 = rte_atomic16_sub_return(&a16, 1);
178 rte_atomic64_sub(&count, tmp16+1);
180 tmp32 = rte_atomic32_add_return(&a32, 1);
181 rte_atomic64_add(&count, tmp32);
183 tmp32 = rte_atomic32_sub_return(&a32, 1);
184 rte_atomic64_sub(&count, tmp32+1);
186 tmp64 = rte_atomic64_add_return(&a64, 1);
187 rte_atomic64_add(&count, tmp64);
189 tmp64 = rte_atomic64_sub_return(&a64, 1);
190 rte_atomic64_sub(&count, tmp64+1);
197 * rte_atomic32_inc_and_test() would increase a 32 bits counter by one and then
198 * test if that counter is equal to 0. It would return true if the counter is 0
199 * and false if the counter is not 0. rte_atomic64_inc_and_test() could do the
200 * same thing but for a 64 bits counter.
201 * Here checks that if the 32/64 bits counter is equal to 0 after being atomically
202 * increased by one. If it is, increase the variable of "count" by one which would
203 * be checked as the result later.
207 test_atomic_inc_and_test(__attribute__((unused)) void *arg)
209 while (rte_atomic32_read(&synchro) == 0)
212 if (rte_atomic16_inc_and_test(&a16)) {
213 rte_atomic64_inc(&count);
215 if (rte_atomic32_inc_and_test(&a32)) {
216 rte_atomic64_inc(&count);
218 if (rte_atomic64_inc_and_test(&a64)) {
219 rte_atomic64_inc(&count);
226 * rte_atomicXX_dec_and_test() should decrease a 32 bits counter by one and then
227 * test if that counter is equal to 0. It should return true if the counter is 0
228 * and false if the counter is not 0.
229 * This test checks if the counter is equal to 0 after being atomically
230 * decreased by one. If it is, increase the value of "count" by one which is to
231 * be checked as the result later.
234 test_atomic_dec_and_test(__attribute__((unused)) void *arg)
236 while (rte_atomic32_read(&synchro) == 0)
239 if (rte_atomic16_dec_and_test(&a16))
240 rte_atomic64_inc(&count);
242 if (rte_atomic32_dec_and_test(&a32))
243 rte_atomic64_inc(&count);
245 if (rte_atomic64_dec_and_test(&a64))
246 rte_atomic64_inc(&count);
254 rte_atomic16_init(&a16);
255 rte_atomic32_init(&a32);
256 rte_atomic64_init(&a64);
257 rte_atomic64_init(&count);
258 rte_atomic32_init(&synchro);
260 rte_atomic16_set(&a16, 1UL << 10);
261 rte_atomic32_set(&a32, 1UL << 10);
262 rte_atomic64_set(&a64, 1ULL << 33);
264 printf("usual inc/dec/add/sub functions\n");
266 rte_eal_mp_remote_launch(test_atomic_usual, NULL, SKIP_MASTER);
267 rte_atomic32_set(&synchro, 1);
268 rte_eal_mp_wait_lcore();
269 rte_atomic32_set(&synchro, 0);
271 if (rte_atomic16_read(&a16) != 1UL << 10) {
272 printf("Atomic16 usual functions failed\n");
276 if (rte_atomic32_read(&a32) != 1UL << 10) {
277 printf("Atomic32 usual functions failed\n");
281 if (rte_atomic64_read(&a64) != 1ULL << 33) {
282 printf("Atomic64 usual functions failed\n");
286 printf("test and set\n");
288 rte_atomic64_set(&a64, 0);
289 rte_atomic32_set(&a32, 0);
290 rte_atomic16_set(&a16, 0);
291 rte_atomic64_set(&count, 0);
292 rte_eal_mp_remote_launch(test_atomic_tas, NULL, SKIP_MASTER);
293 rte_atomic32_set(&synchro, 1);
294 rte_eal_mp_wait_lcore();
295 rte_atomic32_set(&synchro, 0);
297 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
298 printf("Atomic test and set failed\n");
302 printf("add/sub and return\n");
304 rte_atomic64_set(&a64, 0);
305 rte_atomic32_set(&a32, 0);
306 rte_atomic16_set(&a16, 0);
307 rte_atomic64_set(&count, 0);
308 rte_eal_mp_remote_launch(test_atomic_addsub_and_return, NULL,
310 rte_atomic32_set(&synchro, 1);
311 rte_eal_mp_wait_lcore();
312 rte_atomic32_set(&synchro, 0);
314 if (rte_atomic64_read(&count) != 0) {
315 printf("Atomic add/sub+return failed\n");
320 * Set a64, a32 and a16 with the same value of minus "number of slave
321 * lcores", launch all slave lcores to atomically increase by one and
322 * test them respectively.
323 * Each lcore should have only one chance to increase a64 by one and
324 * then check if it is equal to 0, but there should be only one lcore
325 * that finds that it is 0. It is similar for a32 and a16.
326 * Then a variable of "count", initialized to zero, is increased by
327 * one if a64, a32 or a16 is 0 after being increased and tested
329 * We can check if "count" is finally equal to 3 to see if all slave
330 * lcores performed "atomic inc and test" right.
332 printf("inc and test\n");
334 rte_atomic64_clear(&a64);
335 rte_atomic32_clear(&a32);
336 rte_atomic16_clear(&a16);
337 rte_atomic32_clear(&synchro);
338 rte_atomic64_clear(&count);
340 rte_atomic64_set(&a64, (int64_t)(1 - (int64_t)rte_lcore_count()));
341 rte_atomic32_set(&a32, (int32_t)(1 - (int32_t)rte_lcore_count()));
342 rte_atomic16_set(&a16, (int16_t)(1 - (int16_t)rte_lcore_count()));
343 rte_eal_mp_remote_launch(test_atomic_inc_and_test, NULL, SKIP_MASTER);
344 rte_atomic32_set(&synchro, 1);
345 rte_eal_mp_wait_lcore();
346 rte_atomic32_clear(&synchro);
348 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
349 printf("Atomic inc and test failed %d\n", (int)count.cnt);
354 * Same as above, but this time we set the values to "number of slave
355 * lcores", and decrement instead of increment.
357 printf("dec and test\n");
359 rte_atomic32_clear(&synchro);
360 rte_atomic64_clear(&count);
362 rte_atomic64_set(&a64, (int64_t)(rte_lcore_count() - 1));
363 rte_atomic32_set(&a32, (int32_t)(rte_lcore_count() - 1));
364 rte_atomic16_set(&a16, (int16_t)(rte_lcore_count() - 1));
365 rte_eal_mp_remote_launch(test_atomic_dec_and_test, NULL, SKIP_MASTER);
366 rte_atomic32_set(&synchro, 1);
367 rte_eal_mp_wait_lcore();
368 rte_atomic32_clear(&synchro);
370 if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
371 printf("Atomic dec and test failed\n");
378 static struct test_command atomic_cmd = {
379 .command = "atomic_autotest",
380 .callback = test_atomic,
382 REGISTER_TEST_COMMAND(atomic_cmd);