4c7bc72eb5fdf3a5435083fb0cdb9d70cc01288d
[dpdk.git] / app / test-crypto-perf / cperf_test_latency.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2016-2017 Intel Corporation
3  */
4
5 #include <rte_malloc.h>
6 #include <rte_cycles.h>
7 #include <rte_crypto.h>
8 #include <rte_cryptodev.h>
9
10 #include "cperf_test_latency.h"
11 #include "cperf_ops.h"
12 #include "cperf_test_common.h"
13
14 struct cperf_op_result {
15         uint64_t tsc_start;
16         uint64_t tsc_end;
17         enum rte_crypto_op_status status;
18 };
19
20 struct cperf_latency_ctx {
21         uint8_t dev_id;
22         uint16_t qp_id;
23         uint8_t lcore_id;
24
25         struct rte_mempool *pool;
26
27         struct rte_cryptodev_sym_session *sess;
28
29         cperf_populate_ops_t populate_ops;
30
31         uint32_t src_buf_offset;
32         uint32_t dst_buf_offset;
33
34         const struct cperf_options *options;
35         const struct cperf_test_vector *test_vector;
36         struct cperf_op_result *res;
37 };
38
39 struct priv_op_data {
40         struct cperf_op_result *result;
41 };
42
43 static void
44 cperf_latency_test_free(struct cperf_latency_ctx *ctx)
45 {
46         if (ctx) {
47                 if (ctx->sess) {
48                         rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
49                         rte_cryptodev_sym_session_free(ctx->sess);
50                 }
51
52                 rte_mempool_free(ctx->pool);
53
54                 rte_free(ctx->res);
55                 rte_free(ctx);
56         }
57 }
58
59 void *
60 cperf_latency_test_constructor(struct rte_mempool *sess_mp,
61                 struct rte_mempool *sess_priv_mp,
62                 uint8_t dev_id, uint16_t qp_id,
63                 const struct cperf_options *options,
64                 const struct cperf_test_vector *test_vector,
65                 const struct cperf_op_fns *op_fns)
66 {
67         struct cperf_latency_ctx *ctx = NULL;
68         size_t extra_op_priv_size = sizeof(struct priv_op_data);
69
70         ctx = rte_malloc(NULL, sizeof(struct cperf_latency_ctx), 0);
71         if (ctx == NULL)
72                 goto err;
73
74         ctx->dev_id = dev_id;
75         ctx->qp_id = qp_id;
76
77         ctx->populate_ops = op_fns->populate_ops;
78         ctx->options = options;
79         ctx->test_vector = test_vector;
80
81         /* IV goes at the end of the crypto operation */
82         uint16_t iv_offset = sizeof(struct rte_crypto_op) +
83                 sizeof(struct rte_crypto_sym_op) +
84                 sizeof(struct cperf_op_result *);
85
86         ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options,
87                         test_vector, iv_offset);
88         if (ctx->sess == NULL)
89                 goto err;
90
91         if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id,
92                         extra_op_priv_size,
93                         &ctx->src_buf_offset, &ctx->dst_buf_offset,
94                         &ctx->pool) < 0)
95                 goto err;
96
97         ctx->res = rte_malloc(NULL, sizeof(struct cperf_op_result) *
98                         ctx->options->total_ops, 0);
99
100         if (ctx->res == NULL)
101                 goto err;
102
103         return ctx;
104 err:
105         cperf_latency_test_free(ctx);
106
107         return NULL;
108 }
109
110 static inline void
111 store_timestamp(struct rte_crypto_op *op, uint64_t timestamp)
112 {
113         struct priv_op_data *priv_data;
114
115         priv_data = (struct priv_op_data *) (op->sym + 1);
116         priv_data->result->status = op->status;
117         priv_data->result->tsc_end = timestamp;
118 }
119
120 int
121 cperf_latency_test_runner(void *arg)
122 {
123         struct cperf_latency_ctx *ctx = arg;
124         uint16_t test_burst_size;
125         uint8_t burst_size_idx = 0;
126         uint32_t imix_idx = 0;
127
128         static uint16_t display_once;
129
130         if (ctx == NULL)
131                 return 0;
132
133         struct rte_crypto_op *ops[ctx->options->max_burst_size];
134         struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
135         uint64_t i;
136         struct priv_op_data *priv_data;
137
138         uint32_t lcore = rte_lcore_id();
139
140 #ifdef CPERF_LINEARIZATION_ENABLE
141         struct rte_cryptodev_info dev_info;
142         int linearize = 0;
143
144         /* Check if source mbufs require coalescing */
145         if (ctx->options->segment_sz < ctx->options->max_buffer_size) {
146                 rte_cryptodev_info_get(ctx->dev_id, &dev_info);
147                 if ((dev_info.feature_flags &
148                                 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0)
149                         linearize = 1;
150         }
151 #endif /* CPERF_LINEARIZATION_ENABLE */
152
153         ctx->lcore_id = lcore;
154
155         /* Warm up the host CPU before starting the test */
156         for (i = 0; i < ctx->options->total_ops; i++)
157                 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
158
159         /* Get first size from range or list */
160         if (ctx->options->inc_burst_size != 0)
161                 test_burst_size = ctx->options->min_burst_size;
162         else
163                 test_burst_size = ctx->options->burst_size_list[0];
164
165         uint16_t iv_offset = sizeof(struct rte_crypto_op) +
166                 sizeof(struct rte_crypto_sym_op) +
167                 sizeof(struct cperf_op_result *);
168
169         while (test_burst_size <= ctx->options->max_burst_size) {
170                 uint64_t ops_enqd = 0, ops_deqd = 0;
171                 uint64_t b_idx = 0;
172
173                 uint64_t tsc_val, tsc_end, tsc_start;
174                 uint64_t tsc_max = 0, tsc_min = ~0UL, tsc_tot = 0, tsc_idx = 0;
175                 uint64_t enqd_max = 0, enqd_min = ~0UL, enqd_tot = 0;
176                 uint64_t deqd_max = 0, deqd_min = ~0UL, deqd_tot = 0;
177
178                 while (enqd_tot < ctx->options->total_ops) {
179
180                         uint16_t burst_size = ((enqd_tot + test_burst_size)
181                                         <= ctx->options->total_ops) ?
182                                                         test_burst_size :
183                                                         ctx->options->total_ops -
184                                                         enqd_tot;
185
186                         /* Allocate objects containing crypto operations and mbufs */
187                         if (rte_mempool_get_bulk(ctx->pool, (void **)ops,
188                                                 burst_size) != 0) {
189                                 RTE_LOG(ERR, USER1,
190                                         "Failed to allocate more crypto operations "
191                                         "from the crypto operation pool.\n"
192                                         "Consider increasing the pool size "
193                                         "with --pool-sz\n");
194                                 return -1;
195                         }
196
197                         /* Setup crypto op, attach mbuf etc */
198                         (ctx->populate_ops)(ops, ctx->src_buf_offset,
199                                         ctx->dst_buf_offset,
200                                         burst_size, ctx->sess, ctx->options,
201                                         ctx->test_vector, iv_offset,
202                                         &imix_idx, NULL);
203
204                         tsc_start = rte_rdtsc_precise();
205
206 #ifdef CPERF_LINEARIZATION_ENABLE
207                         if (linearize) {
208                                 /* PMD doesn't support scatter-gather and source buffer
209                                  * is segmented.
210                                  * We need to linearize it before enqueuing.
211                                  */
212                                 for (i = 0; i < burst_size; i++)
213                                         rte_pktmbuf_linearize(ops[i]->sym->m_src);
214                         }
215 #endif /* CPERF_LINEARIZATION_ENABLE */
216
217                         /* Enqueue burst of ops on crypto device */
218                         ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id,
219                                         ops, burst_size);
220
221                         /* Dequeue processed burst of ops from crypto device */
222                         ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
223                                         ops_processed, test_burst_size);
224
225                         tsc_end = rte_rdtsc_precise();
226
227                         /* Free memory for not enqueued operations */
228                         if (ops_enqd != burst_size)
229                                 rte_mempool_put_bulk(ctx->pool,
230                                                 (void **)&ops[ops_enqd],
231                                                 burst_size - ops_enqd);
232
233                         for (i = 0; i < ops_enqd; i++) {
234                                 ctx->res[tsc_idx].tsc_start = tsc_start;
235                                 /*
236                                  * Private data structure starts after the end of the
237                                  * rte_crypto_sym_op structure.
238                                  */
239                                 priv_data = (struct priv_op_data *) (ops[i]->sym + 1);
240                                 priv_data->result = (void *)&ctx->res[tsc_idx];
241                                 tsc_idx++;
242                         }
243
244                         if (likely(ops_deqd))  {
245                                 /* Free crypto ops so they can be reused. */
246                                 for (i = 0; i < ops_deqd; i++)
247                                         store_timestamp(ops_processed[i], tsc_end);
248
249                                 rte_mempool_put_bulk(ctx->pool,
250                                                 (void **)ops_processed, ops_deqd);
251
252                                 deqd_tot += ops_deqd;
253                                 deqd_max = RTE_MAX(ops_deqd, deqd_max);
254                                 deqd_min = RTE_MIN(ops_deqd, deqd_min);
255                         }
256
257                         enqd_tot += ops_enqd;
258                         enqd_max = RTE_MAX(ops_enqd, enqd_max);
259                         enqd_min = RTE_MIN(ops_enqd, enqd_min);
260
261                         b_idx++;
262                 }
263
264                 /* Dequeue any operations still in the crypto device */
265                 while (deqd_tot < ctx->options->total_ops) {
266                         /* Sending 0 length burst to flush sw crypto device */
267                         rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
268
269                         /* dequeue burst */
270                         ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
271                                         ops_processed, test_burst_size);
272
273                         tsc_end = rte_rdtsc_precise();
274
275                         if (ops_deqd != 0) {
276                                 for (i = 0; i < ops_deqd; i++)
277                                         store_timestamp(ops_processed[i], tsc_end);
278
279                                 rte_mempool_put_bulk(ctx->pool,
280                                                 (void **)ops_processed, ops_deqd);
281
282                                 deqd_tot += ops_deqd;
283                                 deqd_max = RTE_MAX(ops_deqd, deqd_max);
284                                 deqd_min = RTE_MIN(ops_deqd, deqd_min);
285                         }
286                 }
287
288                 for (i = 0; i < tsc_idx; i++) {
289                         tsc_val = ctx->res[i].tsc_end - ctx->res[i].tsc_start;
290                         tsc_max = RTE_MAX(tsc_val, tsc_max);
291                         tsc_min = RTE_MIN(tsc_val, tsc_min);
292                         tsc_tot += tsc_val;
293                 }
294
295                 double time_tot, time_avg, time_max, time_min;
296
297                 const uint64_t tunit = 1000000; /* us */
298                 const uint64_t tsc_hz = rte_get_tsc_hz();
299
300                 uint64_t enqd_avg = enqd_tot / b_idx;
301                 uint64_t deqd_avg = deqd_tot / b_idx;
302                 uint64_t tsc_avg = tsc_tot / tsc_idx;
303
304                 time_tot = tunit*(double)(tsc_tot) / tsc_hz;
305                 time_avg = tunit*(double)(tsc_avg) / tsc_hz;
306                 time_max = tunit*(double)(tsc_max) / tsc_hz;
307                 time_min = tunit*(double)(tsc_min) / tsc_hz;
308
309                 uint16_t exp = 0;
310                 if (ctx->options->csv) {
311                         if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
312                                         __ATOMIC_RELAXED, __ATOMIC_RELAXED))
313                                 printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, "
314                                                 "cycles, time (us)");
315
316                         for (i = 0; i < ctx->options->total_ops; i++) {
317
318                                 printf("\n%u,%u,%u,%"PRIu64",%"PRIu64",%.3f",
319                                         ctx->lcore_id, ctx->options->test_buffer_size,
320                                         test_burst_size, i + 1,
321                                         ctx->res[i].tsc_end - ctx->res[i].tsc_start,
322                                         tunit * (double) (ctx->res[i].tsc_end
323                                                         - ctx->res[i].tsc_start)
324                                                 / tsc_hz);
325
326                         }
327                 } else {
328                         printf("\n# Device %d on lcore %u\n", ctx->dev_id,
329                                 ctx->lcore_id);
330                         printf("\n# total operations: %u", ctx->options->total_ops);
331                         printf("\n# Buffer size: %u", ctx->options->test_buffer_size);
332                         printf("\n# Burst size: %u", test_burst_size);
333                         printf("\n#     Number of bursts: %"PRIu64,
334                                         b_idx);
335
336                         printf("\n#");
337                         printf("\n#          \t       Total\t   Average\t   "
338                                         "Maximum\t   Minimum");
339                         printf("\n#  enqueued\t%12"PRIu64"\t%10"PRIu64"\t"
340                                         "%10"PRIu64"\t%10"PRIu64, enqd_tot,
341                                         enqd_avg, enqd_max, enqd_min);
342                         printf("\n#  dequeued\t%12"PRIu64"\t%10"PRIu64"\t"
343                                         "%10"PRIu64"\t%10"PRIu64, deqd_tot,
344                                         deqd_avg, deqd_max, deqd_min);
345                         printf("\n#    cycles\t%12"PRIu64"\t%10"PRIu64"\t"
346                                         "%10"PRIu64"\t%10"PRIu64, tsc_tot,
347                                         tsc_avg, tsc_max, tsc_min);
348                         printf("\n# time [us]\t%12.0f\t%10.3f\t%10.3f\t%10.3f",
349                                         time_tot, time_avg, time_max, time_min);
350                         printf("\n\n");
351
352                 }
353
354                 /* Get next size from range or list */
355                 if (ctx->options->inc_burst_size != 0)
356                         test_burst_size += ctx->options->inc_burst_size;
357                 else {
358                         if (++burst_size_idx == ctx->options->burst_size_count)
359                                 break;
360                         test_burst_size =
361                                 ctx->options->burst_size_list[burst_size_idx];
362                 }
363         }
364
365         return 0;
366 }
367
368 void
369 cperf_latency_test_destructor(void *arg)
370 {
371         struct cperf_latency_ctx *ctx = arg;
372
373         if (ctx == NULL)
374                 return;
375
376         cperf_latency_test_free(ctx);
377 }