1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Intel Corporation
7 #include <rte_crypto.h>
8 #include <rte_cryptodev.h>
9 #include <rte_cycles.h>
10 #include <rte_malloc.h>
12 #include "cperf_ops.h"
13 #include "cperf_test_pmd_cyclecount.h"
14 #include "cperf_test_common.h"
16 #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n"
17 #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n"
18 #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n"
19 #define CSV_LINE_FMT "%10u,%10u,%u,%u,%u,%u,%u,%.3f,%.3f,%.3f\n"
21 struct cperf_pmd_cyclecount_ctx {
26 struct rte_mempool *pool;
27 struct rte_crypto_op **ops;
28 struct rte_crypto_op **ops_processed;
30 struct rte_cryptodev_sym_session *sess;
32 cperf_populate_ops_t populate_ops;
34 uint32_t src_buf_offset;
35 uint32_t dst_buf_offset;
37 const struct cperf_options *options;
38 const struct cperf_test_vector *test_vector;
41 struct pmd_cyclecount_state {
42 struct cperf_pmd_cyclecount_ctx *ctx;
43 const struct cperf_options *opts;
49 uint32_t ops_enq_retries;
50 uint32_t ops_deq_retries;
51 double cycles_per_build;
52 double cycles_per_enq;
53 double cycles_per_deq;
56 static const uint16_t iv_offset =
57 sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op);
60 cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx)
66 #ifdef RTE_LIB_SECURITY
67 if (ctx->options->op_type == CPERF_PDCP ||
68 ctx->options->op_type == CPERF_DOCSIS) {
69 struct rte_security_ctx *sec_ctx =
70 (struct rte_security_ctx *)
71 rte_cryptodev_get_sec_ctx(ctx->dev_id);
72 rte_security_session_destroy(sec_ctx,
73 (struct rte_security_session *)ctx->sess);
77 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
78 rte_cryptodev_sym_session_free(ctx->sess);
82 rte_mempool_free(ctx->pool);
86 rte_free(ctx->ops_processed);
92 cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp,
93 struct rte_mempool *sess_priv_mp,
94 uint8_t dev_id, uint16_t qp_id,
95 const struct cperf_options *options,
96 const struct cperf_test_vector *test_vector,
97 const struct cperf_op_fns *op_fns)
99 struct cperf_pmd_cyclecount_ctx *ctx = NULL;
101 /* preallocate buffers for crypto ops as they can get quite big */
102 size_t alloc_sz = sizeof(struct rte_crypto_op *) *
103 options->nb_descriptors;
105 ctx = rte_malloc(NULL, sizeof(struct cperf_pmd_cyclecount_ctx), 0);
109 ctx->dev_id = dev_id;
112 ctx->populate_ops = op_fns->populate_ops;
113 ctx->options = options;
114 ctx->test_vector = test_vector;
116 /* IV goes at the end of the crypto operation */
117 uint16_t iv_offset = sizeof(struct rte_crypto_op) +
118 sizeof(struct rte_crypto_sym_op);
120 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options,
121 test_vector, iv_offset);
122 if (ctx->sess == NULL)
125 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0,
126 &ctx->src_buf_offset, &ctx->dst_buf_offset,
130 ctx->ops = rte_malloc("ops", alloc_sz, 0);
134 ctx->ops_processed = rte_malloc("ops_processed", alloc_sz, 0);
135 if (!ctx->ops_processed)
141 cperf_pmd_cyclecount_test_free(ctx);
146 /* benchmark alloc-build-free of ops */
148 pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op,
149 uint16_t test_burst_size)
151 uint32_t iter_ops_left = state->opts->total_ops - cur_op;
152 uint32_t iter_ops_needed =
153 RTE_MIN(state->opts->nb_descriptors, iter_ops_left);
154 uint32_t cur_iter_op;
155 uint32_t imix_idx = 0;
157 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
158 cur_iter_op += test_burst_size) {
159 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
161 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
163 /* Allocate objects containing crypto operations and mbufs */
164 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
167 "Failed to allocate more crypto operations "
168 "from the crypto operation pool.\n"
169 "Consider increasing the pool size "
174 /* Setup crypto op, attach mbuf etc */
175 (state->ctx->populate_ops)(ops,
176 state->ctx->src_buf_offset,
177 state->ctx->dst_buf_offset,
179 state->ctx->sess, state->opts,
180 state->ctx->test_vector, iv_offset,
183 #ifdef CPERF_LINEARIZATION_ENABLE
184 /* Check if source mbufs require coalescing */
185 if (state->linearize) {
187 for (i = 0; i < burst_size; i++) {
188 struct rte_mbuf *src = ops[i]->sym->m_src;
189 rte_pktmbuf_linearize(src);
192 #endif /* CPERF_LINEARIZATION_ENABLE */
193 rte_mempool_put_bulk(state->ctx->pool, (void **)ops,
200 /* allocate and build ops (no free) */
202 pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state,
203 uint32_t iter_ops_needed, uint16_t test_burst_size)
205 uint32_t cur_iter_op;
206 uint32_t imix_idx = 0;
208 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
209 cur_iter_op += test_burst_size) {
210 uint32_t burst_size = RTE_MIN(
211 iter_ops_needed - cur_iter_op, test_burst_size);
212 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
214 /* Allocate objects containing crypto operations and mbufs */
215 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
218 "Failed to allocate more crypto operations "
219 "from the crypto operation pool.\n"
220 "Consider increasing the pool size "
225 /* Setup crypto op, attach mbuf etc */
226 (state->ctx->populate_ops)(ops,
227 state->ctx->src_buf_offset,
228 state->ctx->dst_buf_offset,
230 state->ctx->sess, state->opts,
231 state->ctx->test_vector, iv_offset,
237 /* benchmark enqueue, returns number of ops enqueued */
239 pmd_cyclecount_bench_enq(struct pmd_cyclecount_state *state,
240 uint32_t iter_ops_needed, uint16_t test_burst_size)
242 /* Enqueue full descriptor ring of ops on crypto device */
243 uint32_t cur_iter_op = 0;
244 while (cur_iter_op < iter_ops_needed) {
245 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
247 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
250 burst_enqd = rte_cryptodev_enqueue_burst(state->ctx->dev_id,
251 state->ctx->qp_id, ops, burst_size);
253 /* if we couldn't enqueue anything, the queue is full */
255 /* don't try to dequeue anything we didn't enqueue */
259 if (burst_enqd < burst_size)
260 state->ops_enq_retries++;
261 state->ops_enqd += burst_enqd;
262 cur_iter_op += burst_enqd;
264 return iter_ops_needed;
267 /* benchmark dequeue */
269 pmd_cyclecount_bench_deq(struct pmd_cyclecount_state *state,
270 uint32_t iter_ops_needed, uint16_t test_burst_size)
272 /* Dequeue full descriptor ring of ops on crypto device */
273 uint32_t cur_iter_op = 0;
274 while (cur_iter_op < iter_ops_needed) {
275 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
277 struct rte_crypto_op **ops_processed =
278 &state->ctx->ops[cur_iter_op];
281 burst_deqd = rte_cryptodev_dequeue_burst(state->ctx->dev_id,
282 state->ctx->qp_id, ops_processed, burst_size);
284 if (burst_deqd < burst_size)
285 state->ops_deq_retries++;
286 state->ops_deqd += burst_deqd;
287 cur_iter_op += burst_deqd;
291 /* run benchmark per burst size */
293 pmd_cyclecount_bench_burst_sz(
294 struct pmd_cyclecount_state *state, uint16_t test_burst_size)
303 /* reset all counters */
307 state->ops_enq_retries = 0;
309 state->ops_deq_retries = 0;
312 * Benchmark crypto op alloc-build-free separately.
314 tsc_start = rte_rdtsc_precise();
316 for (cur_op = 0; cur_op < state->opts->total_ops;
317 cur_op += state->opts->nb_descriptors) {
318 if (unlikely(pmd_cyclecount_bench_ops(
319 state, cur_op, test_burst_size)))
323 tsc_end = rte_rdtsc_precise();
324 tsc_op = tsc_end - tsc_start;
328 * Hardware acceleration cyclecount benchmarking loop.
330 * We're benchmarking raw enq/deq performance by filling up the device
331 * queue, so we never get any failed enqs unless the driver won't accept
332 * the exact number of descriptors we requested, or the driver won't
333 * wrap around the end of the TX ring. However, since we're only
334 * dequeuing once we've filled up the queue, we have to benchmark it
335 * piecemeal and then average out the results.
338 while (cur_op < state->opts->total_ops) {
339 uint32_t iter_ops_left = state->opts->total_ops - cur_op;
340 uint32_t iter_ops_needed = RTE_MIN(
341 state->opts->nb_descriptors, iter_ops_left);
342 uint32_t iter_ops_allocd = iter_ops_needed;
344 /* allocate and build ops */
345 if (unlikely(pmd_cyclecount_build_ops(state, iter_ops_needed,
349 tsc_start = rte_rdtsc_precise();
351 /* fill up TX ring */
352 iter_ops_needed = pmd_cyclecount_bench_enq(state,
353 iter_ops_needed, test_burst_size);
355 tsc_end = rte_rdtsc_precise();
357 tsc_enq += tsc_end - tsc_start;
359 /* allow for HW to catch up */
361 rte_delay_us_block(state->delay);
363 tsc_start = rte_rdtsc_precise();
366 pmd_cyclecount_bench_deq(state, iter_ops_needed,
369 tsc_end = rte_rdtsc_precise();
371 tsc_deq += tsc_end - tsc_start;
373 cur_op += iter_ops_needed;
376 * we may not have processed all ops that we allocated, so
377 * free everything we've allocated.
379 rte_mempool_put_bulk(state->ctx->pool,
380 (void **)state->ctx->ops, iter_ops_allocd);
383 state->cycles_per_build = (double)tsc_op / state->opts->total_ops;
384 state->cycles_per_enq = (double)tsc_enq / state->ops_enqd;
385 state->cycles_per_deq = (double)tsc_deq / state->ops_deqd;
391 cperf_pmd_cyclecount_test_runner(void *test_ctx)
393 struct pmd_cyclecount_state state = {0};
394 const struct cperf_options *opts;
395 uint16_t test_burst_size;
396 uint8_t burst_size_idx = 0;
398 state.ctx = test_ctx;
399 opts = state.ctx->options;
401 state.lcore = rte_lcore_id();
404 static uint16_t display_once;
405 static bool warmup = true;
408 * We need a small delay to allow for hardware to process all the crypto
409 * operations. We can't automatically figure out what the delay should
410 * be, so we leave it up to the user (by default it's 0).
412 state.delay = 1000 * opts->pmdcc_delay;
414 #ifdef CPERF_LINEARIZATION_ENABLE
415 struct rte_cryptodev_info dev_info;
417 /* Check if source mbufs require coalescing */
418 if (opts->segments_sz < ctx->options->max_buffer_size) {
419 rte_cryptodev_info_get(state.ctx->dev_id, &dev_info);
420 if ((dev_info.feature_flags &
421 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) ==
426 #endif /* CPERF_LINEARIZATION_ENABLE */
428 state.ctx->lcore_id = state.lcore;
430 /* Get first size from range or list */
431 if (opts->inc_burst_size != 0)
432 test_burst_size = opts->min_burst_size;
434 test_burst_size = opts->burst_size_list[0];
436 while (test_burst_size <= opts->max_burst_size) {
437 /* do a benchmark run */
438 if (pmd_cyclecount_bench_burst_sz(&state, test_burst_size))
442 * First run is always a warm up run.
451 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
452 __ATOMIC_RELAXED, __ATOMIC_RELAXED))
453 printf(PRETTY_HDR_FMT, "lcore id", "Buf Size",
454 "Burst Size", "Enqueued",
455 "Dequeued", "Enq Retries",
456 "Deq Retries", "Cycles/Op",
457 "Cycles/Enq", "Cycles/Deq");
459 printf(PRETTY_LINE_FMT, state.ctx->lcore_id,
460 opts->test_buffer_size, test_burst_size,
461 state.ops_enqd, state.ops_deqd,
462 state.ops_enq_retries,
463 state.ops_deq_retries,
464 state.cycles_per_build,
465 state.cycles_per_enq,
466 state.cycles_per_deq);
468 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
469 __ATOMIC_RELAXED, __ATOMIC_RELAXED))
470 printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
471 "Burst Size", "Enqueued",
472 "Dequeued", "Enq Retries",
473 "Deq Retries", "Cycles/Op",
474 "Cycles/Enq", "Cycles/Deq");
476 printf(CSV_LINE_FMT, state.ctx->lcore_id,
477 opts->test_buffer_size, test_burst_size,
478 state.ops_enqd, state.ops_deqd,
479 state.ops_enq_retries,
480 state.ops_deq_retries,
481 state.cycles_per_build,
482 state.cycles_per_enq,
483 state.cycles_per_deq);
486 /* Get next size from range or list */
487 if (opts->inc_burst_size != 0)
488 test_burst_size += opts->inc_burst_size;
490 if (++burst_size_idx == opts->burst_size_count)
492 test_burst_size = opts->burst_size_list[burst_size_idx];
500 cperf_pmd_cyclecount_test_destructor(void *arg)
502 struct cperf_pmd_cyclecount_ctx *ctx = arg;
507 cperf_pmd_cyclecount_test_free(ctx);