1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
7 #ifndef __ECORE_INT_H__
8 #define __ECORE_INT_H__
11 #include "ecore_int_api.h"
13 #define ECORE_CAU_DEF_RX_TIMER_RES 0
14 #define ECORE_CAU_DEF_TX_TIMER_RES 0
16 #define ECORE_SB_ATT_IDX 0x0001
17 #define ECORE_SB_EVENT_MASK 0x0003
19 #define SB_ALIGNED_SIZE(p_hwfn) \
20 ALIGNED_TYPE_SIZE(struct status_block, p_hwfn)
22 #define ECORE_SB_INVALID_IDX 0xffff
24 struct ecore_igu_block {
26 #define ECORE_IGU_STATUS_FREE 0x01
27 #define ECORE_IGU_STATUS_VALID 0x02
28 #define ECORE_IGU_STATUS_PF 0x04
29 #define ECORE_IGU_STATUS_DSB 0x08
35 /* Index inside IGU [meant for back reference] */
38 struct ecore_sb_info *sb_info;
41 struct ecore_igu_info {
42 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH];
45 /* The numbers can shift when using APIs to switch SBs between PF and
48 struct ecore_sb_cnt_info usage;
50 /* Determine whether we can shift SBs between VFs and PFs */
51 bool b_allow_pf_vf_change;
55 * @brief - Make sure the IGU CAM reflects the resources provided by MFW
60 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
61 struct ecore_ptt *p_ptt);
64 * @brief - Make sure IGU CAM reflects the default resources once again,
65 * starting with a 'dirty' SW database.
69 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
70 struct ecore_ptt *p_ptt);
73 * @brief Translate the weakly-defined client sb-id into an IGU sb-id
76 * @param sb_id - user provided sb_id
78 * @return an index inside IGU CAM where the SB resides
80 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
83 * @brief return a pointer to an unused valid SB
86 * @param b_is_pf - true iff we want a SB belonging to a PF
88 * @return point to an igu_block, OSAL_NULL if none is available
90 struct ecore_igu_block *
91 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);
92 /* TODO Names of function may change... */
93 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn,
94 struct ecore_ptt *p_ptt,
95 bool b_set, bool b_slowpath);
97 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn);
100 * @brief ecore_int_igu_read_cam - Reads the IGU CAM.
101 * This function needs to be called during hardware
102 * prepare. It reads the info from igu cam to know which
103 * status block is the default / base status block etc.
108 * @return enum _ecore_status_t
110 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn,
111 struct ecore_ptt *p_ptt);
113 typedef enum _ecore_status_t (*ecore_int_comp_cb_t) (struct ecore_hwfn *p_hwfn,
116 * @brief ecore_int_register_cb - Register callback func for
117 * slowhwfn statusblock.
119 * Every protocol that uses the slowhwfn status block
120 * should register a callback function that will be called
121 * once there is an update of the sp status block.
124 * @param comp_cb - function to be called when there is an
125 * interrupt on the sp sb
127 * @param cookie - passed to the callback function
128 * @param sb_idx - OUT parameter which gives the chosen index
130 * @param p_fw_cons - pointer to the actual address of the
131 * consumer for this protocol.
133 * @return enum _ecore_status_t
135 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn,
136 ecore_int_comp_cb_t comp_cb,
138 u8 *sb_idx, __le16 **p_fw_cons);
140 * @brief ecore_int_unregister_cb - Unregisters callback
141 * function from sp sb.
142 * Partner of ecore_int_register_cb -> should be called
143 * when no longer required.
148 * @return enum _ecore_status_t
150 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, u8 pi);
153 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id.
159 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn);
162 * @brief Status block cleanup. Should be called for each status
163 * block that will be used -> both PF / VF
167 * @param sb_id - igu status block id
168 * @param opaque - opaque fid of the sb owner.
169 * @param cleanup_set - set(1) / clear(0)
171 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn,
172 struct ecore_ptt *p_ptt,
178 * @brief ecore_int_cau_conf - configure cau for a given status
188 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn,
189 struct ecore_ptt *p_ptt,
191 u16 igu_sb_id, u16 vf_number, u8 vf_valid);
194 * @brief ecore_int_alloc
199 * @return enum _ecore_status_t
201 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn,
202 struct ecore_ptt *p_ptt);
205 * @brief ecore_int_free
209 void ecore_int_free(struct ecore_hwfn *p_hwfn);
212 * @brief ecore_int_setup
217 void ecore_int_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt);
220 * @brief - Enable Interrupt & Attention for hw function
226 * @return enum _ecore_status_t
228 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn,
229 struct ecore_ptt *p_ptt,
230 enum ecore_int_mode int_mode);
233 * @brief - Initialize CAU status block entry
241 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn,
242 struct cau_sb_entry *p_sb_entry, u8 pf_id,
243 u16 vf_number, u8 vf_valid);
245 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn,
246 struct ecore_ptt *p_ptt,
247 u8 timer_res, u16 sb_id, bool tx);
249 #define ECORE_MAPPING_MEMORY_SIZE(dev) \
250 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \
251 136 : NUM_OF_SBS(dev))
253 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev)
256 enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn,
257 struct ecore_ptt *p_ptt,
259 void ecore_pf_flr_igu_cleanup(struct ecore_hwfn *p_hwfn);
261 #endif /* __ECORE_INT_H__ */