1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
12 #include "bnxt_ring.h"
15 #include "hsi_struct_def_dpdk.h"
22 void bnxt_free_tx_rings(struct bnxt *bp)
26 for (i = 0; i < (int)bp->tx_nr_rings; i++) {
27 struct bnxt_tx_queue *txq = bp->tx_queues[i];
32 bnxt_free_ring(txq->tx_ring->tx_ring_struct);
33 rte_free(txq->tx_ring->tx_ring_struct);
34 rte_free(txq->tx_ring);
36 bnxt_free_ring(txq->cp_ring->cp_ring_struct);
37 rte_free(txq->cp_ring->cp_ring_struct);
38 rte_free(txq->cp_ring);
41 bp->tx_queues[i] = NULL;
45 int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq)
47 struct bnxt_tx_ring_info *txr = txq->tx_ring;
48 struct bnxt_ring *ring = txr->tx_ring_struct;
50 txq->tx_wake_thresh = ring->ring_size / 2;
51 ring->fw_ring_id = INVALID_HW_RING_ID;
56 int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id)
58 struct bnxt_cp_ring_info *cpr;
59 struct bnxt_tx_ring_info *txr;
60 struct bnxt_ring *ring;
62 txr = rte_zmalloc_socket("bnxt_tx_ring",
63 sizeof(struct bnxt_tx_ring_info),
64 RTE_CACHE_LINE_SIZE, socket_id);
69 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
70 sizeof(struct bnxt_ring),
71 RTE_CACHE_LINE_SIZE, socket_id);
74 txr->tx_ring_struct = ring;
75 ring->ring_size = rte_align32pow2(txq->nb_tx_desc);
76 ring->ring_mask = ring->ring_size - 1;
77 ring->bd = (void *)txr->tx_desc_ring;
78 ring->bd_dma = txr->tx_desc_mapping;
79 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_tx_bd);
80 ring->vmem = (void **)&txr->tx_buf_ring;
82 cpr = rte_zmalloc_socket("bnxt_tx_ring",
83 sizeof(struct bnxt_cp_ring_info),
84 RTE_CACHE_LINE_SIZE, socket_id);
89 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
90 sizeof(struct bnxt_ring),
91 RTE_CACHE_LINE_SIZE, socket_id);
94 cpr->cp_ring_struct = ring;
95 ring->ring_size = txr->tx_ring_struct->ring_size;
96 ring->ring_mask = ring->ring_size - 1;
97 ring->bd = (void *)cpr->cp_desc_ring;
98 ring->bd_dma = cpr->cp_desc_mapping;
105 static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
106 struct bnxt_tx_queue *txq,
108 struct tx_bd_long **last_txbd)
110 struct bnxt_tx_ring_info *txr = txq->tx_ring;
111 uint32_t outer_tpid_bd = 0;
112 struct tx_bd_long *txbd;
113 struct tx_bd_long_hi *txbd1 = NULL;
114 uint32_t vlan_tag_flags, cfa_action;
115 bool long_bd = false;
116 unsigned short nr_bds = 0;
117 struct rte_mbuf *m_seg;
118 struct bnxt_sw_tx_bd *tx_buf;
119 static const uint32_t lhint_arr[4] = {
120 TX_BD_LONG_FLAGS_LHINT_LT512,
121 TX_BD_LONG_FLAGS_LHINT_LT1K,
122 TX_BD_LONG_FLAGS_LHINT_LT2K,
123 TX_BD_LONG_FLAGS_LHINT_LT2K
126 if (unlikely(is_bnxt_in_error(txq->bp)))
129 if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM |
130 PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM |
131 PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM |
132 PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN |
133 PKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST |
135 (BNXT_TRUFLOW_EN(txq->bp) &&
136 (txq->bp->tx_cfa_action || txq->vfr_tx_cfa_action)))
139 nr_bds = long_bd + tx_pkt->nb_segs;
140 if (unlikely(bnxt_tx_avail(txq) < nr_bds))
143 /* Check if number of Tx descriptors is above HW limit */
144 if (unlikely(nr_bds > BNXT_MAX_TSO_SEGS)) {
146 "Num descriptors %d exceeds HW limit\n", nr_bds);
150 /* If packet length is less than minimum packet size, pad it */
151 if (unlikely(rte_pktmbuf_pkt_len(tx_pkt) < BNXT_MIN_PKT_SIZE)) {
152 uint8_t pad = BNXT_MIN_PKT_SIZE - rte_pktmbuf_pkt_len(tx_pkt);
153 char *seg = rte_pktmbuf_append(tx_pkt, pad);
157 "Failed to pad mbuf by %d bytes\n",
162 /* Note: data_len, pkt len are updated in rte_pktmbuf_append */
166 /* Check non zero data_len */
167 RTE_VERIFY(tx_pkt->data_len);
169 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
170 tx_buf->mbuf = tx_pkt;
171 tx_buf->nr_bds = nr_bds;
173 txbd = &txr->tx_desc_ring[txr->tx_prod];
174 txbd->opaque = *coal_pkts;
175 txbd->flags_type = nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT;
176 txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW;
177 txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL;
178 txbd->len = tx_pkt->data_len;
179 if (tx_pkt->pkt_len >= 2014)
180 txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K;
182 txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9];
183 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf));
187 txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
190 if (BNXT_TRUFLOW_EN(txq->bp)) {
191 if (txq->vfr_tx_cfa_action)
192 cfa_action = txq->vfr_tx_cfa_action;
194 cfa_action = txq->bp->tx_cfa_action;
197 /* HW can accelerate only outer vlan in QinQ mode */
198 if (tx_buf->mbuf->ol_flags & PKT_TX_QINQ_PKT) {
199 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
200 tx_buf->mbuf->vlan_tci_outer;
201 outer_tpid_bd = txq->bp->outer_tpid_bd &
202 BNXT_OUTER_TPID_BD_MASK;
203 vlan_tag_flags |= outer_tpid_bd;
204 } else if (tx_buf->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
205 /* shurd: Should this mask at
206 * TX_BD_LONG_CFA_META_VLAN_VID_MASK?
208 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
209 tx_buf->mbuf->vlan_tci;
210 /* Currently supports 8021Q, 8021AD vlan offloads
211 * QINQ1, QINQ2, QINQ3 vlan headers are deprecated
213 /* DPDK only supports 802.11q VLAN packets */
215 TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
218 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
220 txbd1 = (struct tx_bd_long_hi *)
221 &txr->tx_desc_ring[txr->tx_prod];
223 txbd1->cfa_meta = vlan_tag_flags;
225 if (BNXT_TRUFLOW_EN(txq->bp))
226 txbd1->cfa_action = cfa_action;
228 if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) {
232 txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO |
233 TX_BD_LONG_LFLAGS_T_IPID;
234 hdr_size = tx_pkt->l2_len + tx_pkt->l3_len +
236 hdr_size += (tx_pkt->ol_flags & PKT_TX_TUNNEL_MASK) ?
237 tx_pkt->outer_l2_len +
238 tx_pkt->outer_l3_len : 0;
239 /* The hdr_size is multiple of 16bit units not 8bit.
242 txbd1->hdr_size = hdr_size >> 1;
243 txbd1->mss = tx_pkt->tso_segsz;
244 RTE_VERIFY(txbd1->mss);
246 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) ==
247 PKT_TX_OIP_IIP_TCP_UDP_CKSUM) {
248 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
249 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
251 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) ==
252 PKT_TX_OIP_IIP_TCP_CKSUM) {
253 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
254 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
256 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) ==
257 PKT_TX_OIP_IIP_UDP_CKSUM) {
258 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
259 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
261 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) ==
262 PKT_TX_IIP_TCP_UDP_CKSUM) {
263 /* (Inner) IP, (Inner) TCP/UDP CSO */
264 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
266 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) ==
267 PKT_TX_IIP_UDP_CKSUM) {
268 /* (Inner) IP, (Inner) TCP/UDP CSO */
269 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
271 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) ==
272 PKT_TX_IIP_TCP_CKSUM) {
273 /* (Inner) IP, (Inner) TCP/UDP CSO */
274 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
276 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) ==
277 PKT_TX_OIP_TCP_UDP_CKSUM) {
278 /* Outer IP, (Inner) TCP/UDP CSO */
279 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
281 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) ==
282 PKT_TX_OIP_UDP_CKSUM) {
283 /* Outer IP, (Inner) TCP/UDP CSO */
284 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
286 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) ==
287 PKT_TX_OIP_TCP_CKSUM) {
288 /* Outer IP, (Inner) TCP/UDP CSO */
289 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
291 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) ==
292 PKT_TX_OIP_IIP_CKSUM) {
293 /* Outer IP, Inner IP CSO */
294 txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM;
296 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) ==
297 PKT_TX_TCP_UDP_CKSUM) {
299 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
301 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) ==
304 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
306 } else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) ==
309 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
311 } else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) ==
314 txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM;
316 } else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) ==
317 PKT_TX_OUTER_IP_CKSUM) {
319 txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM;
321 } else if ((tx_pkt->ol_flags & PKT_TX_IEEE1588_TMST) ==
322 PKT_TX_IEEE1588_TMST) {
324 txbd1->lflags |= TX_BD_LONG_LFLAGS_STAMP;
328 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
331 m_seg = tx_pkt->next;
333 /* Check non zero data_len */
334 RTE_VERIFY(m_seg->data_len);
335 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
336 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
337 tx_buf->mbuf = m_seg;
339 txbd = &txr->tx_desc_ring[txr->tx_prod];
340 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg));
341 txbd->flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT;
342 txbd->len = m_seg->data_len;
347 txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END;
349 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
354 static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts)
356 struct bnxt_tx_ring_info *txr = txq->tx_ring;
357 struct rte_mempool *pool = NULL;
358 struct rte_mbuf **free = txq->free;
359 uint16_t cons = txr->tx_cons;
360 unsigned int blk = 0;
363 for (i = 0; i < nr_pkts; i++) {
364 struct rte_mbuf *mbuf;
365 struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[cons];
366 unsigned short nr_bds = tx_buf->nr_bds;
368 for (j = 0; j < nr_bds; j++) {
371 cons = RING_NEXT(txr->tx_ring_struct, cons);
372 tx_buf = &txr->tx_buf_ring[cons];
373 if (!mbuf) /* long_bd's tx_buf ? */
376 mbuf = rte_pktmbuf_prefree_seg(mbuf);
380 /* EW - no need to unmap DMA memory? */
382 if (likely(mbuf->pool == pool)) {
383 /* Add mbuf to the bulk free array */
386 /* Found an mbuf from a different pool. Free
387 * mbufs accumulated so far to the previous
390 if (likely(pool != NULL))
391 rte_mempool_put_bulk(pool,
395 /* Start accumulating mbufs in a new pool */
403 rte_mempool_put_bulk(pool, (void *)free, blk);
408 static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
410 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
411 uint32_t raw_cons = cpr->cp_raw_cons;
413 uint32_t nb_tx_pkts = 0;
414 struct tx_cmpl *txcmp;
415 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
416 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
417 uint32_t ring_mask = cp_ring_struct->ring_mask;
420 if (bnxt_tx_bds_in_hw(txq) < txq->tx_free_thresh)
424 cons = RING_CMPL(ring_mask, raw_cons);
425 txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons];
426 rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) &
429 if (!CMPL_VALID(txcmp, cpr->valid))
431 opaque = rte_cpu_to_le_32(txcmp->opaque);
432 NEXT_CMPL(cpr, cons, cpr->valid, 1);
433 rte_prefetch0(&cp_desc_ring[cons]);
435 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
436 nb_tx_pkts += opaque;
439 "Unhandled CMP type %02x\n",
442 } while (nb_tx_pkts < ring_mask);
445 bnxt_tx_cmp(txq, nb_tx_pkts);
446 cpr->cp_raw_cons = raw_cons;
453 uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
457 uint16_t nb_tx_pkts = 0;
458 uint16_t coal_pkts = 0;
459 struct bnxt_tx_queue *txq = tx_queue;
460 struct tx_bd_long *last_txbd = NULL;
462 /* Handle TX completions */
463 bnxt_handle_tx_cp(txq);
465 /* Tx queue was stopped; wait for it to be restarted */
466 if (unlikely(!txq->tx_started)) {
467 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
471 /* Handle TX burst request */
472 for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) {
474 rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq,
475 &coal_pkts, &last_txbd);
481 if (likely(nb_tx_pkts)) {
482 /* Request a completion on the last packet */
483 last_txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
484 bnxt_db_write(&txq->tx_ring->tx_db, txq->tx_ring->tx_prod);
491 * Dummy DPDK callback for TX.
493 * This function is used to temporarily replace the real callback during
494 * unsafe control operations on the queue, or in case of error.
497 bnxt_dummy_xmit_pkts(void *tx_queue __rte_unused,
498 struct rte_mbuf **tx_pkts __rte_unused,
499 uint16_t nb_pkts __rte_unused)
504 int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
506 struct bnxt *bp = dev->data->dev_private;
507 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
510 rc = is_bnxt_in_error(bp);
514 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
515 txq->tx_started = true;
516 PMD_DRV_LOG(DEBUG, "Tx queue started\n");
521 int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
523 struct bnxt *bp = dev->data->dev_private;
524 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
527 rc = is_bnxt_in_error(bp);
531 /* Handle TX completions */
532 bnxt_handle_tx_cp(txq);
534 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
535 txq->tx_started = false;
536 PMD_DRV_LOG(DEBUG, "Tx queue stopped\n");