1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
11 #include <cnxk_ethdev.h>
13 #define NIX_RX_OFFLOAD_NONE (0)
14 #define NIX_RX_OFFLOAD_RSS_F BIT(0)
15 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
16 #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)
17 #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)
18 #define NIX_RX_OFFLOAD_TSTAMP_F BIT(4)
19 #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)
21 /* Flags to control cqe_to_mbuf conversion function.
22 * Defining it from backwards to denote its been
23 * not used as offload flags to pick function
25 #define NIX_RX_MULTI_SEG_F BIT(15)
27 #define CNXK_NIX_CQ_ENTRY_SZ 128
28 #define NIX_DESCS_PER_LOOP 4
29 #define CQE_CAST(x) ((struct nix_cqe_hdr_s *)(x))
30 #define CQE_SZ(x) ((x) * CNXK_NIX_CQ_ENTRY_SZ)
32 union mbuf_initializer {
42 static __rte_always_inline uint64_t
43 nix_clear_data_off(uint64_t oldval)
45 union mbuf_initializer mbuf_init = {.value = oldval};
47 mbuf_init.fields.data_off = 0;
48 return mbuf_init.value;
51 static __rte_always_inline struct rte_mbuf *
52 nix_get_mbuf_from_cqe(void *cq, const uint64_t data_off)
56 /* Skip CQE, NIX_RX_PARSE_S and SG HDR(9 DWORDs) and peek buff addr */
57 buff = *((rte_iova_t *)((uint64_t *)cq + 9));
58 return (struct rte_mbuf *)(buff - data_off);
61 static __rte_always_inline uint32_t
62 nix_ptype_get(const void *const lookup_mem, const uint64_t in)
64 const uint16_t *const ptype = lookup_mem;
65 const uint16_t lh_lg_lf = (in & 0xFFF0000000000000) >> 52;
66 const uint16_t tu_l2 = ptype[(in & 0x000FFFF000000000) >> 36];
67 const uint16_t il4_tu = ptype[PTYPE_NON_TUNNEL_ARRAY_SZ + lh_lg_lf];
69 return (il4_tu << PTYPE_NON_TUNNEL_WIDTH) | tu_l2;
72 static __rte_always_inline uint32_t
73 nix_rx_olflags_get(const void *const lookup_mem, const uint64_t in)
75 const uint32_t *const ol_flags =
76 (const uint32_t *)((const uint8_t *)lookup_mem +
79 return ol_flags[(in & 0xfff00000) >> 20];
82 static inline uint64_t
83 nix_update_match_id(const uint16_t match_id, uint64_t ol_flags,
84 struct rte_mbuf *mbuf)
86 /* There is no separate bit to check match_id
87 * is valid or not? and no flag to identify it is an
88 * RTE_FLOW_ACTION_TYPE_FLAG vs RTE_FLOW_ACTION_TYPE_MARK
89 * action. The former case addressed through 0 being invalid
90 * value and inc/dec match_id pair when MARK is activated.
91 * The later case addressed through defining
92 * CNXK_FLOW_MARK_DEFAULT as value for
93 * RTE_FLOW_ACTION_TYPE_MARK.
94 * This would translate to not use
95 * CNXK_FLOW_ACTION_FLAG_DEFAULT - 1 and
96 * CNXK_FLOW_ACTION_FLAG_DEFAULT for match_id.
97 * i.e valid mark_id's are from
98 * 0 to CNXK_FLOW_ACTION_FLAG_DEFAULT - 2
100 if (likely(match_id)) {
101 ol_flags |= PKT_RX_FDIR;
102 if (match_id != CNXK_FLOW_ACTION_FLAG_DEFAULT) {
103 ol_flags |= PKT_RX_FDIR_ID;
104 mbuf->hash.fdir.hi = match_id - 1;
111 static __rte_always_inline void
112 nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf,
113 uint64_t rearm, const uint16_t flags)
115 const rte_iova_t *iova_list;
116 struct rte_mbuf *head;
117 const rte_iova_t *eol;
121 sg = *(const uint64_t *)(rx + 1);
122 nb_segs = (sg >> 48) & 0x3;
129 mbuf->pkt_len = (rx->pkt_lenm1 + 1) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
130 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
131 mbuf->data_len = (sg & 0xFFFF) - (flags & NIX_RX_OFFLOAD_TSTAMP_F ?
132 CNXK_NIX_TIMESYNC_RX_OFFSET : 0);
133 mbuf->nb_segs = nb_segs;
136 eol = ((const rte_iova_t *)(rx + 1) +
137 ((rx->cn9k.desc_sizem1 + 1) << 1));
138 /* Skip SG_S and first IOVA*/
139 iova_list = ((const rte_iova_t *)(rx + 1)) + 2;
142 rearm = rearm & ~0xFFFF;
146 mbuf->next = ((struct rte_mbuf *)*iova_list) - 1;
149 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
151 mbuf->data_len = sg & 0xFFFF;
153 *(uint64_t *)(&mbuf->rearm_data) = rearm;
157 if (!nb_segs && (iova_list + 1 < eol)) {
158 sg = *(const uint64_t *)(iova_list);
159 nb_segs = (sg >> 48) & 0x3;
160 head->nb_segs += nb_segs;
161 iova_list = (const rte_iova_t *)(iova_list + 1);
167 static __rte_always_inline void
168 cn9k_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
169 struct rte_mbuf *mbuf, const void *lookup_mem,
170 const uint64_t val, const uint16_t flag)
172 const union nix_rx_parse_u *rx =
173 (const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
174 const uint16_t len = rx->cn9k.pkt_lenm1 + 1;
175 const uint64_t w1 = *(const uint64_t *)rx;
176 uint64_t ol_flags = 0;
178 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
179 __mempool_check_cookies(mbuf->pool, (void **)&mbuf, 1, 1);
181 if (flag & NIX_RX_OFFLOAD_PTYPE_F)
182 mbuf->packet_type = nix_ptype_get(lookup_mem, w1);
184 mbuf->packet_type = 0;
186 if (flag & NIX_RX_OFFLOAD_RSS_F) {
187 mbuf->hash.rss = tag;
188 ol_flags |= PKT_RX_RSS_HASH;
191 if (flag & NIX_RX_OFFLOAD_CHECKSUM_F)
192 ol_flags |= nix_rx_olflags_get(lookup_mem, w1);
194 if (flag & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
195 if (rx->cn9k.vtag0_gone) {
196 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
197 mbuf->vlan_tci = rx->cn9k.vtag0_tci;
199 if (rx->cn9k.vtag1_gone) {
200 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
201 mbuf->vlan_tci_outer = rx->cn9k.vtag1_tci;
205 if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
207 nix_update_match_id(rx->cn9k.match_id, ol_flags, mbuf);
209 mbuf->ol_flags = ol_flags;
211 mbuf->data_len = len;
212 *(uint64_t *)(&mbuf->rearm_data) = val;
214 if (flag & NIX_RX_MULTI_SEG_F)
215 nix_cqe_xtract_mseg(rx, mbuf, val, flag);
220 static inline uint16_t
221 nix_rx_nb_pkts(struct cn9k_eth_rxq *rxq, const uint64_t wdata,
222 const uint16_t pkts, const uint32_t qmask)
224 uint32_t available = rxq->available;
226 /* Update the available count if cached value is not enough */
227 if (unlikely(available < pkts)) {
228 uint64_t reg, head, tail;
230 /* Use LDADDA version to avoid reorder */
231 reg = roc_atomic64_add_sync(wdata, rxq->cq_status);
232 /* CQ_OP_STATUS operation error */
233 if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
234 reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
237 tail = reg & 0xFFFFF;
238 head = (reg >> 20) & 0xFFFFF;
240 available = tail - head + qmask + 1;
242 available = tail - head;
244 rxq->available = available;
247 return RTE_MIN(pkts, available);
250 static __rte_always_inline uint16_t
251 cn9k_nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts,
252 const uint16_t flags)
254 struct cn9k_eth_rxq *rxq = rx_queue;
255 const uint64_t mbuf_init = rxq->mbuf_initializer;
256 const void *lookup_mem = rxq->lookup_mem;
257 const uint64_t data_off = rxq->data_off;
258 const uintptr_t desc = rxq->desc;
259 const uint64_t wdata = rxq->wdata;
260 const uint32_t qmask = rxq->qmask;
261 uint16_t packets = 0, nb_pkts;
262 uint32_t head = rxq->head;
263 struct nix_cqe_hdr_s *cq;
264 struct rte_mbuf *mbuf;
266 nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
268 while (packets < nb_pkts) {
269 /* Prefetch N desc ahead */
270 rte_prefetch_non_temporal(
271 (void *)(desc + (CQE_SZ((head + 2) & qmask))));
272 cq = (struct nix_cqe_hdr_s *)(desc + CQE_SZ(head));
274 mbuf = nix_get_mbuf_from_cqe(cq, data_off);
276 cn9k_nix_cqe_to_mbuf(cq, cq->tag, mbuf, lookup_mem, mbuf_init,
278 cnxk_nix_mbuf_to_tstamp(mbuf, rxq->tstamp,
279 (flags & NIX_RX_OFFLOAD_TSTAMP_F),
280 (flags & NIX_RX_MULTI_SEG_F),
281 (uint64_t *)((uint8_t *)mbuf
283 rx_pkts[packets++] = mbuf;
284 roc_prefetch_store_keep(mbuf);
290 rxq->available -= nb_pkts;
292 /* Free all the CQs that we've processed */
293 plt_write64((wdata | nb_pkts), rxq->cq_door);
298 #if defined(RTE_ARCH_ARM64)
300 static __rte_always_inline uint64_t
301 nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
303 if (w2 & BIT_ULL(21) /* vtag0_gone */) {
304 ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
305 *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
311 static __rte_always_inline uint64_t
312 nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
314 if (w2 & BIT_ULL(23) /* vtag1_gone */) {
315 ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
316 mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
322 static __rte_always_inline uint16_t
323 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
324 uint16_t pkts, const uint16_t flags)
326 struct cn9k_eth_rxq *rxq = rx_queue;
327 uint16_t packets = 0;
328 uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
329 const uint64_t mbuf_initializer = rxq->mbuf_initializer;
330 const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
331 uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
332 uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
333 uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
334 uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
335 uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
336 struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
337 const uint16_t *lookup_mem = rxq->lookup_mem;
338 const uint32_t qmask = rxq->qmask;
339 const uint64_t wdata = rxq->wdata;
340 const uintptr_t desc = rxq->desc;
341 uint8x16_t f0, f1, f2, f3;
342 uint32_t head = rxq->head;
345 pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
346 pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1);
348 /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
349 pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
351 while (packets < pkts) {
352 /* Exit loop if head is about to wrap and become unaligned */
353 if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) <
354 NIX_DESCS_PER_LOOP) {
355 pkts_left += (pkts - packets);
359 const uintptr_t cq0 = desc + CQE_SZ(head);
361 /* Prefetch N desc ahead */
362 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
363 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
364 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
365 rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
367 /* Get NIX_RX_SG_S for size and buffer pointer */
368 cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
369 cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
370 cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
371 cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
373 /* Extract mbuf from NIX_RX_SG_S */
374 mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
375 mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
376 mbuf01 = vqsubq_u64(mbuf01, data_off);
377 mbuf23 = vqsubq_u64(mbuf23, data_off);
379 /* Move mbufs to scalar registers for future use */
380 mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
381 mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
382 mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
383 mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
385 /* Mask to get packet len from NIX_RX_SG_S */
386 const uint8x16_t shuf_msk = {
387 0xFF, 0xFF, /* pkt_type set as unknown */
388 0xFF, 0xFF, /* pkt_type set as unknown */
389 0, 1, /* octet 1~0, low 16 bits pkt_len */
390 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */
391 0, 1, /* octet 1~0, 16 bits data_len */
392 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
394 /* Form the rx_descriptor_fields1 with pkt_len and data_len */
395 f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
396 f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
397 f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
398 f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
400 /* Load CQE word0 and word 1 */
401 uint64_t cq0_w0 = ((uint64_t *)(cq0 + CQE_SZ(0)))[0];
402 uint64_t cq0_w1 = ((uint64_t *)(cq0 + CQE_SZ(0)))[1];
403 uint64_t cq1_w0 = ((uint64_t *)(cq0 + CQE_SZ(1)))[0];
404 uint64_t cq1_w1 = ((uint64_t *)(cq0 + CQE_SZ(1)))[1];
405 uint64_t cq2_w0 = ((uint64_t *)(cq0 + CQE_SZ(2)))[0];
406 uint64_t cq2_w1 = ((uint64_t *)(cq0 + CQE_SZ(2)))[1];
407 uint64_t cq3_w0 = ((uint64_t *)(cq0 + CQE_SZ(3)))[0];
408 uint64_t cq3_w1 = ((uint64_t *)(cq0 + CQE_SZ(3)))[1];
410 if (flags & NIX_RX_OFFLOAD_RSS_F) {
411 /* Fill rss in the rx_descriptor_fields1 */
412 f0 = vsetq_lane_u32(cq0_w0, f0, 3);
413 f1 = vsetq_lane_u32(cq1_w0, f1, 3);
414 f2 = vsetq_lane_u32(cq2_w0, f2, 3);
415 f3 = vsetq_lane_u32(cq3_w0, f3, 3);
416 ol_flags0 = PKT_RX_RSS_HASH;
417 ol_flags1 = PKT_RX_RSS_HASH;
418 ol_flags2 = PKT_RX_RSS_HASH;
419 ol_flags3 = PKT_RX_RSS_HASH;
427 if (flags & NIX_RX_OFFLOAD_PTYPE_F) {
428 /* Fill packet_type in the rx_descriptor_fields1 */
429 f0 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq0_w1),
431 f1 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq1_w1),
433 f2 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq2_w1),
435 f3 = vsetq_lane_u32(nix_ptype_get(lookup_mem, cq3_w1),
439 if (flags & NIX_RX_OFFLOAD_CHECKSUM_F) {
440 ol_flags0 |= nix_rx_olflags_get(lookup_mem, cq0_w1);
441 ol_flags1 |= nix_rx_olflags_get(lookup_mem, cq1_w1);
442 ol_flags2 |= nix_rx_olflags_get(lookup_mem, cq2_w1);
443 ol_flags3 |= nix_rx_olflags_get(lookup_mem, cq3_w1);
446 if (flags & NIX_RX_OFFLOAD_VLAN_STRIP_F) {
447 uint64_t cq0_w2 = *(uint64_t *)(cq0 + CQE_SZ(0) + 16);
448 uint64_t cq1_w2 = *(uint64_t *)(cq0 + CQE_SZ(1) + 16);
449 uint64_t cq2_w2 = *(uint64_t *)(cq0 + CQE_SZ(2) + 16);
450 uint64_t cq3_w2 = *(uint64_t *)(cq0 + CQE_SZ(3) + 16);
452 ol_flags0 = nix_vlan_update(cq0_w2, ol_flags0, &f0);
453 ol_flags1 = nix_vlan_update(cq1_w2, ol_flags1, &f1);
454 ol_flags2 = nix_vlan_update(cq2_w2, ol_flags2, &f2);
455 ol_flags3 = nix_vlan_update(cq3_w2, ol_flags3, &f3);
457 ol_flags0 = nix_qinq_update(cq0_w2, ol_flags0, mbuf0);
458 ol_flags1 = nix_qinq_update(cq1_w2, ol_flags1, mbuf1);
459 ol_flags2 = nix_qinq_update(cq2_w2, ol_flags2, mbuf2);
460 ol_flags3 = nix_qinq_update(cq3_w2, ol_flags3, mbuf3);
463 if (flags & NIX_RX_OFFLOAD_MARK_UPDATE_F) {
464 ol_flags0 = nix_update_match_id(
465 *(uint16_t *)(cq0 + CQE_SZ(0) + 38), ol_flags0,
467 ol_flags1 = nix_update_match_id(
468 *(uint16_t *)(cq0 + CQE_SZ(1) + 38), ol_flags1,
470 ol_flags2 = nix_update_match_id(
471 *(uint16_t *)(cq0 + CQE_SZ(2) + 38), ol_flags2,
473 ol_flags3 = nix_update_match_id(
474 *(uint16_t *)(cq0 + CQE_SZ(3) + 38), ol_flags3,
478 if (flags & NIX_RX_OFFLOAD_TSTAMP_F) {
479 const uint16x8_t len_off = {
482 CNXK_NIX_TIMESYNC_RX_OFFSET, /* pktlen 0:15*/
483 0, /* pktlen 16:32 */
484 CNXK_NIX_TIMESYNC_RX_OFFSET, /* datalen 0:15 */
488 const uint32x4_t ptype = {RTE_PTYPE_L2_ETHER_TIMESYNC,
489 RTE_PTYPE_L2_ETHER_TIMESYNC,
490 RTE_PTYPE_L2_ETHER_TIMESYNC,
491 RTE_PTYPE_L2_ETHER_TIMESYNC};
492 const uint64_t ts_olf = PKT_RX_IEEE1588_PTP |
493 PKT_RX_IEEE1588_TMST |
494 rxq->tstamp->rx_tstamp_dynflag;
495 const uint32x4_t and_mask = {0x1, 0x2, 0x4, 0x8};
496 uint64x2_t ts01, ts23, mask;
500 /* Subtract timesync length from total pkt length. */
501 f0 = vsubq_u16(f0, len_off);
502 f1 = vsubq_u16(f1, len_off);
503 f2 = vsubq_u16(f2, len_off);
504 f3 = vsubq_u16(f3, len_off);
506 /* Get the address of actual timestamp. */
507 ts01 = vaddq_u64(mbuf01, data_off);
508 ts23 = vaddq_u64(mbuf23, data_off);
509 /* Load timestamp from address. */
510 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
513 ts01 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts01,
516 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
519 ts23 = vsetq_lane_u64(*(uint64_t *)vgetq_lane_u64(ts23,
522 /* Convert from be to cpu byteorder. */
523 ts01 = vrev64q_u8(ts01);
524 ts23 = vrev64q_u8(ts23);
525 /* Store timestamp into scalar for later use. */
526 ts[0] = vgetq_lane_u64(ts01, 0);
527 ts[1] = vgetq_lane_u64(ts01, 1);
528 ts[2] = vgetq_lane_u64(ts23, 0);
529 ts[3] = vgetq_lane_u64(ts23, 1);
531 /* Store timestamp into dynfield. */
532 *cnxk_nix_timestamp_dynfield(mbuf0, rxq->tstamp) =
534 *cnxk_nix_timestamp_dynfield(mbuf1, rxq->tstamp) =
536 *cnxk_nix_timestamp_dynfield(mbuf2, rxq->tstamp) =
538 *cnxk_nix_timestamp_dynfield(mbuf3, rxq->tstamp) =
541 /* Generate ptype mask to filter L2 ether timesync */
542 mask = vdupq_n_u32(vgetq_lane_u32(f0, 0));
543 mask = vsetq_lane_u32(vgetq_lane_u32(f1, 0), mask, 1);
544 mask = vsetq_lane_u32(vgetq_lane_u32(f2, 0), mask, 2);
545 mask = vsetq_lane_u32(vgetq_lane_u32(f3, 0), mask, 3);
547 /* Match against L2 ether timesync. */
548 mask = vceqq_u32(mask, ptype);
549 /* Convert from vector from scalar mask */
550 res = vaddvq_u32(vandq_u32(mask, and_mask));
554 /* Fill in the ol_flags for any packets that
557 ol_flags0 |= ((res & 0x1) ? ts_olf : 0);
558 ol_flags1 |= ((res & 0x2) ? ts_olf : 0);
559 ol_flags2 |= ((res & 0x4) ? ts_olf : 0);
560 ol_flags3 |= ((res & 0x8) ? ts_olf : 0);
562 /* Update Rxq timestamp with the latest
565 rxq->tstamp->rx_ready = 1;
566 rxq->tstamp->rx_tstamp =
567 ts[31 - __builtin_clz(res)];
571 /* Form rearm_data with ol_flags */
572 rearm0 = vsetq_lane_u64(ol_flags0, rearm0, 1);
573 rearm1 = vsetq_lane_u64(ol_flags1, rearm1, 1);
574 rearm2 = vsetq_lane_u64(ol_flags2, rearm2, 1);
575 rearm3 = vsetq_lane_u64(ol_flags3, rearm3, 1);
577 /* Update rx_descriptor_fields1 */
578 vst1q_u64((uint64_t *)mbuf0->rx_descriptor_fields1, f0);
579 vst1q_u64((uint64_t *)mbuf1->rx_descriptor_fields1, f1);
580 vst1q_u64((uint64_t *)mbuf2->rx_descriptor_fields1, f2);
581 vst1q_u64((uint64_t *)mbuf3->rx_descriptor_fields1, f3);
583 /* Update rearm_data */
584 vst1q_u64((uint64_t *)mbuf0->rearm_data, rearm0);
585 vst1q_u64((uint64_t *)mbuf1->rearm_data, rearm1);
586 vst1q_u64((uint64_t *)mbuf2->rearm_data, rearm2);
587 vst1q_u64((uint64_t *)mbuf3->rearm_data, rearm3);
589 /* Store the mbufs to rx_pkts */
590 vst1q_u64((uint64_t *)&rx_pkts[packets], mbuf01);
591 vst1q_u64((uint64_t *)&rx_pkts[packets + 2], mbuf23);
593 if (flags & NIX_RX_MULTI_SEG_F) {
594 /* Multi segment is enable build mseg list for
595 * individual mbufs in scalar mode.
597 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
598 (cq0 + CQE_SZ(0) + 8), mbuf0,
599 mbuf_initializer, flags);
600 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
601 (cq0 + CQE_SZ(1) + 8), mbuf1,
602 mbuf_initializer, flags);
603 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
604 (cq0 + CQE_SZ(2) + 8), mbuf2,
605 mbuf_initializer, flags);
606 nix_cqe_xtract_mseg((union nix_rx_parse_u *)
607 (cq0 + CQE_SZ(3) + 8), mbuf3,
608 mbuf_initializer, flags);
610 /* Update that no more segments */
618 roc_prefetch_store_keep(mbuf0);
619 roc_prefetch_store_keep(mbuf1);
620 roc_prefetch_store_keep(mbuf2);
621 roc_prefetch_store_keep(mbuf3);
623 /* Mark mempool obj as "get" as it is alloc'ed by NIX */
624 __mempool_check_cookies(mbuf0->pool, (void **)&mbuf0, 1, 1);
625 __mempool_check_cookies(mbuf1->pool, (void **)&mbuf1, 1, 1);
626 __mempool_check_cookies(mbuf2->pool, (void **)&mbuf2, 1, 1);
627 __mempool_check_cookies(mbuf3->pool, (void **)&mbuf3, 1, 1);
629 /* Advance head pointer and packets */
630 head += NIX_DESCS_PER_LOOP;
632 packets += NIX_DESCS_PER_LOOP;
636 rxq->available -= packets;
639 /* Free all the CQs that we've processed */
640 plt_write64((rxq->wdata | packets), rxq->cq_door);
642 if (unlikely(pkts_left))
643 packets += cn9k_nix_recv_pkts(rx_queue, &rx_pkts[packets],
651 static inline uint16_t
652 cn9k_nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
653 uint16_t pkts, const uint16_t flags)
655 RTE_SET_USED(rx_queue);
656 RTE_SET_USED(rx_pkts);
665 #define RSS_F NIX_RX_OFFLOAD_RSS_F
666 #define PTYPE_F NIX_RX_OFFLOAD_PTYPE_F
667 #define CKSUM_F NIX_RX_OFFLOAD_CHECKSUM_F
668 #define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
669 #define TS_F NIX_RX_OFFLOAD_TSTAMP_F
670 #define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
672 /* [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */
673 #define NIX_RX_FASTPATH_MODES \
674 R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
675 R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
676 R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
677 R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
678 R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
679 R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
680 R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
681 R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F) \
682 R(mark, 0, 0, 1, 0, 0, 0, MARK_F) \
683 R(mark_rss, 0, 0, 1, 0, 0, 1, MARK_F | RSS_F) \
684 R(mark_ptype, 0, 0, 1, 0, 1, 0, MARK_F | PTYPE_F) \
685 R(mark_ptype_rss, 0, 0, 1, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
686 R(mark_cksum, 0, 0, 1, 1, 0, 0, MARK_F | CKSUM_F) \
687 R(mark_cksum_rss, 0, 0, 1, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
688 R(mark_cksum_ptype, 0, 0, 1, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F) \
689 R(mark_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
690 MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
691 R(ts, 0, 1, 0, 0, 0, 0, TS_F) \
692 R(ts_rss, 0, 1, 0, 0, 0, 1, TS_F | RSS_F) \
693 R(ts_ptype, 0, 1, 0, 0, 1, 0, TS_F | PTYPE_F) \
694 R(ts_ptype_rss, 0, 1, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
695 R(ts_cksum, 0, 1, 0, 1, 0, 0, TS_F | CKSUM_F) \
696 R(ts_cksum_rss, 0, 1, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
697 R(ts_cksum_ptype, 0, 1, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
698 R(ts_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
699 TS_F | CKSUM_F | PTYPE_F | RSS_F) \
700 R(ts_mark, 0, 1, 1, 0, 0, 0, TS_F | MARK_F) \
701 R(ts_mark_rss, 0, 1, 1, 0, 0, 1, TS_F | MARK_F | RSS_F) \
702 R(ts_mark_ptype, 0, 1, 1, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
703 R(ts_mark_ptype_rss, 0, 1, 1, 0, 1, 1, \
704 TS_F | MARK_F | PTYPE_F | RSS_F) \
705 R(ts_mark_cksum, 0, 1, 1, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
706 R(ts_mark_cksum_rss, 0, 1, 1, 1, 0, 1, \
707 TS_F | MARK_F | CKSUM_F | RSS_F) \
708 R(ts_mark_cksum_ptype, 0, 1, 1, 1, 1, 0, \
709 TS_F | MARK_F | CKSUM_F | PTYPE_F) \
710 R(ts_mark_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
711 TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
712 R(vlan, 1, 0, 0, 0, 0, 0, RX_VLAN_F) \
713 R(vlan_rss, 1, 0, 0, 0, 0, 1, RX_VLAN_F | RSS_F) \
714 R(vlan_ptype, 1, 0, 0, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
715 R(vlan_ptype_rss, 1, 0, 0, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F) \
716 R(vlan_cksum, 1, 0, 0, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
717 R(vlan_cksum_rss, 1, 0, 0, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F) \
718 R(vlan_cksum_ptype, 1, 0, 0, 1, 1, 0, \
719 RX_VLAN_F | CKSUM_F | PTYPE_F) \
720 R(vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
721 RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
722 R(vlan_mark, 1, 0, 1, 0, 0, 0, RX_VLAN_F | MARK_F) \
723 R(vlan_mark_rss, 1, 0, 1, 0, 0, 1, RX_VLAN_F | MARK_F | RSS_F) \
724 R(vlan_mark_ptype, 1, 0, 1, 0, 1, 0, RX_VLAN_F | MARK_F | PTYPE_F)\
725 R(vlan_mark_ptype_rss, 1, 0, 1, 0, 1, 1, \
726 RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \
727 R(vlan_mark_cksum, 1, 0, 1, 1, 0, 0, RX_VLAN_F | MARK_F | CKSUM_F)\
728 R(vlan_mark_cksum_rss, 1, 0, 1, 1, 0, 1, \
729 RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \
730 R(vlan_mark_cksum_ptype, 1, 0, 1, 1, 1, 0, \
731 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \
732 R(vlan_mark_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
733 RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
734 R(vlan_ts, 1, 1, 0, 0, 0, 0, RX_VLAN_F | TS_F) \
735 R(vlan_ts_rss, 1, 1, 0, 0, 0, 1, RX_VLAN_F | TS_F | RSS_F) \
736 R(vlan_ts_ptype, 1, 1, 0, 0, 1, 0, RX_VLAN_F | TS_F | PTYPE_F) \
737 R(vlan_ts_ptype_rss, 1, 1, 0, 0, 1, 1, \
738 RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \
739 R(vlan_ts_cksum, 1, 1, 0, 1, 0, 0, RX_VLAN_F | TS_F | CKSUM_F) \
740 R(vlan_ts_cksum_rss, 1, 1, 0, 1, 0, 1, \
741 RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \
742 R(vlan_ts_cksum_ptype, 1, 1, 0, 1, 1, 0, \
743 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \
744 R(vlan_ts_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
745 RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
746 R(vlan_ts_mark, 1, 1, 1, 0, 0, 0, RX_VLAN_F | TS_F | MARK_F) \
747 R(vlan_ts_mark_rss, 1, 1, 1, 0, 0, 1, \
748 RX_VLAN_F | TS_F | MARK_F | RSS_F) \
749 R(vlan_ts_mark_ptype, 1, 1, 1, 0, 1, 0, \
750 RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \
751 R(vlan_ts_mark_ptype_rss, 1, 1, 1, 0, 1, 1, \
752 RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
753 R(vlan_ts_mark_cksum, 1, 1, 1, 1, 0, 0, \
754 RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \
755 R(vlan_ts_mark_cksum_rss, 1, 1, 1, 1, 0, 1, \
756 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
757 R(vlan_ts_mark_cksum_ptype, 1, 1, 1, 1, 1, 0, \
758 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
759 R(vlan_ts_mark_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
760 RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)
762 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
763 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_##name( \
764 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
766 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_mseg_##name( \
767 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
769 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_##name( \
770 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \
772 uint16_t __rte_noinline __rte_hot cn9k_nix_recv_pkts_vec_mseg_##name( \
773 void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);
775 NIX_RX_FASTPATH_MODES
778 #endif /* __CN9K_RX_H__ */