config/arm/meson.build

   1 # SPDX-License-Identifier: BSD-3-Clause
   2 # Copyright(c) 2017 Intel Corporation.
   3 # Copyright(c) 2017 Cavium, Inc
   4
   5 arm_force_native_march = false
   6
   7 # common flags to all aarch64 builds, with lowest priority
   8 flags_common = [
   9         # Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
  10         # to determine the best threshold in code. Refer to notes in source file
  11         # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info.
  12         ['RTE_ARCH_ARM64_MEMCPY', false],
  13         #       ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
  14         #       ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
  15         # Leave below RTE_ARM64_MEMCPY_xxx options commented out,
  16         # unless there are strong reasons.
  17         #       ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false],
  18         #       ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
  19         #       ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
  20
  21         ['RTE_NET_FM10K', false],
  22         ['RTE_NET_AVP', false],
  23
  24         ['RTE_SCHED_VECTOR', false],
  25         ['RTE_ARM_USE_WFE', false],
  26         ['RTE_ARCH_ARM64', true],
  27         ['RTE_CACHE_LINE_SIZE', 128]
  28 ]
  29
  30 ## Part numbers are specific to Arm implementers
  31 # implementer specific aarch64 flags have middle priority
  32 #     (will overwrite common flags)
  33 # part number specific aarch64 flags have the highest priority
  34 #     (will overwrite both common and implementer specific flags)
  35 implementer_generic = {
  36         'description': 'Generic armv8',
  37         'flags': [
  38                 ['RTE_MACHINE', '"armv8a"'],
  39                 ['RTE_USE_C11_MEM_MODEL', true],
  40                 ['RTE_MAX_LCORE', 256]
  41         ],
  42         'part_number_config': {
  43                 'generic': {'machine_args': ['-march=armv8-a+crc',
  44                                              '-moutline-atomics']}
  45         }
  46 }
  47
  48 part_number_config_arm = {
  49         'generic': {'machine_args':  ['-march=armv8-a+crc',
  50                                       '-moutline-atomics']},
  51         'native': {'machine_args':  ['-march=native']},
  52         '0xd03': {'machine_args':  ['-mcpu=cortex-a53']},
  53         '0xd04': {'machine_args':  ['-mcpu=cortex-a35']},
  54         '0xd07': {'machine_args':  ['-mcpu=cortex-a57']},
  55         '0xd08': {'machine_args':  ['-mcpu=cortex-a72']},
  56         '0xd09': {'machine_args':  ['-mcpu=cortex-a73']},
  57         '0xd0a': {'machine_args':  ['-mcpu=cortex-a75']},
  58         '0xd0b': {'machine_args':  ['-mcpu=cortex-a76']},
  59         '0xd0c': {
  60                 'machine_args':  ['-march=armv8.2-a+crypto',
  61                                   '-mcpu=neoverse-n1'],
  62                 'flags': [
  63                         ['RTE_MACHINE', '"neoverse-n1"'],
  64                         ['RTE_ARM_FEATURE_ATOMICS', true],
  65                         ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
  66                         ['RTE_LIBRTE_VHOST_NUMA', false],
  67                         ['RTE_MAX_MEM_MB', 1048576],
  68                         ['RTE_MAX_LCORE', 80],
  69                         ['RTE_MAX_NUMA_NODES', 1]
  70                 ]
  71         },
  72         '0xd49': {
  73                 'machine_args':  ['-march=armv8.5-a+crypto+sve2'],
  74                 'flags': [
  75                         ['RTE_MACHINE', '"neoverse-n2"'],
  76                         ['RTE_ARM_FEATURE_ATOMICS', true],
  77                         ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
  78                         ['RTE_LIBRTE_VHOST_NUMA', false],
  79                         ['RTE_MAX_LCORE', 64]
  80                 ]
  81         }
  82 }
  83 implementer_arm = {
  84         'description': 'Arm',
  85         'flags': [
  86                 ['RTE_MACHINE', '"armv8a"'],
  87                 ['RTE_USE_C11_MEM_MODEL', true],
  88                 ['RTE_CACHE_LINE_SIZE', 64],
  89                 ['RTE_MAX_LCORE', 16]
  90         ],
  91         'part_number_config': part_number_config_arm
  92 }
  93
  94 flags_part_number_thunderx = [
  95         ['RTE_MACHINE', '"thunderx"'],
  96         ['RTE_USE_C11_MEM_MODEL', false]
  97 ]
  98 implementer_cavium = {
  99         'description': 'Cavium',
 100         'flags': [
 101                 ['RTE_MAX_VFIO_GROUPS', 128],
 102                 ['RTE_MAX_LCORE', 96],
 103                 ['RTE_MAX_NUMA_NODES', 2]
 104         ],
 105         'part_number_config': {
 106                 'generic': {'machine_args': ['-march=armv8-a+crc+crypto',
 107                                              '-mcpu=thunderx']},
 108                 'native': {'machine_args': ['-march=native']},
 109                 '0xa1': {
 110                         'machine_args': ['-mcpu=thunderxt88'],
 111                         'flags': flags_part_number_thunderx
 112                 },
 113                 '0xa2': {
 114                         'machine_args': ['-mcpu=thunderxt81'],
 115                         'flags': flags_part_number_thunderx
 116                 },
 117                 '0xa3': {
 118                         'machine_args': ['-mcpu=thunderxt83'],
 119                         'flags': flags_part_number_thunderx
 120                 },
 121                 '0xaf': {
 122                         'machine_args': ['-march=armv8.1-a+crc+crypto',
 123                                          '-mcpu=thunderx2t99'],
 124                         'flags': [
 125                                 ['RTE_MACHINE', '"thunderx2"'],
 126                                 ['RTE_ARM_FEATURE_ATOMICS', true],
 127                                 ['RTE_USE_C11_MEM_MODEL', true],
 128                                 ['RTE_CACHE_LINE_SIZE', 64],
 129                                 ['RTE_MAX_LCORE', 256],
 130                                 ['RTE_MAX_NUMA_NODES', 2]
 131                         ]
 132                 },
 133                 '0xb2': {
 134                         'machine_args': ['-march=armv8.2-a+crc+crypto+lse',
 135                                          '-mcpu=octeontx2'],
 136                         'flags': [
 137                                 ['RTE_MACHINE', '"octeontx2"'],
 138                                 ['RTE_ARM_FEATURE_ATOMICS', true],
 139                                 ['RTE_USE_C11_MEM_MODEL', true],
 140                                 ['RTE_EAL_IGB_UIO', false],
 141                                 ['RTE_MAX_LCORE', 36],
 142                                 ['RTE_MAX_NUMA_NODES', 1]
 143                         ]
 144                 }
 145         }
 146 }
 147
 148 implementer_ampere = {
 149         'description': 'Ampere Computing',
 150         'flags': [
 151                 ['RTE_MACHINE', '"emag"'],
 152                 ['RTE_CACHE_LINE_SIZE', 64],
 153                 ['RTE_MAX_LCORE', 32],
 154                 ['RTE_MAX_NUMA_NODES', 1]
 155         ],
 156         'part_number_config': {
 157                 'generic': {'machine_args':  ['-march=armv8-a+crc+crypto',
 158                                               '-mtune=emag']},
 159                 'native': {'machine_args':  ['-march=native']}
 160         }
 161 }
 162
 163 implementer_marvell = {
 164         'description': 'Marvell ARMADA',
 165         'flags': [
 166                 ['RTE_MACHINE', '"armv8a"'],
 167                 ['RTE_CACHE_LINE_SIZE', 64],
 168                 ['RTE_MAX_LCORE', 16],
 169                 ['RTE_MAX_NUMA_NODES', 1]
 170         ],
 171         'part_number_config': part_number_config_arm
 172 }
 173
 174 implementer_dpaa = {
 175         'description': 'NXP DPAA',
 176         'flags': [
 177                 ['RTE_MACHINE', '"dpaa"'],
 178                 ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false],
 179                 ['RTE_USE_C11_MEM_MODEL', true],
 180                 ['RTE_CACHE_LINE_SIZE', 64],
 181                 ['RTE_MAX_LCORE', 16],
 182                 ['RTE_MAX_NUMA_NODES', 1]
 183         ],
 184         'part_number_config': part_number_config_arm
 185 }
 186
 187 ## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)
 188 implementers = {
 189         'generic': implementer_generic,
 190         '0x41': implementer_arm,
 191         '0x43': implementer_cavium,
 192         '0x50': implementer_ampere,
 193         '0x56': implementer_marvell,
 194         'dpaa': implementer_dpaa
 195 }
 196
 197 dpdk_conf.set('RTE_ARCH_ARM', 1)
 198 dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
 199
 200 if dpdk_conf.get('RTE_ARCH_32')
 201         # armv7 build
 202         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
 203         dpdk_conf.set('RTE_ARCH_ARMv7', 1)
 204         # the minimum architecture supported, armv7-a, needs the following,
 205         machine_args += '-mfpu=neon'
 206 else
 207         # aarch64 build
 208         implementer_id = 'generic'
 209         if machine == 'default' and not meson.is_cross_build()
 210                 # default build
 211                 implementer_config = implementer['generic']
 212                 part_number = 'generic'
 213         elif not meson.is_cross_build()
 214                 # native build
 215                 # The script returns ['Implementer', 'Variant', 'Architecture',
 216                 # 'Primary Part number', 'Revision']
 217                 detect_vendor = find_program(join_paths(
 218                                 meson.current_source_dir(), 'armv8_machine.py'))
 219                 cmd = run_command(detect_vendor.path())
 220                 if cmd.returncode() == 0
 221                         cmd_output = cmd.stdout().to_lower().strip().split(' ')
 222                         implementer_id = cmd_output[0]
 223                         part_number = cmd_output[3]
 224                 endif
 225                 # Set to generic if variable is not found
 226                 implementer_config = implementers.get(implementer_id, ['generic'])
 227                 if implementer_config[0] == 'generic'
 228                         implementer_config = implementer['generic']
 229                         part_number = 'generic'
 230                 endif
 231                 if arm_force_native_march == true
 232                         part_number = 'native'
 233                 endif
 234         else
 235                 # cross build
 236                 implementer_id = meson.get_cross_property('implementer_id', 'generic')
 237                 part_number = meson.get_cross_property('part_number', 'generic')
 238                 implementer_config = implementers.get(implementer_id)
 239         endif
 240
 241         message('Arm implementer: ' + implementer_config['description'])
 242         message('Arm part number: ' + part_number)
 243
 244         part_number_config = implementer_config['part_number_config']
 245         if part_number_config.has_key(part_number)
 246                 # use the specified part_number machine args if found
 247                 part_number_config = part_number_config[part_number]
 248         elif not meson.is_cross_build()
 249                 # default to generic machine args if part_number is not found
 250                 # and not forcing native machine args
 251                 # but don't default in cross-builds; if part_number is specified
 252                 # incorrectly in a cross-file, it needs to be fixed there
 253                 part_number_config = part_number_config['generic']
 254         else
 255                 # doing cross build and part number is not in part_number_config
 256                 error('Cross build part number 0@0 not found.'.format(part_number))
 257         endif
 258
 259         # use default flags with implementer flags
 260         dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', [])
 261
 262         # apply supported machine args
 263         machine_args = [] # Clear previous machine args
 264         foreach flag: part_number_config['machine_args']
 265                 if cc.has_argument(flag)
 266                         machine_args += flag
 267                 endif
 268         endforeach
 269
 270         # apply flags
 271         foreach flag: dpdk_flags
 272                 if flag.length() > 0
 273                         dpdk_conf.set(flag[0], flag[1])
 274                 endif
 275         endforeach
 276 endif
 277 message('Using machine args: @0@'.format(machine_args))
 278
 279 if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
 280     cc.get_define('__aarch64__', args: machine_args) != '')
 281         compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
 282 endif
 283
 284 if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
 285         compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
 286 endif
 287
 288 if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
 289         compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
 290         'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
 291 endif