1 # SPDX-License-Identifier: BSD-3-Clause
2 # Copyright(c) 2017 Cavium, Inc
5 #include "common_linuxapp"
7 CONFIG_RTE_MACHINE="armv8a"
9 CONFIG_RTE_ARCH="arm64"
10 CONFIG_RTE_ARCH_ARM64=y
13 CONFIG_RTE_FORCE_INTRINSICS=y
15 # Maximum available cache line size in arm64 implementations.
16 # Setting to maximum available cache line size in generic config
17 # to address minimum DMA alignment across all arm64 implementations.
18 CONFIG_RTE_CACHE_LINE_SIZE=128
20 # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
21 # to determine the best threshold in code. Refer to notes in source file
22 # (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info.
23 CONFIG_RTE_ARCH_ARM64_MEMCPY=n
24 #CONFIG_RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD=2048
25 #CONFIG_RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD=512
26 # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
28 #CONFIG_RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK=n
29 #CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF
30 #CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n
32 CONFIG_RTE_RING_USE_C11_MEM_MODEL=y
34 CONFIG_RTE_LIBRTE_FM10K_PMD=n
35 CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
36 CONFIG_RTE_LIBRTE_AVP_PMD=n
38 CONFIG_RTE_SCHED_VECTOR=n
41 # ARMv8 Specific driver compilation flags
45 # Compile NXP DPAA Bus
47 CONFIG_RTE_LIBRTE_DPAA_BUS=y
48 CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
51 # Compile NXP DPAA2 FSL-MC Bus
53 CONFIG_RTE_LIBRTE_FSLMC_BUS=y
56 # Compile NXP DPAA Mempool
58 CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
61 # Compile NXP DPAA2 Mempool
63 CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
66 # Compile bust-oriented NXP DPAA PMD
68 CONFIG_RTE_LIBRTE_DPAA_PMD=y
71 # Compile burst-oriented NXP DPAA2 PMD driver
73 CONFIG_RTE_LIBRTE_DPAA2_PMD=y
76 # Compile schedule-oriented NXP DPAA Event Dev PMD
78 CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y
81 # Compile schedule-oriented NXP DPAA2 EVENTDEV driver
83 CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y
86 # Compile NXP DPAA caam - crypto driver
88 CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y
89 CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
90 CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048
93 # Compile NXP DPAA2 crypto sec driver for CAAM HW
95 CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y
96 CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048