3 # Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions
10 # * Redistributions of source code must retain the above copyright
11 # notice, this list of conditions and the following disclaimer.
12 # * Redistributions in binary form must reproduce the above copyright
13 # notice, this list of conditions and the following disclaimer in
14 # the documentation and/or other materials provided with the
16 # * Neither the name of Intel Corporation nor the names of its
17 # contributors may be used to endorse or promote products derived
18 # from this software without specific prior written permission.
20 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 # define executive environment
35 # RTE_EXEC_ENV values are the directories in mk/exec-env/
40 # define the architecture we compile for.
41 # RTE_ARCH values are the directories in mk/arch/
46 # machine can define specific variables or action for a specific board
47 # RTE_MACHINE values are the directories in mk/machine/
52 # The compiler we use.
53 # RTE_TOOLCHAIN values are the directories in mk/toolchain/
58 # Use intrinsics or assembly code for key routines
60 CONFIG_RTE_FORCE_INTRINSICS=n
63 # Machine forces strict alignment constraints.
65 CONFIG_RTE_ARCH_STRICT_ALIGN=n
68 # Compile to share library
70 CONFIG_RTE_BUILD_SHARED_LIB=n
73 # Use newest code breaking previous ABI
78 # Major ABI to overwrite library specific LIBABIVER
83 # Machine's cache line size
85 CONFIG_RTE_CACHE_LINE_SIZE=64
88 # Compile Environment Abstraction Layer
90 CONFIG_RTE_LIBRTE_EAL=y
91 CONFIG_RTE_MAX_LCORE=128
92 CONFIG_RTE_MAX_NUMA_NODES=8
93 CONFIG_RTE_MAX_MEMSEG=256
94 CONFIG_RTE_MAX_MEMZONE=2560
95 CONFIG_RTE_MAX_TAILQ=32
96 CONFIG_RTE_ENABLE_ASSERT=n
97 CONFIG_RTE_LOG_LEVEL=RTE_LOG_INFO
98 CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
99 CONFIG_RTE_LOG_HISTORY=256
100 CONFIG_RTE_BACKTRACE=y
101 CONFIG_RTE_LIBEAL_USE_HPET=n
102 CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
103 CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
104 CONFIG_RTE_EAL_IGB_UIO=n
105 CONFIG_RTE_EAL_VFIO=n
106 CONFIG_RTE_MAX_VFIO_GROUPS=64
107 CONFIG_RTE_MALLOC_DEBUG=n
108 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
111 # Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing.
112 # AVX512 is marked as experimental for now, will enable it after enough
113 # field test and possible optimization.
115 CONFIG_RTE_ENABLE_AVX=y
116 CONFIG_RTE_ENABLE_AVX512=n
118 # Default driver path (or "" to disable)
119 CONFIG_RTE_EAL_PMD_PATH=""
122 # Compile Environment Abstraction Layer to support Vmware TSC map
124 CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
127 # Compile the PCI library
129 CONFIG_RTE_LIBRTE_PCI=y
132 # Compile the argument parser library
134 CONFIG_RTE_LIBRTE_KVARGS=y
137 # Compile generic ethernet library
139 CONFIG_RTE_LIBRTE_ETHER=y
140 CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
141 CONFIG_RTE_MAX_ETHPORTS=32
142 CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
143 CONFIG_RTE_LIBRTE_IEEE1588=n
144 CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
145 CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
146 CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n
149 # Turn off Tx preparation stage
151 # Warning: rte_eth_tx_prepare() can be safely disabled only if using a
152 # driver which do not implement any Tx preparation.
154 CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
157 # Compile PCI bus driver
159 CONFIG_RTE_LIBRTE_PCI_BUS=y
162 # Compile the vdev bus
164 CONFIG_RTE_LIBRTE_VDEV_BUS=y
167 # Compile burst-oriented Amazon ENA PMD driver
169 CONFIG_RTE_LIBRTE_ENA_PMD=y
170 CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
171 CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
172 CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
173 CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
176 # Compile burst-oriented IGB & EM PMD drivers
178 CONFIG_RTE_LIBRTE_EM_PMD=y
179 CONFIG_RTE_LIBRTE_IGB_PMD=y
180 CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
181 CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
182 CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
183 CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
186 # Compile burst-oriented IXGBE PMD driver
188 CONFIG_RTE_LIBRTE_IXGBE_PMD=y
189 CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
190 CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
191 CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
192 CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
193 CONFIG_RTE_IXGBE_INC_VECTOR=y
194 CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
197 # Compile burst-oriented I40E PMD driver
199 CONFIG_RTE_LIBRTE_I40E_PMD=y
200 CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
201 CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
202 CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
203 CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
204 CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
205 CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
206 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
207 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
208 # interval up to 8160 us, aligned to 2 (or default value)
209 CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
212 # Compile burst-oriented FM10K PMD
214 CONFIG_RTE_LIBRTE_FM10K_PMD=y
215 CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
216 CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
217 CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
218 CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
219 CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
222 # Compile burst-oriented AVF PMD driver
224 CONFIG_RTE_LIBRTE_AVF_PMD=y
225 CONFIG_RTE_LIBRTE_AVF_INC_VECTOR=y
226 CONFIG_RTE_LIBRTE_AVF_DEBUG_TX=n
227 CONFIG_RTE_LIBRTE_AVF_DEBUG_TX_FREE=n
228 CONFIG_RTE_LIBRTE_AVF_DEBUG_RX=n
229 CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n
232 # Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
234 CONFIG_RTE_LIBRTE_MLX4_PMD=n
235 CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
236 CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8
239 # Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD
241 CONFIG_RTE_LIBRTE_MLX5_PMD=n
242 CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
243 CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE=8
246 # Compile burst-oriented Broadcom PMD driver
248 CONFIG_RTE_LIBRTE_BNX2X_PMD=n
249 CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
250 CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
251 CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
252 CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
255 # Compile burst-oriented Chelsio Terminator (CXGBE) PMD
257 CONFIG_RTE_LIBRTE_CXGBE_PMD=y
258 CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n
259 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n
260 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n
261 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n
262 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n
263 CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
266 # Compile burst-oriented Cisco ENIC PMD driver
268 CONFIG_RTE_LIBRTE_ENIC_PMD=y
271 # Compile burst-oriented Netronome NFP PMD driver
273 CONFIG_RTE_LIBRTE_NFP_PMD=n
274 CONFIG_RTE_LIBRTE_NFP_DEBUG_TX=n
275 CONFIG_RTE_LIBRTE_NFP_DEBUG_RX=n
278 # Compile Marvell PMD driver
280 CONFIG_RTE_LIBRTE_MRVL_PMD=n
283 # Compile burst-oriented Broadcom BNXT PMD driver
285 CONFIG_RTE_LIBRTE_BNXT_PMD=y
288 # Compile burst-oriented Solarflare libefx-based PMD
290 CONFIG_RTE_LIBRTE_SFC_EFX_PMD=y
291 CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
294 # Compile SOFTNIC PMD
296 CONFIG_RTE_LIBRTE_PMD_SOFTNIC=y
299 # Compile software PMD backed by SZEDATA2 device
301 CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
303 # Defines firmware type address space.
304 # See documentation for supported values.
305 # Other values raise compile time error.
306 CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
309 # Compile burst-oriented Cavium Thunderx NICVF PMD driver
311 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y
312 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
313 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
316 # Compile burst-oriented Cavium LiquidIO PMD driver
318 CONFIG_RTE_LIBRTE_LIO_PMD=y
319 CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
320 CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
321 CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
322 CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
325 CONFIG_RTE_LIBRTE_DPAA_BUS=n
326 CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
327 CONFIG_RTE_LIBRTE_DPAA_PMD=n
330 # Compile burst-oriented Cavium OCTEONTX network PMD driver
332 CONFIG_RTE_LIBRTE_OCTEONTX_PMD=y
335 # Compile NXP DPAA2 FSL-MC Bus
337 CONFIG_RTE_LIBRTE_FSLMC_BUS=n
340 # Compile Support Libraries for NXP DPAA2
342 CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
343 CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
346 # Compile burst-oriented NXP DPAA2 PMD driver
348 CONFIG_RTE_LIBRTE_DPAA2_PMD=n
349 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
350 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
351 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
352 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n
353 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
356 # Compile burst-oriented VIRTIO PMD driver
358 CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
359 CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
360 CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
361 CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
364 # Compile virtio device emulation inside virtio PMD driver
366 CONFIG_RTE_VIRTIO_USER=n
369 # Compile burst-oriented VMXNET3 PMD driver
371 CONFIG_RTE_LIBRTE_VMXNET3_PMD=y
372 CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
373 CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
374 CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
377 # Compile example software rings based PMD
379 CONFIG_RTE_LIBRTE_PMD_RING=y
380 CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
381 CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
384 # Compile software PMD backed by PCAP files
386 CONFIG_RTE_LIBRTE_PMD_PCAP=n
389 # Compile link bonding PMD library
391 CONFIG_RTE_LIBRTE_PMD_BOND=y
392 CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
393 CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
395 # QLogic 10G/25G/40G/50G/100G PMD
397 CONFIG_RTE_LIBRTE_QEDE_PMD=y
398 CONFIG_RTE_LIBRTE_QEDE_DEBUG_INFO=n
399 CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
400 CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
401 CONFIG_RTE_LIBRTE_QEDE_VF_TX_SWITCH=y
402 #Provides abs path/name of the firmware file.
403 #Empty string denotes driver will use default firmware
404 CONFIG_RTE_LIBRTE_QEDE_FW=""
407 # Compile software PMD backed by AF_PACKET sockets (Linux only)
409 CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
414 CONFIG_RTE_LIBRTE_ARK_PMD=y
415 CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
416 CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
417 CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
418 CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
419 CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
422 # Compile WRS accelerated virtual port (AVP) guest PMD driver
424 CONFIG_RTE_LIBRTE_AVP_PMD=n
425 CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
426 CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
427 CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
430 # Compile the TAP PMD
431 # It is enabled by default for Linux only.
433 CONFIG_RTE_LIBRTE_PMD_TAP=n
438 CONFIG_RTE_LIBRTE_PMD_NULL=y
441 # Compile fail-safe PMD
443 CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
446 # Do prefetch of packet data within PMD driver receive function
448 CONFIG_RTE_PMD_PACKET_PREFETCH=y
451 # Compile generic crypto device library
453 CONFIG_RTE_LIBRTE_CRYPTODEV=y
454 CONFIG_RTE_LIBRTE_CRYPTODEV_DEBUG=n
455 CONFIG_RTE_CRYPTO_MAX_DEVS=64
456 CONFIG_RTE_CRYPTODEV_NAME_LEN=64
459 # Compile PMD for ARMv8 Crypto device
461 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
462 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
465 # Compile NXP DPAA2 crypto sec driver for CAAM HW
467 CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
468 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
469 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
470 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
473 # NXP DPAA caam - crypto driver
475 CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
476 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n
477 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n
478 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n
481 # Compile PMD for QuickAssist based devices
483 CONFIG_RTE_LIBRTE_PMD_QAT=n
484 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_INIT=n
485 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_TX=n
486 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_RX=n
487 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n
489 # Number of sessions to create in the session memory pool
490 # on a single QuickAssist device.
492 CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048
495 # Compile PMD for AESNI backed device
497 CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
498 CONFIG_RTE_LIBRTE_PMD_AESNI_MB_DEBUG=n
501 # Compile PMD for Software backed device
503 CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
504 CONFIG_RTE_LIBRTE_PMD_OPENSSL_DEBUG=n
507 # Compile PMD for AESNI GCM device
509 CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
510 CONFIG_RTE_LIBRTE_PMD_AESNI_GCM_DEBUG=n
513 # Compile PMD for SNOW 3G device
515 CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
516 CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
519 # Compile PMD for KASUMI device
521 CONFIG_RTE_LIBRTE_PMD_KASUMI=n
522 CONFIG_RTE_LIBRTE_PMD_KASUMI_DEBUG=n
525 # Compile PMD for ZUC device
527 CONFIG_RTE_LIBRTE_PMD_ZUC=n
528 CONFIG_RTE_LIBRTE_PMD_ZUC_DEBUG=n
531 # Compile PMD for Crypto Scheduler device
533 CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=y
534 CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
537 # Compile PMD for NULL Crypto device
539 CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
542 # Compile PMD for Marvell Crypto device
544 CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO=n
545 CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO_DEBUG=n
548 # Compile generic security library
550 CONFIG_RTE_LIBRTE_SECURITY=y
553 # Compile generic event device library
555 CONFIG_RTE_LIBRTE_EVENTDEV=y
556 CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
557 CONFIG_RTE_EVENT_MAX_DEVS=16
558 CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
561 # Compile PMD for skeleton event device
563 CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y
564 CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
567 # Compile PMD for software event device
569 CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
570 CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV_DEBUG=n
573 # Compile PMD for octeontx sso event device
575 CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
578 # Compile librte_ring
580 CONFIG_RTE_LIBRTE_RING=y
583 # Compile librte_mempool
585 CONFIG_RTE_LIBRTE_MEMPOOL=y
586 CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
587 CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
590 # Compile Mempool drivers
592 CONFIG_RTE_DRIVER_MEMPOOL_RING=y
593 CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
596 # Compile PMD for octeontx fpa mempool device
598 CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=y
601 # Compile librte_mbuf
603 CONFIG_RTE_LIBRTE_MBUF=y
604 CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
605 CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
606 CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
607 CONFIG_RTE_PKTMBUF_HEADROOM=128
610 # Compile librte_timer
612 CONFIG_RTE_LIBRTE_TIMER=y
613 CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
616 # Compile librte_cfgfile
618 CONFIG_RTE_LIBRTE_CFGFILE=y
621 # Compile librte_cmdline
623 CONFIG_RTE_LIBRTE_CMDLINE=y
624 CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
627 # Compile librte_hash
629 CONFIG_RTE_LIBRTE_HASH=y
630 CONFIG_RTE_LIBRTE_HASH_DEBUG=n
635 CONFIG_RTE_LIBRTE_EFD=y
638 # Compile librte_member
640 CONFIG_RTE_LIBRTE_MEMBER=y
643 # Compile librte_jobstats
645 CONFIG_RTE_LIBRTE_JOBSTATS=y
648 # Compile the device metrics library
650 CONFIG_RTE_LIBRTE_METRICS=y
653 # Compile the bitrate statistics library
655 CONFIG_RTE_LIBRTE_BITRATE=y
658 # Compile the latency statistics library
660 CONFIG_RTE_LIBRTE_LATENCY_STATS=y
665 CONFIG_RTE_LIBRTE_LPM=y
666 CONFIG_RTE_LIBRTE_LPM_DEBUG=n
671 CONFIG_RTE_LIBRTE_ACL=y
672 CONFIG_RTE_LIBRTE_ACL_DEBUG=n
675 # Compile librte_power
677 CONFIG_RTE_LIBRTE_POWER=n
678 CONFIG_RTE_LIBRTE_POWER_DEBUG=n
679 CONFIG_RTE_MAX_LCORE_FREQS=64
684 CONFIG_RTE_LIBRTE_NET=y
687 # Compile librte_ip_frag
689 CONFIG_RTE_LIBRTE_IP_FRAG=y
690 CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
691 CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
692 CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
695 # Compile GRO library
697 CONFIG_RTE_LIBRTE_GRO=y
700 # Compile GSO library
702 CONFIG_RTE_LIBRTE_GSO=y
705 # Compile librte_meter
707 CONFIG_RTE_LIBRTE_METER=y
710 # Compile librte_classify
712 CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=y
715 # Compile librte_sched
717 CONFIG_RTE_LIBRTE_SCHED=y
718 CONFIG_RTE_SCHED_DEBUG=n
719 CONFIG_RTE_SCHED_RED=n
720 CONFIG_RTE_SCHED_COLLECT_STATS=n
721 CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
722 CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
723 CONFIG_RTE_SCHED_VECTOR=n
726 # Compile the distributor library
728 CONFIG_RTE_LIBRTE_DISTRIBUTOR=y
731 # Compile the reorder library
733 CONFIG_RTE_LIBRTE_REORDER=y
736 # Compile librte_port
738 CONFIG_RTE_LIBRTE_PORT=y
739 CONFIG_RTE_PORT_STATS_COLLECT=n
740 CONFIG_RTE_PORT_PCAP=n
743 # Compile librte_table
745 CONFIG_RTE_LIBRTE_TABLE=y
746 CONFIG_RTE_TABLE_STATS_COLLECT=n
749 # Compile librte_pipeline
751 CONFIG_RTE_LIBRTE_PIPELINE=y
752 CONFIG_RTE_PIPELINE_STATS_COLLECT=n
757 CONFIG_RTE_LIBRTE_KNI=n
758 CONFIG_RTE_LIBRTE_PMD_KNI=n
759 CONFIG_RTE_KNI_KMOD=n
760 CONFIG_RTE_KNI_KMOD_ETHTOOL=n
761 CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
764 # Compile the pdump library
766 CONFIG_RTE_LIBRTE_PDUMP=y
769 # Compile vhost user library
771 CONFIG_RTE_LIBRTE_VHOST=n
772 CONFIG_RTE_LIBRTE_VHOST_NUMA=n
773 CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
777 # To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
779 CONFIG_RTE_LIBRTE_PMD_VHOST=n
782 # Compile the test application
784 CONFIG_RTE_APP_TEST=y
785 CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
788 # Compile the PMD test application
790 CONFIG_RTE_TEST_PMD=y
791 CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
792 CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
795 # Compile the crypto performance application
797 CONFIG_RTE_APP_CRYPTO_PERF=y
800 # Compile the eventdev application
802 CONFIG_RTE_APP_EVENTDEV=y