3 # Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions
10 # * Redistributions of source code must retain the above copyright
11 # notice, this list of conditions and the following disclaimer.
12 # * Redistributions in binary form must reproduce the above copyright
13 # notice, this list of conditions and the following disclaimer in
14 # the documentation and/or other materials provided with the
16 # * Neither the name of Intel Corporation nor the names of its
17 # contributors may be used to endorse or promote products derived
18 # from this software without specific prior written permission.
20 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 # define executive environment
35 # RTE_EXEC_ENV values are the directories in mk/exec-env/
40 # define the architecture we compile for.
41 # RTE_ARCH values are the directories in mk/arch/
46 # machine can define specific variables or action for a specific board
47 # RTE_MACHINE values are the directories in mk/machine/
52 # The compiler we use.
53 # RTE_TOOLCHAIN values are the directories in mk/toolchain/
58 # Use intrinsics or assembly code for key routines
60 CONFIG_RTE_FORCE_INTRINSICS=n
63 # Machine forces strict alignment constraints.
65 CONFIG_RTE_ARCH_STRICT_ALIGN=n
68 # Compile to share library
70 CONFIG_RTE_BUILD_SHARED_LIB=n
73 # Use newest code breaking previous ABI
78 # Major ABI to overwrite library specific LIBABIVER
83 # Machine's cache line size
85 CONFIG_RTE_CACHE_LINE_SIZE=64
88 # Compile Environment Abstraction Layer
90 CONFIG_RTE_LIBRTE_EAL=y
91 CONFIG_RTE_MAX_LCORE=128
92 CONFIG_RTE_MAX_NUMA_NODES=8
93 CONFIG_RTE_MAX_MEMSEG=256
94 CONFIG_RTE_MAX_MEMZONE=2560
95 CONFIG_RTE_MAX_TAILQ=32
96 CONFIG_RTE_ENABLE_ASSERT=n
97 CONFIG_RTE_LOG_LEVEL=RTE_LOG_INFO
98 CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
99 CONFIG_RTE_LOG_HISTORY=256
100 CONFIG_RTE_BACKTRACE=y
101 CONFIG_RTE_LIBEAL_USE_HPET=n
102 CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
103 CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
104 CONFIG_RTE_EAL_IGB_UIO=n
105 CONFIG_RTE_EAL_VFIO=n
106 CONFIG_RTE_MALLOC_DEBUG=n
107 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
110 # Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing.
111 # AVX512 is marked as experimental for now, will enable it after enough
112 # field test and possible optimization.
114 CONFIG_RTE_ENABLE_AVX=y
115 CONFIG_RTE_ENABLE_AVX512=n
117 # Default driver path (or "" to disable)
118 CONFIG_RTE_EAL_PMD_PATH=""
121 # Compile Environment Abstraction Layer to support Vmware TSC map
123 CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y
126 # Compile the PCI library
128 CONFIG_RTE_LIBRTE_PCI=y
131 # Compile the argument parser library
133 CONFIG_RTE_LIBRTE_KVARGS=y
136 # Compile generic ethernet library
138 CONFIG_RTE_LIBRTE_ETHER=y
139 CONFIG_RTE_LIBRTE_ETHDEV_DEBUG=n
140 CONFIG_RTE_MAX_ETHPORTS=32
141 CONFIG_RTE_MAX_QUEUES_PER_PORT=1024
142 CONFIG_RTE_LIBRTE_IEEE1588=n
143 CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16
144 CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y
145 CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n
148 # Turn off Tx preparation stage
150 # Warning: rte_eth_tx_prepare() can be safely disabled only if using a
151 # driver which do not implement any Tx preparation.
153 CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n
156 # Compile PCI bus driver
158 CONFIG_RTE_LIBRTE_PCI_BUS=y
161 # Compile the vdev bus
163 CONFIG_RTE_LIBRTE_VDEV_BUS=y
166 # Compile burst-oriented Amazon ENA PMD driver
168 CONFIG_RTE_LIBRTE_ENA_PMD=y
169 CONFIG_RTE_LIBRTE_ENA_DEBUG_RX=n
170 CONFIG_RTE_LIBRTE_ENA_DEBUG_TX=n
171 CONFIG_RTE_LIBRTE_ENA_DEBUG_TX_FREE=n
172 CONFIG_RTE_LIBRTE_ENA_COM_DEBUG=n
175 # Compile burst-oriented IGB & EM PMD drivers
177 CONFIG_RTE_LIBRTE_EM_PMD=y
178 CONFIG_RTE_LIBRTE_IGB_PMD=y
179 CONFIG_RTE_LIBRTE_E1000_DEBUG_RX=n
180 CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n
181 CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n
182 CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n
185 # Compile burst-oriented IXGBE PMD driver
187 CONFIG_RTE_LIBRTE_IXGBE_PMD=y
188 CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n
189 CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
190 CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
191 CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
192 CONFIG_RTE_IXGBE_INC_VECTOR=y
193 CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
196 # Compile burst-oriented I40E PMD driver
198 CONFIG_RTE_LIBRTE_I40E_PMD=y
199 CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n
200 CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n
201 CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n
202 CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y
203 CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y
204 CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
205 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64
206 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4
207 # interval up to 8160 us, aligned to 2 (or default value)
208 CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
211 # Compile burst-oriented FM10K PMD
213 CONFIG_RTE_LIBRTE_FM10K_PMD=y
214 CONFIG_RTE_LIBRTE_FM10K_DEBUG_RX=n
215 CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX=n
216 CONFIG_RTE_LIBRTE_FM10K_DEBUG_TX_FREE=n
217 CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y
218 CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y
221 # Compile burst-oriented AVF PMD driver
223 CONFIG_RTE_LIBRTE_AVF_PMD=y
224 CONFIG_RTE_LIBRTE_AVF_INC_VECTOR=y
225 CONFIG_RTE_LIBRTE_AVF_DEBUG_TX=n
226 CONFIG_RTE_LIBRTE_AVF_DEBUG_TX_FREE=n
227 CONFIG_RTE_LIBRTE_AVF_DEBUG_RX=n
228 CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n
231 # Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
233 CONFIG_RTE_LIBRTE_MLX4_PMD=n
234 CONFIG_RTE_LIBRTE_MLX4_DEBUG=n
235 CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8
238 # Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD
240 CONFIG_RTE_LIBRTE_MLX5_PMD=n
241 CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
242 CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE=8
245 # Compile burst-oriented Broadcom PMD driver
247 CONFIG_RTE_LIBRTE_BNX2X_PMD=n
248 CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
249 CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
250 CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
251 CONFIG_RTE_LIBRTE_BNX2X_DEBUG_PERIODIC=n
254 # Compile burst-oriented Chelsio Terminator (CXGBE) PMD
256 CONFIG_RTE_LIBRTE_CXGBE_PMD=y
257 CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n
258 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n
259 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n
260 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n
261 CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n
262 CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
265 # Compile burst-oriented Cisco ENIC PMD driver
267 CONFIG_RTE_LIBRTE_ENIC_PMD=y
270 # Compile burst-oriented Netronome NFP PMD driver
272 CONFIG_RTE_LIBRTE_NFP_PMD=n
273 CONFIG_RTE_LIBRTE_NFP_DEBUG_TX=n
274 CONFIG_RTE_LIBRTE_NFP_DEBUG_RX=n
277 # Compile Marvell PMD driver
279 CONFIG_RTE_LIBRTE_MRVL_PMD=n
282 # Compile burst-oriented Broadcom BNXT PMD driver
284 CONFIG_RTE_LIBRTE_BNXT_PMD=y
287 # Compile burst-oriented Solarflare libefx-based PMD
289 CONFIG_RTE_LIBRTE_SFC_EFX_PMD=y
290 CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n
293 # Compile SOFTNIC PMD
295 CONFIG_RTE_LIBRTE_PMD_SOFTNIC=y
298 # Compile software PMD backed by SZEDATA2 device
300 CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n
302 # Defines firmware type address space.
303 # See documentation for supported values.
304 # Other values raise compile time error.
305 CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0
308 # Compile burst-oriented Cavium Thunderx NICVF PMD driver
310 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y
311 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n
312 CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n
315 # Compile burst-oriented Cavium LiquidIO PMD driver
317 CONFIG_RTE_LIBRTE_LIO_PMD=y
318 CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n
319 CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n
320 CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n
321 CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
324 CONFIG_RTE_LIBRTE_DPAA_BUS=n
325 CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n
326 CONFIG_RTE_LIBRTE_DPAA_PMD=n
329 # Compile burst-oriented Cavium OCTEONTX network PMD driver
331 CONFIG_RTE_LIBRTE_OCTEONTX_PMD=y
334 # Compile NXP DPAA2 FSL-MC Bus
336 CONFIG_RTE_LIBRTE_FSLMC_BUS=n
339 # Compile Support Libraries for NXP DPAA2
341 CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n
342 CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
345 # Compile burst-oriented NXP DPAA2 PMD driver
347 CONFIG_RTE_LIBRTE_DPAA2_PMD=n
348 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n
349 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
350 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
351 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n
352 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
355 # Compile burst-oriented VIRTIO PMD driver
357 CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
358 CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_RX=n
359 CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_TX=n
360 CONFIG_RTE_LIBRTE_VIRTIO_DEBUG_DUMP=n
363 # Compile virtio device emulation inside virtio PMD driver
365 CONFIG_RTE_VIRTIO_USER=n
368 # Compile burst-oriented VMXNET3 PMD driver
370 CONFIG_RTE_LIBRTE_VMXNET3_PMD=y
371 CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_RX=n
372 CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX=n
373 CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n
376 # Compile example software rings based PMD
378 CONFIG_RTE_LIBRTE_PMD_RING=y
379 CONFIG_RTE_PMD_RING_MAX_RX_RINGS=16
380 CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16
383 # Compile software PMD backed by PCAP files
385 CONFIG_RTE_LIBRTE_PMD_PCAP=n
388 # Compile link bonding PMD library
390 CONFIG_RTE_LIBRTE_PMD_BOND=y
391 CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n
392 CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n
394 # QLogic 10G/25G/40G/50G/100G PMD
396 CONFIG_RTE_LIBRTE_QEDE_PMD=y
397 CONFIG_RTE_LIBRTE_QEDE_DEBUG_INFO=n
398 CONFIG_RTE_LIBRTE_QEDE_DEBUG_TX=n
399 CONFIG_RTE_LIBRTE_QEDE_DEBUG_RX=n
400 CONFIG_RTE_LIBRTE_QEDE_VF_TX_SWITCH=y
401 #Provides abs path/name of the firmware file.
402 #Empty string denotes driver will use default firmware
403 CONFIG_RTE_LIBRTE_QEDE_FW=""
406 # Compile software PMD backed by AF_PACKET sockets (Linux only)
408 CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n
413 CONFIG_RTE_LIBRTE_ARK_PMD=y
414 CONFIG_RTE_LIBRTE_ARK_PAD_TX=y
415 CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n
416 CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n
417 CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n
418 CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n
421 # Compile WRS accelerated virtual port (AVP) guest PMD driver
423 CONFIG_RTE_LIBRTE_AVP_PMD=n
424 CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n
425 CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n
426 CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n
429 # Compile the TAP PMD
430 # It is enabled by default for Linux only.
432 CONFIG_RTE_LIBRTE_PMD_TAP=n
437 CONFIG_RTE_LIBRTE_PMD_NULL=y
440 # Compile fail-safe PMD
442 CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y
445 # Do prefetch of packet data within PMD driver receive function
447 CONFIG_RTE_PMD_PACKET_PREFETCH=y
450 # Compile generic crypto device library
452 CONFIG_RTE_LIBRTE_CRYPTODEV=y
453 CONFIG_RTE_LIBRTE_CRYPTODEV_DEBUG=n
454 CONFIG_RTE_CRYPTO_MAX_DEVS=64
455 CONFIG_RTE_CRYPTODEV_NAME_LEN=64
458 # Compile PMD for ARMv8 Crypto device
460 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n
461 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n
464 # Compile NXP DPAA2 crypto sec driver for CAAM HW
466 CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n
467 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
468 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
469 CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
472 # NXP DPAA caam - crypto driver
474 CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n
475 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n
476 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n
477 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n
480 # Compile PMD for QuickAssist based devices
482 CONFIG_RTE_LIBRTE_PMD_QAT=n
483 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_INIT=n
484 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_TX=n
485 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_RX=n
486 CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n
488 # Number of sessions to create in the session memory pool
489 # on a single QuickAssist device.
491 CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048
494 # Compile PMD for AESNI backed device
496 CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n
497 CONFIG_RTE_LIBRTE_PMD_AESNI_MB_DEBUG=n
500 # Compile PMD for Software backed device
502 CONFIG_RTE_LIBRTE_PMD_OPENSSL=n
503 CONFIG_RTE_LIBRTE_PMD_OPENSSL_DEBUG=n
506 # Compile PMD for AESNI GCM device
508 CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n
509 CONFIG_RTE_LIBRTE_PMD_AESNI_GCM_DEBUG=n
512 # Compile PMD for SNOW 3G device
514 CONFIG_RTE_LIBRTE_PMD_SNOW3G=n
515 CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n
518 # Compile PMD for KASUMI device
520 CONFIG_RTE_LIBRTE_PMD_KASUMI=n
521 CONFIG_RTE_LIBRTE_PMD_KASUMI_DEBUG=n
524 # Compile PMD for ZUC device
526 CONFIG_RTE_LIBRTE_PMD_ZUC=n
527 CONFIG_RTE_LIBRTE_PMD_ZUC_DEBUG=n
530 # Compile PMD for Crypto Scheduler device
532 CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=y
533 CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
536 # Compile PMD for NULL Crypto device
538 CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
541 # Compile PMD for Marvell Crypto device
543 CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO=n
544 CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO_DEBUG=n
547 # Compile generic security library
549 CONFIG_RTE_LIBRTE_SECURITY=y
552 # Compile generic event device library
554 CONFIG_RTE_LIBRTE_EVENTDEV=y
555 CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n
556 CONFIG_RTE_EVENT_MAX_DEVS=16
557 CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64
560 # Compile PMD for skeleton event device
562 CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y
563 CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n
566 # Compile PMD for software event device
568 CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y
569 CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV_DEBUG=n
572 # Compile PMD for octeontx sso event device
574 CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
577 # Compile librte_ring
579 CONFIG_RTE_LIBRTE_RING=y
582 # Compile librte_mempool
584 CONFIG_RTE_LIBRTE_MEMPOOL=y
585 CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512
586 CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n
589 # Compile Mempool drivers
591 CONFIG_RTE_DRIVER_MEMPOOL_RING=y
592 CONFIG_RTE_DRIVER_MEMPOOL_STACK=y
595 # Compile PMD for octeontx fpa mempool device
597 CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=y
600 # Compile librte_mbuf
602 CONFIG_RTE_LIBRTE_MBUF=y
603 CONFIG_RTE_LIBRTE_MBUF_DEBUG=n
604 CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="ring_mp_mc"
605 CONFIG_RTE_MBUF_REFCNT_ATOMIC=y
606 CONFIG_RTE_PKTMBUF_HEADROOM=128
609 # Compile librte_timer
611 CONFIG_RTE_LIBRTE_TIMER=y
612 CONFIG_RTE_LIBRTE_TIMER_DEBUG=n
615 # Compile librte_cfgfile
617 CONFIG_RTE_LIBRTE_CFGFILE=y
620 # Compile librte_cmdline
622 CONFIG_RTE_LIBRTE_CMDLINE=y
623 CONFIG_RTE_LIBRTE_CMDLINE_DEBUG=n
626 # Compile librte_hash
628 CONFIG_RTE_LIBRTE_HASH=y
629 CONFIG_RTE_LIBRTE_HASH_DEBUG=n
634 CONFIG_RTE_LIBRTE_EFD=y
637 # Compile librte_member
639 CONFIG_RTE_LIBRTE_MEMBER=y
642 # Compile librte_jobstats
644 CONFIG_RTE_LIBRTE_JOBSTATS=y
647 # Compile the device metrics library
649 CONFIG_RTE_LIBRTE_METRICS=y
652 # Compile the bitrate statistics library
654 CONFIG_RTE_LIBRTE_BITRATE=y
657 # Compile the latency statistics library
659 CONFIG_RTE_LIBRTE_LATENCY_STATS=y
664 CONFIG_RTE_LIBRTE_LPM=y
665 CONFIG_RTE_LIBRTE_LPM_DEBUG=n
670 CONFIG_RTE_LIBRTE_ACL=y
671 CONFIG_RTE_LIBRTE_ACL_DEBUG=n
674 # Compile librte_power
676 CONFIG_RTE_LIBRTE_POWER=n
677 CONFIG_RTE_LIBRTE_POWER_DEBUG=n
678 CONFIG_RTE_MAX_LCORE_FREQS=64
683 CONFIG_RTE_LIBRTE_NET=y
686 # Compile librte_ip_frag
688 CONFIG_RTE_LIBRTE_IP_FRAG=y
689 CONFIG_RTE_LIBRTE_IP_FRAG_DEBUG=n
690 CONFIG_RTE_LIBRTE_IP_FRAG_MAX_FRAG=4
691 CONFIG_RTE_LIBRTE_IP_FRAG_TBL_STAT=n
694 # Compile GRO library
696 CONFIG_RTE_LIBRTE_GRO=y
699 # Compile GSO library
701 CONFIG_RTE_LIBRTE_GSO=y
704 # Compile librte_meter
706 CONFIG_RTE_LIBRTE_METER=y
709 # Compile librte_classify
711 CONFIG_RTE_LIBRTE_FLOW_CLASSIFY=y
714 # Compile librte_sched
716 CONFIG_RTE_LIBRTE_SCHED=y
717 CONFIG_RTE_SCHED_DEBUG=n
718 CONFIG_RTE_SCHED_RED=n
719 CONFIG_RTE_SCHED_COLLECT_STATS=n
720 CONFIG_RTE_SCHED_SUBPORT_TC_OV=n
721 CONFIG_RTE_SCHED_PORT_N_GRINDERS=8
722 CONFIG_RTE_SCHED_VECTOR=n
725 # Compile the distributor library
727 CONFIG_RTE_LIBRTE_DISTRIBUTOR=y
730 # Compile the reorder library
732 CONFIG_RTE_LIBRTE_REORDER=y
735 # Compile librte_port
737 CONFIG_RTE_LIBRTE_PORT=y
738 CONFIG_RTE_PORT_STATS_COLLECT=n
739 CONFIG_RTE_PORT_PCAP=n
742 # Compile librte_table
744 CONFIG_RTE_LIBRTE_TABLE=y
745 CONFIG_RTE_TABLE_STATS_COLLECT=n
748 # Compile librte_pipeline
750 CONFIG_RTE_LIBRTE_PIPELINE=y
751 CONFIG_RTE_PIPELINE_STATS_COLLECT=n
756 CONFIG_RTE_LIBRTE_KNI=n
757 CONFIG_RTE_LIBRTE_PMD_KNI=n
758 CONFIG_RTE_KNI_KMOD=n
759 CONFIG_RTE_KNI_KMOD_ETHTOOL=n
760 CONFIG_RTE_KNI_PREEMPT_DEFAULT=y
763 # Compile the pdump library
765 CONFIG_RTE_LIBRTE_PDUMP=y
768 # Compile vhost user library
770 CONFIG_RTE_LIBRTE_VHOST=n
771 CONFIG_RTE_LIBRTE_VHOST_NUMA=n
772 CONFIG_RTE_LIBRTE_VHOST_DEBUG=n
776 # To compile, CONFIG_RTE_LIBRTE_VHOST should be enabled.
778 CONFIG_RTE_LIBRTE_PMD_VHOST=n
781 # Compile the test application
783 CONFIG_RTE_APP_TEST=y
784 CONFIG_RTE_APP_TEST_RESOURCE_TAR=n
787 # Compile the PMD test application
789 CONFIG_RTE_TEST_PMD=y
790 CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
791 CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
794 # Compile the crypto performance application
796 CONFIG_RTE_APP_CRYPTO_PERF=y
799 # Compile the eventdev application
801 CONFIG_RTE_APP_EVENTDEV=y