3 # Copyright 2016 Freescale Semiconductor, Inc.
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions
10 # * Redistributions of source code must retain the above copyright
11 # notice, this list of conditions and the following disclaimer.
12 # * Redistributions in binary form must reproduce the above copyright
13 # notice, this list of conditions and the following disclaimer in
14 # the documentation and/or other materials provided with the
16 # * Neither the name of NXP nor the names of its
17 # contributors may be used to endorse or promote products derived
18 # from this software without specific prior written permission.
20 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include "defconfig_arm64-armv8a-linuxapp-gcc"
35 # NXP (Freescale) - Soc Architecture with FMAN, QMAN & BMAN support
36 CONFIG_RTE_MACHINE="dpaa"
37 CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
38 CONFIG_RTE_LIBRTE_VHOST_NUMA=n
39 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
42 # Compile Environment Abstraction Layer
44 CONFIG_RTE_MAX_LCORE=4
45 CONFIG_RTE_MAX_NUMA_NODES=1
46 CONFIG_RTE_CACHE_LINE_SIZE=64
47 CONFIG_RTE_PKTMBUF_HEADROOM=128
50 CONFIG_RTE_LIBRTE_DPAA_BUS=y
51 CONFIG_RTE_LIBRTE_DPAA_DEBUG_DRIVER=n
52 CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
55 CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
56 CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa"
58 # Compile software NXP DPAA PMD
59 CONFIG_RTE_LIBRTE_DPAA_PMD=y
62 # FSL DPAA caam - crypto driver
64 CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y
65 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n
66 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n
67 CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n
69 # DPAA CAAM driver instances
70 CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
73 # Number of sessions to create in the session memory pool
74 # on a single DPAA SEC device.
76 CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048