4 * Copyright(c) 2017 Intel Corporation.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 * @file Header file containing DPDK compilation parameters
37 * Header file containing DPDK compilation parameters. Also include the
38 * meson-generated header file containing the detected parameters that
39 * are variable across builds or build environments.
41 * NOTE: This file is only used for meson+ninja builds. For builds done
42 * using make/gmake, the rte_config.h file is autogenerated from the
43 * defconfig_* files in the config directory.
45 #ifndef _RTE_CONFIG_H_
46 #define _RTE_CONFIG_H_
48 #include <rte_build_config.h>
50 /****** library defines ********/
53 #define RTE_MAX_MEMSEG 512
54 #define RTE_MAX_MEMZONE 2560
55 #define RTE_MAX_TAILQ 32
56 #define RTE_LOG_LEVEL RTE_LOG_INFO
57 #define RTE_LOG_DP_LEVEL RTE_LOG_INFO
58 #define RTE_BACKTRACE 1
59 #define RTE_EAL_VFIO 1
62 #define RTE_MEMPOOL_CACHE_MAX_SIZE 512
65 #define RTE_MBUF_DEFAULT_MEMPOOL_OPS "ring_mp_mc"
66 #define RTE_MBUF_REFCNT_ATOMIC 1
67 #define RTE_PKTMBUF_HEADROOM 128
70 #define RTE_MAX_ETHPORTS 32
71 #define RTE_MAX_QUEUES_PER_PORT 1024
72 #define RTE_ETHDEV_QUEUE_STAT_CNTRS 16
73 #define RTE_ETHDEV_RXTX_CALLBACKS 1
75 /* cryptodev defines */
76 #define RTE_CRYPTO_MAX_DEVS 64
77 #define RTE_CRYPTODEV_NAME_LEN 64
79 /* eventdev defines */
80 #define RTE_EVENT_MAX_DEVS 16
81 #define RTE_EVENT_MAX_QUEUES_PER_DEV 64
83 /* ip_fragmentation defines */
84 #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 4
85 #undef RTE_LIBRTE_IP_FRAG_TBL_STAT
87 /* rte_power defines */
88 #define RTE_MAX_LCORE_FREQS 64
90 /* rte_sched defines */
92 #undef RTE_SCHED_COLLECT_STATS
93 #undef RTE_SCHED_SUBPORT_TC_OV
94 #define RTE_SCHED_PORT_N_GRINDERS 8
95 #undef RTE_SCHED_VECTOR
97 /****** driver defines ********/
100 * Number of sessions to create in the session memory pool
101 * on a single QuickAssist device.
103 #define RTE_QAT_PMD_MAX_NB_SESSIONS 2048
106 #define RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE 1
109 #define RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC 1
110 #undef RTE_LIBRTE_I40E_16BYTE_RX_DESC
111 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64
112 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4
113 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4
114 /* interval up to 8160 us, aligned to 2 (or default value) */
115 #define RTE_LIBRTE_I40E_ITR_INTERVAL -1
117 /* Ring net PMD settings */
118 #define RTE_PMD_RING_MAX_RX_RINGS 16
119 #define RTE_PMD_RING_MAX_TX_RINGS 16
121 #endif /* _RTE_CONFIG_H_ */