2 Copyright 2015 Chelsio Communications.
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31 CXGBE Poll Mode Driver
32 ======================
34 The CXGBE PMD (**librte_pmd_cxgbe**) provides poll mode driver support
35 for **Chelsio T5** 10/40 Gbps family of adapters.
37 More information can be found at `Chelsio Communications
38 <http://www.chelsio.com>`_.
43 CXGBE PMD has the support for:
45 - Multiple queues for TX and RX.
46 - Receiver Side Steering (RSS).
51 - Port hardware statistics.
56 The Chelsio T5 devices provide two/four ports but expose a single PCI bus
57 address, thus, librte_pmd_cxgbe registers itself as a
58 PCI driver that allocates one Ethernet device per detected port.
60 For this reason, one cannot white/blacklist a single port without also
61 white/blacklisting the others on the same device.
69 These options can be modified in the ``.config`` file.
71 - ``CONFIG_RTE_LIBRTE_CXGBE_PMD`` (default **y**)
73 Toggle compilation of librte_pmd_cxgbe driver.
75 - ``CONFIG_RTE_LIBRTE_CXGBE_DEBUG`` (default **n**)
77 Toggle debugging code. Enabling this option adds additional generic debugging
78 messages at the cost of lower performance.
80 - ``CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG`` (default **n**)
82 Toggle debugging code. Enabling this option adds additional registers related
83 run-time checks and debugging messages at the cost of lower performance.
85 - ``CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX`` (default **n**)
87 Toggle debugging code. Enabling this option adds additional firmware mailbox
88 related run-time checks and debugging messages at the cost of lower
91 - ``CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX`` (default **n**)
93 Toggle debugging code. Enabling this option adds additional transmission data
94 path run-time checks and debugging messages at the cost of lower performance.
96 - ``CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX`` (default **n**)
98 Toggle debugging code. Enabling this option adds additional receiving data
99 path run-time checks and debugging messages at the cost of lower performance.
104 - Requires firmware version **1.13.32.0** and higher. Visit
105 `Chelsio Communications <http://www.chelsio.com>`_ to get latest firmware.
107 Sample Application Notes
108 -------------------------
110 This section demonstrates how to launch **testpmd** with Chelsio T5
111 devices managed by librte_pmd_cxgbe.
113 #. Load the kernel module:
115 .. code-block:: console
119 #. Get the PCI bus addresses of the interfaces bound to cxgb4 driver:
121 .. code-block:: console
127 .. code-block:: console
129 cxgb4 0000:02:00.4 p1p1: renamed from eth0
130 cxgb4 0000:02:00.4 p1p2: renamed from eth1
134 Both the interfaces of a Chelsio T5 2-port adapter are bound to the
135 same PCI bus address.
137 #. Unload the kernel module:
139 .. code-block:: console
141 modprobe -ar cxgb4 csiostor
143 #. Request huge pages:
145 .. code-block:: console
147 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
149 #. Load igb_uio or vfio-pci driver:
151 .. code-block:: console
153 insmod ./x86_64-native-linuxapp-gcc/kmod/igb_uio.ko
157 .. code-block:: console
161 #. Bind the Chelsio T5 adapters to igb_uio or vfio-pci loaded in the previous
164 .. code-block:: console
166 ./tools/dpdk_nic_bind.py --bind igb_uio 0000:02:00.4
170 Setup VFIO permissions for regular users and then bind to vfio-pci:
172 .. code-block:: console
174 sudo chmod a+x /dev/vfio
176 sudo chmod 0666 /dev/vfio/*
178 ./tools/dpdk_nic_bind.py --bind vfio-pci 0000:02:00.4
180 #. Start testpmd with basic parameters:
182 .. code-block:: console
184 ./x86_64-native-linuxapp-gcc/app/testpmd -c 0xf -n 4 -w 0000:02:00.4 -- -i
188 .. code-block:: console
191 EAL: PCI device 0000:02:00.4 on NUMA socket -1
192 EAL: probe driver: 1425:5401 rte_cxgbe_pmd
193 EAL: PCI memory mapped at 0x7fd7c0200000
194 EAL: PCI memory mapped at 0x7fd77cdfd000
195 EAL: PCI memory mapped at 0x7fd7c10b7000
196 PMD: rte_cxgbe_pmd: fw: 1.13.33.0, TP: 0.1.4.8
197 PMD: rte_cxgbe_pmd: Coming up as MASTER: Initializing adapter
198 Interactive-mode selected
199 Configuring Port 0 (socket 0)
200 Port 0: 00:07:43:2D:EA:C0
201 Configuring Port 1 (socket 0)
202 Port 1: 00:07:43:2D:EA:C8
203 Checking link statuses...
204 PMD: rte_cxgbe_pmd: Port0: passive DA port module inserted
205 PMD: rte_cxgbe_pmd: Port1: passive DA port module inserted
206 Port 0 Link Up - speed 10000 Mbps - full-duplex
207 Port 1 Link Up - speed 10000 Mbps - full-duplex