1 .. SPDX-License-Identifier: BSD-3-Clause
5 NXP CAAM JOB RING (caam_jr)
6 ===========================
8 The caam_jr PMD provides poll mode crypto driver support for NXP SEC 4.x+ (CAAM)
9 hardware accelerator. More information is available at:
11 `NXP Cryptographic Acceleration Technology <https://www.nxp.com/applications/solutions/internet-of-things/secure-things/network-security-technology/cryptographic-acceleration-technology:NETWORK_SECURITY_CRYPTOG>`_.
16 SEC is the SOC's security engine, which serves as NXP's latest cryptographic
17 acceleration and offloading hardware. It combines functions previously
18 implemented in separate modules to create a modular and scalable acceleration
19 and assurance engine. It also implements block encryption algorithms, stream
20 cipher algorithms, hashing algorithms, public key algorithms, run-time
21 integrity checking, and a hardware random number generator. SEC performs
22 higher-level cryptographic operations than previous NXP cryptographic
23 accelerators. This provides significant improvement to system level performance.
25 SEC HW accelerator above 4.x+ version are also known as CAAM.
27 caam_jr PMD is one of DPAA drivers which uses UIO interface to interact with
28 Linux kernel for configure and destroy the device instance (ring).
34 SEC provides platform assurance by working with SecMon, which is a companion
35 logic block that tracks the security state of the SOC. SEC is programmed by
36 means of descriptors (not to be confused with frame descriptors (FDs)) that
37 indicate the operations to be performed and link to the message and
38 associated data. SEC incorporates two DMA engines to fetch the descriptors,
39 read the message data, and write the results of the operations. The DMA
40 engine provides a scatter/gather capability so that SEC can read and write
41 data scattered in memory. SEC may be configured by means of software for
42 dynamic changes in byte ordering. The default configuration for this version
43 of SEC is little-endian mode.
45 Note that one physical Job Ring represent one caam_jr device.
50 The CAAM_JR PMD has support for:
54 * ``RTE_CRYPTO_CIPHER_3DES_CBC``
55 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
56 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
57 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
58 * ``RTE_CRYPTO_CIPHER_AES128_CTR``
59 * ``RTE_CRYPTO_CIPHER_AES192_CTR``
60 * ``RTE_CRYPTO_CIPHER_AES256_CTR``
64 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
65 * ``RTE_CRYPTO_AUTH_SHA224_HMAC``
66 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
67 * ``RTE_CRYPTO_AUTH_SHA384_HMAC``
68 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
69 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
73 * ``RTE_CRYPTO_AEAD_AES_GCM``
86 * Hash followed by Cipher mode is not supported
87 * Only supports the session-oriented API implementation (session-less APIs are not supported).
92 caam_jr driver has following dependencies are not part of DPDK and must be installed separately:
96 NXP Linux software development kit (SDK) includes support for the family
97 of QorIQ® ARM-Architecture-based system on chip (SoC) processors
98 and corresponding boards.
100 It includes the Linux board support packages (BSPs) for NXP SoCs,
101 a fully operational tool chain, kernel and board specific modules.
103 SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.
105 Currently supported by DPDK:
107 * NXP SDK **18.09+**.
108 * Supported architectures: **arm64 LE**.
110 * Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
116 For enabling logs, use the following EAL parameter:
118 .. code-block:: console
120 ./your_crypto_application <EAL args> --log-level=pmd.crypto.caam,<level>