1 .. SPDX-License-Identifier: BSD-3-Clause
6 NXP DPAA2 CAAM (DPAA2_SEC)
7 ==========================
9 The DPAA2_SEC PMD provides poll mode crypto driver support for NXP DPAA2 CAAM
15 SEC is the SOC's security engine, which serves as NXP's latest cryptographic
16 acceleration and offloading hardware. It combines functions previously
17 implemented in separate modules to create a modular and scalable acceleration
18 and assurance engine. It also implements block encryption algorithms, stream
19 cipher algorithms, hashing algorithms, public key algorithms, run-time
20 integrity checking, and a hardware random number generator. SEC performs
21 higher-level cryptographic operations than previous NXP cryptographic
22 accelerators. This provides significant improvement to system level performance.
24 DPAA2_SEC is one of the hardware resource in DPAA2 Architecture. More information
25 on DPAA2 Architecture is described in :ref:`dpaa2_overview`.
27 DPAA2_SEC PMD is one of DPAA2 drivers which interacts with Management Complex (MC)
28 portal to access the hardware object - DPSECI. The MC provides access to create,
29 discover, connect, configure and destroy dpseci objects in DPAA2_SEC PMD.
31 DPAA2_SEC PMD also uses some of the other hardware resources like buffer pools,
32 queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
34 DPSECI objects are detected by PMD using a resource container called DPRC (like
35 in :ref:`dpaa2_overview`).
39 .. code-block:: console
43 +--+--------+-------+-------+-------+---------+
45 DPMCP.1 DPIO.1 DPBP.1 DPNI.1 DPMAC.1 DPSECI.1
46 DPMCP.2 DPIO.2 DPNI.2 DPMAC.2 DPSECI.2
52 SEC provides platform assurance by working with SecMon, which is a companion
53 logic block that tracks the security state of the SOC. SEC is programmed by
54 means of descriptors (not to be confused with frame descriptors (FDs)) that
55 indicate the operations to be performed and link to the message and
56 associated data. SEC incorporates two DMA engines to fetch the descriptors,
57 read the message data, and write the results of the operations. The DMA
58 engine provides a scatter/gather capability so that SEC can read and write
59 data scattered in memory. SEC may be configured by means of software for
60 dynamic changes in byte ordering. The default configuration for this version
61 of SEC is little-endian mode.
63 A block diagram similar to dpaa2 NIC is shown below to show where DPAA2_SEC
64 fits in the DPAA2 Bus model
66 .. code-block:: console
72 +----------------+ +------------+
73 | MC SEC object |.......| Mempool |
74 . . . . . . . . . | (DPSECI) | | (DPBP) |
75 . +---+---+--------+ +-----+------+
81 . . . . . . . . . . .| DPIO driver| .
86 +----+------+-------+ +-----+----- | .
88 | VFIO fslmc-bus |....................|.........................
91 +-------------------+ |
93 ========================== HARDWARE =====|=======================
97 =========================================|========================
104 The DPAA2_SEC PMD has support for:
108 * ``RTE_CRYPTO_CIPHER_3DES_CBC``
109 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
110 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
111 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
112 * ``RTE_CRYPTO_CIPHER_AES128_CTR``
113 * ``RTE_CRYPTO_CIPHER_AES192_CTR``
114 * ``RTE_CRYPTO_CIPHER_AES256_CTR``
118 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
119 * ``RTE_CRYPTO_AUTH_SHA224_HMAC``
120 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
121 * ``RTE_CRYPTO_AUTH_SHA384_HMAC``
122 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
123 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
127 * ``RTE_CRYPTO_AEAD_AES_GCM``
140 * Chained mbufs are not supported.
141 * Hash followed by Cipher mode is not supported
142 * Only supports the session-oriented API implementation (session-less APIs are not supported).
147 DPAA2_SEC driver has similar pre-requisites as described in :ref:`dpaa2_overview`.
148 The following dependencies are not part of DPDK and must be installed separately:
152 NXP Linux software development kit (SDK) includes support for the family
153 of QorIQ® ARM-Architecture-based system on chip (SoC) processors
154 and corresponding boards.
156 It includes the Linux board support packages (BSPs) for NXP SoCs,
157 a fully operational tool chain, kernel and board specific modules.
159 SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.
161 * **DPDK Extra Scripts**
163 DPAA2 based resources can be configured easily with the help of ready scripts
164 as provided in the DPDK helper repository.
166 `DPDK Extra Scripts <https://github.com/qoriq-open-source/dpdk-extras>`_.
168 Currently supported by DPDK:
170 * NXP SDK **17.08+**.
171 * MC Firmware version **10.3.1** and higher.
172 * Supported architectures: **arm64 LE**.
174 * Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
176 Pre-Installation Configuration
177 ------------------------------
182 Basic DPAA2 config file options are described in :ref:`dpaa2_overview`.
183 In addition to those, the following options can be modified in the ``config`` file
184 to enable DPAA2_SEC PMD.
186 Please note that enabling debugging options may affect system performance.
188 * ``CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC`` (default ``n``)
189 By default it is only enabled in defconfig_arm64-dpaa2-* config.
190 Toggle compilation of the ``librte_pmd_dpaa2_sec`` driver.
192 * ``CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS``
193 By default it is set as 2048 in defconfig_arm64-dpaa2-* config.
194 It indicates Number of sessions to create in the session memory pool
195 on a single DPAA2 SEC device.
199 To compile the DPAA2_SEC PMD for Linux arm64 gcc target, run the
200 following ``make`` command:
202 .. code-block:: console
204 cd <DPDK-source-directory>
205 make config T=arm64-dpaa2-linuxapp-gcc install
210 For enabling logs, use the following EAL parameter:
212 .. code-block:: console
214 ./your_crypto_application <EAL args> --log-level=pmd.crypto.dpaa2,<level>
216 Using ``crypto.dpaa2`` as log matching criteria, all Crypto PMD logs can be
217 enabled which are lower than logging ``level``.