1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright(c) 2015-2016 Intel Corporation.
4 Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
5 ==================================================
7 QAT documentation consists of three parts:
9 * Details of the symmetric crypto service below.
10 * Details of the `compression service <http://doc.dpdk.org/guides/compressdevs/qat_comp.html>`_
11 in the compressdev drivers section.
12 * Details of building the common QAT infrastructure and the PMDs to support the
13 above services. See :ref:`building_qat` below.
16 Symmetric Crypto Service on QAT
17 -------------------------------
19 The QAT crypto PMD provides poll mode crypto driver support for the following
20 hardware accelerator devices:
22 * ``Intel QuickAssist Technology DH895xCC``
23 * ``Intel QuickAssist Technology C62x``
24 * ``Intel QuickAssist Technology C3xxx``
25 * ``Intel QuickAssist Technology D15xx``
26 * ``Intel QuickAssist Technology C4xxx``
32 The QAT PMD has support for:
36 * ``RTE_CRYPTO_CIPHER_3DES_CBC``
37 * ``RTE_CRYPTO_CIPHER_3DES_CTR``
38 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
39 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
40 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
41 * ``RTE_CRYPTO_CIPHER_AES128_CTR``
42 * ``RTE_CRYPTO_CIPHER_AES192_CTR``
43 * ``RTE_CRYPTO_CIPHER_AES256_CTR``
44 * ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
45 * ``RTE_CRYPTO_CIPHER_NULL``
46 * ``RTE_CRYPTO_CIPHER_KASUMI_F8``
47 * ``RTE_CRYPTO_CIPHER_DES_CBC``
48 * ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
49 * ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
50 * ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
54 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
55 * ``RTE_CRYPTO_AUTH_SHA224_HMAC``
56 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
57 * ``RTE_CRYPTO_AUTH_SHA384_HMAC``
58 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
59 * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
60 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
61 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
62 * ``RTE_CRYPTO_AUTH_NULL``
63 * ``RTE_CRYPTO_AUTH_KASUMI_F9``
64 * ``RTE_CRYPTO_AUTH_AES_GMAC``
65 * ``RTE_CRYPTO_AUTH_ZUC_EIA3``
66 * ``RTE_CRYPTO_AUTH_AES_CMAC``
68 Supported AEAD algorithms:
70 * ``RTE_CRYPTO_AEAD_AES_GCM``
71 * ``RTE_CRYPTO_AEAD_AES_CCM``
77 * Only supports the session-oriented API implementation (session-less APIs are not supported).
78 * SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
79 * SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
80 * No BSD support as BSD QAT kernel driver not available.
81 * ZUC EEA3/EIA3 is not supported by dh895xcc devices
82 * Maximum additional authenticated data (AAD) for GCM is 240 bytes long.
83 * Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
86 Extra notes on KASUMI F9
87 ~~~~~~~~~~~~~~~~~~~~~~~~
89 When using KASUMI F9 authentication algorithm, the input buffer must be
90 constructed according to the
91 `3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_
92 (section 4.4, page 13). The input buffer has to have COUNT (4 bytes),
93 FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION
94 bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that
95 the total length of the buffer is multiple of 8 bits. Note that the actual
96 message can be any length, specified in bits.
98 Once this buffer is passed this way, when creating the crypto operation,
99 length of data to authenticate "op.sym.auth.data.length" must be the length
100 of all the items described above, including the padding at the end.
101 Also, offset of data to authenticate "op.sym.auth.data.offset"
102 must be such that points at the start of the COUNT bytes.
111 A QAT device can host multiple acceleration services:
113 * symmetric cryptography
116 These services are provided to DPDK applications via PMDs which register to
117 implement the corresponding cryptodev and compressdev APIs. The PMDs use
118 common QAT driver code which manages the QAT PCI device. They also depend on a
119 QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below.
122 Configuring and Building the DPDK QAT PMDs
123 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
126 Further information on configuring, building and installing DPDK is described
127 `here <http://doc.dpdk.org/guides/linux_gsg/build_dpdk.html>`_.
130 Quick instructions for QAT cryptodev PMD are as follows:
132 .. code-block:: console
134 cd to the top-level DPDK directory
136 sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
139 Quick instructions for QAT compressdev PMD are as follows:
141 .. code-block:: console
143 cd to the top-level DPDK directory
151 These are the build configuration options affecting QAT, and their default values:
153 .. code-block:: console
155 CONFIG_RTE_LIBRTE_PMD_QAT=y
156 CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
157 CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
158 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
159 CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
161 CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built.
163 The QAT cryptodev PMD has an external dependency on libcrypto, so is not
164 built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM should be enabled to build it.
166 The QAT compressdev PMD has no external dependencies, so needs no configuration
167 options and is built by default.
169 The number of VFs per PF varies - see table below. If multiple QAT packages are
170 installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be
171 adjusted to the number of VFs which the QAT common code will need to handle.
172 Note, there are separate config items for max cryptodevs CONFIG_RTE_CRYPTO_MAX_DEVS
173 and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS, if necessary these should be
174 adjusted to handle the total of QAT and other devices which the process will use.
176 QAT allocates internal structures to handle SGLs. For the compression service
177 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS can be changed if more segments are needed.
178 An extra (max_inflight_ops x 16) bytes per queue_pair will be used for every increment.
180 QAT compression PMD needs intermediate buffers to support Deflate compression
181 with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE
182 specifies the size of a single buffer, the PMD will allocate a multiple of these,
183 plus some extra space for associated meta-data. For GEN2 devices, 20 buffers plus
184 1472 bytes are allocated.
188 If the compressed output of a Deflate operation using Dynamic Huffman
189 Encoding is too big to fit in an intermediate buffer, then the
190 operation will return RTE_COMP_OP_STATUS_ERROR and an error will be
191 displayed. Options for the application in this case
192 are to split the input data into smaller chunks and resubmit
193 in multiple operations or to configure QAT with
194 larger intermediate buffers.
197 Device and driver naming
198 ~~~~~~~~~~~~~~~~~~~~~~~~
200 * The qat cryptodev driver name is "crypto_qat".
201 The "rte_cryptodev_devices_get()" returns the devices exposed by this driver.
203 * Each qat crypto device has a unique name, in format
204 "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym".
205 This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id.
209 The qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter.
211 The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
213 * The qat compressdev driver name is "compress_qat".
214 The rte_compressdev_devices_get() returns the devices exposed by this driver.
216 * Each qat compression device has a unique name, in format
217 <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
218 This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
222 Dependency on the QAT kernel driver
223 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
225 To use QAT an SRIOV-enabled QAT kernel driver is required. The VF
226 devices created and initialised by this driver will be used by the QAT PMDs.
228 Instructions for installation are below, but first an explanation of the
229 relationships between the PF/VF devices and the PMDs visible to
232 Each QuickAssist PF device exposes a number of VF devices. Each VF device can
233 enable one cryptodev PMD and/or one compressdev PMD.
234 These QAT PMDs share the same underlying device and pci-mgmt code, but are
235 enumerated independently on their respective APIs and appear as independent
236 devices to applications.
240 Each VF can only be used by one DPDK process. It is not possible to share
241 the same VF across multiple processes, even if these processes are using
242 different acceleration services.
244 Conversely one DPDK process can use one or more QAT VFs and can expose both
245 cryptodev and compressdev instances on each of those VFs.
248 Available kernel drivers
249 ~~~~~~~~~~~~~~~~~~~~~~~~
251 Kernel drivers for each device are listed in the following table. Scroll right
252 to check that the driver and device supports the service you require.
255 .. _table_qat_pmds_drivers:
257 .. table:: QAT device generations, devices and drivers
259 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
260 | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF | cryptodev | compressdev |
261 +=====+==========+===============+===============+============+========+======+========+========+===========+=============+
262 | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 | Yes | No |
263 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
264 | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | No |
265 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
266 | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 | Yes | No |
267 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
268 | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | Yes |
269 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
270 | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 | Yes | No |
271 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
272 | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | Yes |
273 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
274 | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | Yes | No |
275 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
276 | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 | Yes | No |
277 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
280 The ``Driver`` column indicates either the Linux kernel version in which
281 support for this device was introduced or a driver available on Intel's 01.org
282 website. There are both linux and 01.org kernel drivers available for some
283 devices. p = release pending.
285 If you are running on a kernel which includes a driver for your device, see
286 `Installation using kernel.org driver`_ below. Otherwise see
287 `Installation using 01.org QAT driver`_.
290 Installation using kernel.org driver
291 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
293 The examples below are based on the C62x device, if you have a different device
294 use the corresponding values in the above table.
296 In BIOS ensure that SRIOV is enabled and either:
299 * Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
301 Check that the QAT driver is loaded on your system, by executing::
305 You should see the kernel module for your device listed, e.g.::
308 intel_qat 82336 1 qat_c62x
310 Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
312 First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
317 You should see output similar to::
319 1a:00.0 Co-processor: Intel Corporation Device 37c8
320 3d:00.0 Co-processor: Intel Corporation Device 37c8
321 3f:00.0 Co-processor: Intel Corporation Device 37c8
323 Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
325 echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
326 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
327 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
329 Check that the VFs are available for use. For example ``lspci -d:37c9`` should
330 list 48 VF devices available for a ``C62x`` device.
332 To complete the installation follow the instructions in
333 `Binding the available VFs to the DPDK UIO driver`_.
337 If the QAT kernel modules are not loaded and you see an error like ``Failed
338 to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
339 result of not using a distribution, but just updating the kernel directly.
341 Download firmware from the `kernel firmware repo
342 <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
344 Copy qat binaries to ``/lib/firmware``::
346 cp qat_895xcc.bin /lib/firmware
347 cp qat_895xcc_mmp.bin /lib/firmware
349 Change to your linux source root directory and start the qat kernel modules::
351 insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
352 insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
357 If you see the following warning in ``/var/log/messages`` it can be ignored:
358 ``IOMMU should be enabled for SR-IOV to work correctly``.
361 Installation using 01.org QAT driver
362 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
364 Download the latest QuickAssist Technology Driver from `01.org
365 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
366 Consult the *Getting Started Guide* at the same URL for further information.
368 The steps below assume you are:
370 * Building on a platform with one ``C62x`` device.
371 * Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
372 * On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
374 In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
376 Uninstall any existing QAT driver, for example by running:
378 * ``./installer.sh uninstall`` in the directory where originally installed.
381 Build and install the SRIOV-enabled QAT driver::
386 # Copy the package to this location and unpack
387 tar zxof qat1.7.l.4.2.0-000xx.tar.gz
389 ./configure --enable-icp-sriov=host
392 You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
393 You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
395 Confirm the driver is correctly installed and is using firmware version 4.2.0::
397 cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
400 Confirm the presence of 48 VF devices - 16 per PF::
405 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
409 If using a later kernel and the build fails with an error relating to
410 ``strict_stroul`` not being available apply the following patch:
414 /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
415 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
416 + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
418 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
419 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
421 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
422 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
424 #define STR_TO_64(str, base, num, endPtr) \
428 *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
430 *(num) = simple_strtoull((str), &(endPtr), (base)); \
440 If the build fails due to missing header files you may need to do following::
442 sudo yum install zlib-devel
443 sudo yum install openssl-devel
444 sudo yum install libudev-devel
448 If the build or install fails due to mismatching kernel sources you may need to do the following::
450 sudo yum install kernel-headers-`uname -r`
451 sudo yum install kernel-src-`uname -r`
452 sudo yum install kernel-devel-`uname -r`
455 Binding the available VFs to the DPDK UIO driver
456 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
458 Unbind the VFs from the stock driver so they can be bound to the uio driver.
460 For an Intel(R) QuickAssist Technology DH895xCC device
461 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
463 The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
464 VFs are different adjust the unbind command below::
466 for device in $(seq 1 4); do \
467 for fn in $(seq 0 7); do \
468 echo -n 0000:03:0${device}.${fn} > \
469 /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
473 For an Intel(R) QuickAssist Technology C62x device
474 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
476 The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
477 ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
478 adjust the unbind command below::
480 for device in $(seq 1 2); do \
481 for fn in $(seq 0 7); do \
482 echo -n 0000:1a:0${device}.${fn} > \
483 /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
485 echo -n 0000:3d:0${device}.${fn} > \
486 /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
488 echo -n 0000:3f:0${device}.${fn} > \
489 /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
493 For Intel(R) QuickAssist Technology C3xxx or D15xx device
494 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
496 The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
497 VFs are different adjust the unbind command below::
499 for device in $(seq 1 2); do \
500 for fn in $(seq 0 7); do \
501 echo -n 0000:01:0${device}.${fn} > \
502 /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
506 Bind to the DPDK uio driver
507 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
509 Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
510 to confirm the VF devices are now in use by igb_uio kernel driver,
511 e.g. for the C62x device::
513 cd to the top-level DPDK directory
515 insmod ./build/kmod/igb_uio.ko
516 echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
520 Another way to bind the VFs to the DPDK UIO driver is by using the
521 ``dpdk-devbind.py`` script::
523 cd to the top-level DPDK directory
524 ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
529 QAT crypto PMD can be tested by running the test application::
534 ./test -l1 -n1 -w <your qat bdf>
535 RTE>>cryptodev_qat_autotest
537 QAT compression PMD can be tested by running the test application::
540 sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config
543 ./test -l1 -n1 -w <your qat bdf>
544 RTE>>compressdev_autotest
550 There are 2 sets of trace available via the dynamic logging feature:
552 * pmd.qat_dp exposes trace on the data-path.
553 * pmd.qat_general exposes all other trace.
555 pmd.qat exposes both sets of traces.
556 They can be enabled using the log-level option (where 8=maximum log level) on
557 the process cmdline, e.g. using any of the following::
559 --log-level="pmd.qat_general,8"
560 --log-level="pmd.qat_dp,8"
561 --log-level="pmd.qat,8"
565 The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
566 RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
567 for meson build and config/common_base for gnu make.
568 Also the dynamic global log level overrides both sets of trace, so e.g. no
569 QAT trace would display in this case::
571 --log-level="7" --log-level="pmd.qat_general,8"