1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright(c) 2015-2019 Intel Corporation.
4 Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
5 ==================================================
7 QAT documentation consists of three parts:
9 * Details of the symmetric crypto service below.
10 * Details of the `compression service <http://doc.dpdk.org/guides/compressdevs/qat_comp.html>`_
11 in the compressdev drivers section.
12 * Details of building the common QAT infrastructure and the PMDs to support the
13 above services. See :ref:`building_qat` below.
16 Symmetric Crypto Service on QAT
17 -------------------------------
19 The QAT crypto PMD provides poll mode crypto driver support for the following
20 hardware accelerator devices:
22 * ``Intel QuickAssist Technology DH895xCC``
23 * ``Intel QuickAssist Technology C62x``
24 * ``Intel QuickAssist Technology C3xxx``
25 * ``Intel QuickAssist Technology D15xx``
26 * ``Intel QuickAssist Technology C4xxx``
32 The QAT PMD has support for:
36 * ``RTE_CRYPTO_CIPHER_3DES_CBC``
37 * ``RTE_CRYPTO_CIPHER_3DES_CTR``
38 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
39 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
40 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
41 * ``RTE_CRYPTO_CIPHER_AES128_CTR``
42 * ``RTE_CRYPTO_CIPHER_AES192_CTR``
43 * ``RTE_CRYPTO_CIPHER_AES256_CTR``
44 * ``RTE_CRYPTO_CIPHER_AES_XTS``
45 * ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
46 * ``RTE_CRYPTO_CIPHER_NULL``
47 * ``RTE_CRYPTO_CIPHER_KASUMI_F8``
48 * ``RTE_CRYPTO_CIPHER_DES_CBC``
49 * ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
50 * ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
51 * ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
55 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
56 * ``RTE_CRYPTO_AUTH_SHA224_HMAC``
57 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
58 * ``RTE_CRYPTO_AUTH_SHA384_HMAC``
59 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
60 * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
61 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
62 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
63 * ``RTE_CRYPTO_AUTH_NULL``
64 * ``RTE_CRYPTO_AUTH_KASUMI_F9``
65 * ``RTE_CRYPTO_AUTH_AES_GMAC``
66 * ``RTE_CRYPTO_AUTH_ZUC_EIA3``
67 * ``RTE_CRYPTO_AUTH_AES_CMAC``
69 Supported AEAD algorithms:
71 * ``RTE_CRYPTO_AEAD_AES_GCM``
72 * ``RTE_CRYPTO_AEAD_AES_CCM``
78 * Only supports the session-oriented API implementation (session-less APIs are not supported).
79 * SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
80 * SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
81 * No BSD support as BSD QAT kernel driver not available.
82 * ZUC EEA3/EIA3 is not supported by dh895xcc devices
83 * Maximum additional authenticated data (AAD) for GCM is 240 bytes long and must be passed to the device in a buffer rounded up to the nearest block-size multiple (x16) and padded with zeros.
84 * Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
86 Extra notes on KASUMI F9
87 ~~~~~~~~~~~~~~~~~~~~~~~~
89 When using KASUMI F9 authentication algorithm, the input buffer must be
90 constructed according to the
91 `3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_
92 (section 4.4, page 13). The input buffer has to have COUNT (4 bytes),
93 FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION
94 bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that
95 the total length of the buffer is multiple of 8 bits. Note that the actual
96 message can be any length, specified in bits.
98 Once this buffer is passed this way, when creating the crypto operation,
99 length of data to authenticate "op.sym.auth.data.length" must be the length
100 of all the items described above, including the padding at the end.
101 Also, offset of data to authenticate "op.sym.auth.data.offset"
102 must be such that points at the start of the COUNT bytes.
111 A QAT device can host multiple acceleration services:
113 * symmetric cryptography
116 These services are provided to DPDK applications via PMDs which register to
117 implement the corresponding cryptodev and compressdev APIs. The PMDs use
118 common QAT driver code which manages the QAT PCI device. They also depend on a
119 QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below.
122 Configuring and Building the DPDK QAT PMDs
123 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
126 Further information on configuring, building and installing DPDK is described
127 `here <http://doc.dpdk.org/guides/linux_gsg/build_dpdk.html>`_.
130 Quick instructions for QAT cryptodev PMD are as follows:
132 .. code-block:: console
134 cd to the top-level DPDK directory
136 sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
139 Quick instructions for QAT compressdev PMD are as follows:
141 .. code-block:: console
143 cd to the top-level DPDK directory
148 .. _building_qat_config:
153 These are the build configuration options affecting QAT, and their default values:
155 .. code-block:: console
157 CONFIG_RTE_LIBRTE_PMD_QAT=y
158 CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
159 CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
160 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
161 CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
163 CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built.
165 The QAT cryptodev PMD has an external dependency on libcrypto, so is not
166 built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM should be enabled to build it.
168 The QAT compressdev PMD has no external dependencies, so needs no configuration
169 options and is built by default.
171 The number of VFs per PF varies - see table below. If multiple QAT packages are
172 installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be
173 adjusted to the number of VFs which the QAT common code will need to handle.
174 Note, there are separate config items for max cryptodevs CONFIG_RTE_CRYPTO_MAX_DEVS
175 and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS, if necessary these should be
176 adjusted to handle the total of QAT and other devices which the process will use.
178 QAT allocates internal structures to handle SGLs. For the compression service
179 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS can be changed if more segments are needed.
180 An extra (max_inflight_ops x 16) bytes per queue_pair will be used for every increment.
182 QAT compression PMD needs intermediate buffers to support Deflate compression
183 with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE
184 specifies the size of a single buffer, the PMD will allocate a multiple of these,
185 plus some extra space for associated meta-data. For GEN2 devices, 20 buffers are
186 allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes overhead.
190 If the compressed output of a Deflate operation using Dynamic Huffman
191 Encoding is too big to fit in an intermediate buffer, then the
192 operation will fall back to fixed compression rather than failing the operation.
193 To avoid this less performant case, applications should configure
194 the intermediate buffer size to be larger than the expected input data size
195 (compressed output size is usually unknown, so the only option is to make
196 larger than the input size).
199 Device and driver naming
200 ~~~~~~~~~~~~~~~~~~~~~~~~
202 * The qat cryptodev driver name is "crypto_qat".
203 The "rte_cryptodev_devices_get()" returns the devices exposed by this driver.
205 * Each qat crypto device has a unique name, in format
206 "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym".
207 This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id.
211 The qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter.
213 The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
215 * The qat compressdev driver name is "compress_qat".
216 The rte_compressdev_devices_get() returns the devices exposed by this driver.
218 * Each qat compression device has a unique name, in format
219 <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
220 This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
224 Dependency on the QAT kernel driver
225 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
227 To use QAT an SRIOV-enabled QAT kernel driver is required. The VF
228 devices created and initialised by this driver will be used by the QAT PMDs.
230 Instructions for installation are below, but first an explanation of the
231 relationships between the PF/VF devices and the PMDs visible to
234 Each QuickAssist PF device exposes a number of VF devices. Each VF device can
235 enable one cryptodev PMD and/or one compressdev PMD.
236 These QAT PMDs share the same underlying device and pci-mgmt code, but are
237 enumerated independently on their respective APIs and appear as independent
238 devices to applications.
242 Each VF can only be used by one DPDK process. It is not possible to share
243 the same VF across multiple processes, even if these processes are using
244 different acceleration services.
246 Conversely one DPDK process can use one or more QAT VFs and can expose both
247 cryptodev and compressdev instances on each of those VFs.
250 Available kernel drivers
251 ~~~~~~~~~~~~~~~~~~~~~~~~
253 Kernel drivers for each device for each service are listed in the following table. (Scroll right
254 to see the full table)
257 .. _table_qat_pmds_drivers:
259 .. table:: QAT device generations, devices and drivers
261 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
262 | S | A | C | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF |
263 +=====+=====+=====+=====+==========+===============+===============+============+========+======+========+========+
264 | Yes | No | No | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 |
265 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
266 | Yes | No | No | " | " | 01.org/4.2.0+ | " | " | " | " | " | " |
267 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
268 | Yes | No | Yes | " | " | 01.org/4.3.0+ | " | " | " | " | " | " |
269 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
270 | Yes | No | No | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 |
271 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
272 | Yes | No | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " |
273 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
274 | Yes | No | No | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 |
275 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
276 | Yes | No | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " |
277 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
278 | Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |
279 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
280 | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 |
281 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
283 The first 3 columns indicate the service:
285 * S = Symmetric crypto service (via cryptodev API)
286 * A = Asymmetric crypto service (via cryptodev API)
287 * C = Compression service (via compressdev API)
289 The ``Driver`` column indicates either the Linux kernel version in which
290 support for this device was introduced or a driver available on Intel's 01.org
291 website. There are both linux in-tree and 01.org kernel drivers available for some
292 devices. p = release pending.
294 If you are running on a kernel which includes a driver for your device, see
295 `Installation using kernel.org driver`_ below. Otherwise see
296 `Installation using 01.org QAT driver`_.
299 Installation using kernel.org driver
300 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
302 The examples below are based on the C62x device, if you have a different device
303 use the corresponding values in the above table.
305 In BIOS ensure that SRIOV is enabled and either:
308 * Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
310 Check that the QAT driver is loaded on your system, by executing::
314 You should see the kernel module for your device listed, e.g.::
317 intel_qat 82336 1 qat_c62x
319 Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
321 First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
326 You should see output similar to::
328 1a:00.0 Co-processor: Intel Corporation Device 37c8
329 3d:00.0 Co-processor: Intel Corporation Device 37c8
330 3f:00.0 Co-processor: Intel Corporation Device 37c8
332 Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
334 echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
335 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
336 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
338 Check that the VFs are available for use. For example ``lspci -d:37c9`` should
339 list 48 VF devices available for a ``C62x`` device.
341 To complete the installation follow the instructions in
342 `Binding the available VFs to the DPDK UIO driver`_.
346 If the QAT kernel modules are not loaded and you see an error like ``Failed
347 to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
348 result of not using a distribution, but just updating the kernel directly.
350 Download firmware from the `kernel firmware repo
351 <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
353 Copy qat binaries to ``/lib/firmware``::
355 cp qat_895xcc.bin /lib/firmware
356 cp qat_895xcc_mmp.bin /lib/firmware
358 Change to your linux source root directory and start the qat kernel modules::
360 insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
361 insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
366 If you see the following warning in ``/var/log/messages`` it can be ignored:
367 ``IOMMU should be enabled for SR-IOV to work correctly``.
370 Installation using 01.org QAT driver
371 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
373 Download the latest QuickAssist Technology Driver from `01.org
374 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
375 Consult the *Getting Started Guide* at the same URL for further information.
377 The steps below assume you are:
379 * Building on a platform with one ``C62x`` device.
380 * Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
381 * On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
383 In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
385 Uninstall any existing QAT driver, for example by running:
387 * ``./installer.sh uninstall`` in the directory where originally installed.
390 Build and install the SRIOV-enabled QAT driver::
395 # Copy the package to this location and unpack
396 tar zxof qat1.7.l.4.2.0-000xx.tar.gz
398 ./configure --enable-icp-sriov=host
401 You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
402 You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
404 Confirm the driver is correctly installed and is using firmware version 4.2.0::
406 cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
409 Confirm the presence of 48 VF devices - 16 per PF::
414 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
418 If using a later kernel and the build fails with an error relating to
419 ``strict_stroul`` not being available apply the following patch:
423 /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
424 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
425 + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
427 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
428 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
430 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
431 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
433 #define STR_TO_64(str, base, num, endPtr) \
437 *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
439 *(num) = simple_strtoull((str), &(endPtr), (base)); \
449 If the build fails due to missing header files you may need to do following::
451 sudo yum install zlib-devel
452 sudo yum install openssl-devel
453 sudo yum install libudev-devel
457 If the build or install fails due to mismatching kernel sources you may need to do the following::
459 sudo yum install kernel-headers-`uname -r`
460 sudo yum install kernel-src-`uname -r`
461 sudo yum install kernel-devel-`uname -r`
464 Binding the available VFs to the DPDK UIO driver
465 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
467 Unbind the VFs from the stock driver so they can be bound to the uio driver.
469 For an Intel(R) QuickAssist Technology DH895xCC device
470 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
472 The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
473 VFs are different adjust the unbind command below::
475 for device in $(seq 1 4); do \
476 for fn in $(seq 0 7); do \
477 echo -n 0000:03:0${device}.${fn} > \
478 /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
482 For an Intel(R) QuickAssist Technology C62x device
483 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
485 The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
486 ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
487 adjust the unbind command below::
489 for device in $(seq 1 2); do \
490 for fn in $(seq 0 7); do \
491 echo -n 0000:1a:0${device}.${fn} > \
492 /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
494 echo -n 0000:3d:0${device}.${fn} > \
495 /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
497 echo -n 0000:3f:0${device}.${fn} > \
498 /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
502 For Intel(R) QuickAssist Technology C3xxx or D15xx device
503 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
505 The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
506 VFs are different adjust the unbind command below::
508 for device in $(seq 1 2); do \
509 for fn in $(seq 0 7); do \
510 echo -n 0000:01:0${device}.${fn} > \
511 /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
515 Bind to the DPDK uio driver
516 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
518 Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
519 to confirm the VF devices are now in use by igb_uio kernel driver,
520 e.g. for the C62x device::
522 cd to the top-level DPDK directory
524 insmod ./build/kmod/igb_uio.ko
525 echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
529 Another way to bind the VFs to the DPDK UIO driver is by using the
530 ``dpdk-devbind.py`` script::
532 cd to the top-level DPDK directory
533 ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
538 QAT crypto PMD can be tested by running the test application::
543 ./test -l1 -n1 -w <your qat bdf>
544 RTE>>cryptodev_qat_autotest
546 QAT compression PMD can be tested by running the test application::
549 sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config
552 ./test -l1 -n1 -w <your qat bdf>
553 RTE>>compressdev_autotest
559 There are 2 sets of trace available via the dynamic logging feature:
561 * pmd.qat_dp exposes trace on the data-path.
562 * pmd.qat_general exposes all other trace.
564 pmd.qat exposes both sets of traces.
565 They can be enabled using the log-level option (where 8=maximum log level) on
566 the process cmdline, e.g. using any of the following::
568 --log-level="pmd.qat_general,8"
569 --log-level="pmd.qat_dp,8"
570 --log-level="pmd.qat,8"
574 The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
575 RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
576 for meson build and config/common_base for gnu make.
577 Also the dynamic global log level overrides both sets of trace, so e.g. no
578 QAT trace would display in this case::
580 --log-level="7" --log-level="pmd.qat_general,8"