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3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
36 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
37 virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
107 - Inner RSS for VXLAN frames is not supported yet.
108 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
109 - Forked secondary process not supported.
110 - Flow pattern without any specific vlan will match for vlan packets as well:
112 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
113 Meaning, the flow rule::
115 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
117 Will only match vlan packets with vid=3. and the flow rules::
119 flow create 0 ingress pattern eth / ipv4 / end ...
123 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
125 Will match any ipv4 packet (VLAN included).
127 - A multi segment packet must have less than 6 segments in case the Tx burst function
128 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
129 less than 50 segments.
130 - Count action for RTE flow is only supported in Mellanox OFED 4.2.
131 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
132 to 0 are not supported.
133 - VXLAN TSO and checksum offloads are not supported on VM.
138 MLX5 supports various of methods to report statistics:
140 Port statistics can be queried using ``rte_eth_stats_get()``. The port statistics are through SW only and counts the number of packets received or sent successfully by the PMD.
142 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
144 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
152 These options can be modified in the ``.config`` file.
154 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
156 Toggle compilation of librte_pmd_mlx5 itself.
158 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
160 Toggle debugging code and stricter compilation flags. Enabling this option
161 adds additional run-time checks and debugging messages at the cost of
164 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
166 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
167 which buffers are to be transmitted must be associated to memory regions
168 (MRs). This is a slow operation that must be cached.
170 This value is always 1 for RX queues since they use a single MP.
172 Environment variables
173 ~~~~~~~~~~~~~~~~~~~~~
175 - ``MLX5_PMD_ENABLE_PADDING``
177 Enables HW packet padding in PCI bus transactions.
179 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
180 bytes are written to the PCI bus. Enabling padding makes such packets
183 In cases where PCI bandwidth is the bottleneck, padding can improve
186 This is disabled by default since this can also decrease performance for
187 unaligned packet sizes.
189 - ``MLX5_SHUT_UP_BF``
191 Configures HW Tx doorbell register as IO-mapped.
193 By default, the HW Tx doorbell is configured as a write-combining register.
194 The register would be flushed to HW usually when the write-combining buffer
195 becomes full, but it depends on CPU design.
197 Except for vectorized Tx burst routines, a write memory barrier is enforced
198 after updating the register so that the update can be immediately visible to
201 When vectorized Tx burst is called, the barrier is set only if the burst size
202 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
203 variable will bring better latency even though the maximum throughput can
206 Run-time configuration
207 ~~~~~~~~~~~~~~~~~~~~~~
209 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
210 because it is affected by their state. Forcing them down prevents packets
213 - **ethtool** operations on related kernel interfaces also affect the PMD.
215 - ``rxq_cqe_comp_en`` parameter [int]
217 A nonzero value enables the compression of CQE on RX side. This feature
218 allows to save PCI bandwidth and improve performance. Enabled by default.
222 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
223 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
225 - ``txq_inline`` parameter [int]
227 Amount of data to be inlined during TX operations. Improves latency.
228 Can improve PPS performance when PCI back pressure is detected and may be
229 useful for scenarios involving heavy traffic on many queues.
231 Because additional software logic is necessary to handle this mode, this
232 option should be used with care, as it can lower performance when back
233 pressure is not expected.
235 - ``txqs_min_inline`` parameter [int]
237 Enable inline send only when the number of TX queues is greater or equal
240 This option should be used in combination with ``txq_inline`` above.
242 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
244 - Disabled by default.
245 - In case ``txq_inline`` is set recommendation is 4.
247 On ConnectX-5 with Enhanced MPW:
249 - Set to 8 by default.
251 - ``txq_mpw_en`` parameter [int]
253 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
254 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
255 TX burst function to pack up multiple packets in a single descriptor
256 session in order to save PCI bandwidth and improve performance at the
257 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
258 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
259 on to TX descriptor instead of including pointer of packet only if there
260 is enough room remained in the descriptor. ``txq_inline`` sets
261 per-descriptor space for either pointers or inlined packets. In addition,
262 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
263 in the same descriptor.
265 This option cannot be used in conjunction with ``tso`` below. When ``tso``
266 is set, ``txq_mpw_en`` is disabled.
268 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
269 families of adapters. Enabled by default.
271 - ``txq_mpw_hdr_dseg_en`` parameter [int]
273 A nonzero value enables including two pointers in the first block of TX
274 descriptor. This can be used to lessen CPU load for memory copy.
276 Effective only when Enhanced MPS is supported. Disabled by default.
278 - ``txq_max_inline_len`` parameter [int]
280 Maximum size of packet to be inlined. This limits the size of packet to
281 be inlined. If the size of a packet is larger than configured value, the
282 packet isn't inlined even though there's enough space remained in the
283 descriptor. Instead, the packet is included with pointer.
285 Effective only when Enhanced MPS is supported. The default value is 256.
287 - ``tso`` parameter [int]
289 A nonzero value enables hardware TSO.
290 When hardware TSO is enabled, packets marked with TCP segmentation
291 offload will be divided into segments by the hardware. Disabled by default.
293 - ``tx_vec_en`` parameter [int]
295 A nonzero value enables Tx vector on ConnectX-5 only NIC if the number of
296 global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
298 Enabled by default on ConnectX-5.
300 - ``rx_vec_en`` parameter [int]
302 A nonzero value enables Rx vector if the port is not configured in
303 multi-segment otherwise this parameter is ignored.
310 This driver relies on external libraries and kernel drivers for resources
311 allocations and initialization. The following dependencies are not part of
312 DPDK and must be installed separately:
316 User space Verbs framework used by librte_pmd_mlx5. This library provides
317 a generic interface between the kernel and low-level user space drivers
320 It allows slow and privileged operations (context initialization, hardware
321 resources allocations) to be managed by the kernel and fast operations to
322 never leave user space.
326 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
327 devices, it is automatically loaded by libibverbs.
329 This library basically implements send/receive calls to the hardware
334 They provide the kernel-side Verbs API and low level device drivers that
335 manage actual hardware initialization and resources sharing with user
338 Unlike most other PMDs, these modules must remain loaded and bound to
341 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
342 devices and related Ethernet kernel network devices.
343 - mlx5_ib: InifiniBand device driver.
344 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
346 - **Firmware update**
348 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
351 Because each release provides new features, these updates must be applied to
352 match the kernel modules and libraries they come with.
356 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
362 Either RDMA Core library with a recent enough Linux kernel release
363 (recommended) or Mellanox OFED, which provides compatibility with older
366 RMDA Core with Linux Kernel
367 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
369 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
370 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
371 (see `RDMA Core installation documentation`_)
373 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
374 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
379 - Mellanox OFED version: **4.2**.
382 - ConnectX-4: **12.21.1000** and above.
383 - ConnectX-4 Lx: **14.21.1000** and above.
384 - ConnectX-5: **16.21.1000** and above.
385 - ConnectX-5 Ex: **16.21.1000** and above.
387 While these libraries and kernel modules are available on OpenFabrics
388 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
389 managers on most distributions, this PMD requires Ethernet extensions that
390 may not be supported at the moment (this is a work in progress).
393 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
394 includes the necessary support and should be used in the meantime. For DPDK,
395 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
396 required from that distribution.
400 Several versions of Mellanox OFED are available. Installing the version
401 this DPDK release was developed and tested against is strongly
402 recommended. Please check the `prerequisites`_.
407 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
408 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
409 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
410 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
411 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
412 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
413 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
414 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
415 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
416 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
417 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
418 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
419 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
420 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
421 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
422 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
423 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
424 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
425 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
427 Quick Start Guide on OFED
428 -------------------------
430 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
433 2. Install the required libraries and kernel modules either by installing
434 only the required set, or by installing the entire Mellanox OFED:
436 .. code-block:: console
438 ./mlnxofedinstall --upstream-libs --dpdk
440 3. Verify the firmware is the correct one:
442 .. code-block:: console
446 4. Verify all ports links are set to Ethernet:
448 .. code-block:: console
450 mlxconfig -d <mst device> query | grep LINK_TYPE
454 Link types may have to be configured to Ethernet:
456 .. code-block:: console
458 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
460 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
462 For hypervisors verify SR-IOV is enabled on the NIC:
464 .. code-block:: console
466 mlxconfig -d <mst device> query | grep SRIOV_EN
469 If needed, set enable the set the relevant fields:
471 .. code-block:: console
473 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
474 mlxfwreset -d <mst device> reset
476 5. Restart the driver:
478 .. code-block:: console
480 /etc/init.d/openibd restart
484 .. code-block:: console
486 service openibd restart
488 If link type was changed, firmware must be reset as well:
490 .. code-block:: console
492 mlxfwreset -d <mst device> reset
494 For hypervisors, after reset write the sysfs number of virtual functions
497 To dynamically instantiate a given number of virtual functions (VFs):
499 .. code-block:: console
501 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
503 6. Compile DPDK and you are ready to go. See instructions on
504 :ref:`Development Kit Build System <Development_Kit_Build_System>`
509 1. Configure aggressive CQE Zipping for maximum performance:
511 .. code-block:: console
513 mlxconfig -d <mst device> s CQE_COMPRESSION=1
515 To set it back to the default CQE Zipping mode use:
517 .. code-block:: console
519 mlxconfig -d <mst device> s CQE_COMPRESSION=0
521 2. In case of virtualization:
523 - Make sure that hypervisor kernel is 3.16 or newer.
524 - Configure boot with ``iommu=pt``.
526 - Make sure to allocate a VM on huge pages.
527 - Make sure to set CPU pinning.
529 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
530 for better performance. For VMs, verify that the right CPU
531 and NUMA node are pinned according to the above. Run:
533 .. code-block:: console
537 to identify the NUMA node to which the PCIe adapter is connected.
539 4. If more than one adapter is used, and root complex capabilities allow
540 to put both adapters on the same NUMA node without PCI bandwidth degradation,
541 it is recommended to locate both adapters on the same NUMA node.
542 This in order to forward packets from one to the other without
543 NUMA performance penalty.
545 5. Disable pause frames:
547 .. code-block:: console
549 ethtool -A <netdev> rx off tx off
551 6. Verify IO non-posted prefetch is disabled by default. This can be checked
552 via the BIOS configuration. Please contact you server provider for more
553 information about the settings.
557 On some machines, depends on the machine integrator, it is beneficial
558 to set the PCI max read request parameter to 1K. This can be
559 done in the following way:
561 To query the read request size use:
563 .. code-block:: console
565 setpci -s <NIC PCI address> 68.w
567 If the output is different than 3XXX, set it by:
569 .. code-block:: console
571 setpci -s <NIC PCI address> 68.w=3XXX
573 The XXX can be different on different systems. Make sure to configure
574 according to the setpci output.
579 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
580 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
582 Since ``testpmd`` defaults to IP RSS mode and there is currently no
583 command-line parameter to enable additional protocols (UDP and TCP as well
584 as IP), the following commands must be entered from its CLI to get the same
585 behavior as librte_pmd_mlx4:
587 .. code-block:: console
590 > port config all rss all
596 This section demonstrates how to launch **testpmd** with Mellanox
597 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
599 #. Load the kernel modules:
601 .. code-block:: console
603 modprobe -a ib_uverbs mlx5_core mlx5_ib
605 Alternatively if MLNX_OFED is fully installed, the following script can
608 .. code-block:: console
610 /etc/init.d/openibd restart
614 User space I/O kernel modules (uio and igb_uio) are not used and do
615 not have to be loaded.
617 #. Make sure Ethernet interfaces are in working order and linked to kernel
618 verbs. Related sysfs entries should be present:
620 .. code-block:: console
622 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
626 .. code-block:: console
633 #. Optionally, retrieve their PCI bus addresses for whitelisting:
635 .. code-block:: console
638 for intf in eth2 eth3 eth4 eth5;
640 (cd "/sys/class/net/${intf}/device/" && pwd -P);
643 sed -n 's,.*/\(.*\),-w \1,p'
647 .. code-block:: console
654 #. Request huge pages:
656 .. code-block:: console
658 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
660 #. Start testpmd with basic parameters:
662 .. code-block:: console
664 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
668 .. code-block:: console
671 EAL: PCI device 0000:05:00.0 on NUMA socket 0
672 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
673 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
674 PMD: librte_pmd_mlx5: 1 port(s) detected
675 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
676 EAL: PCI device 0000:05:00.1 on NUMA socket 0
677 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
678 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
679 PMD: librte_pmd_mlx5: 1 port(s) detected
680 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
681 EAL: PCI device 0000:06:00.0 on NUMA socket 0
682 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
683 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
684 PMD: librte_pmd_mlx5: 1 port(s) detected
685 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
686 EAL: PCI device 0000:06:00.1 on NUMA socket 0
687 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
688 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
689 PMD: librte_pmd_mlx5: 1 port(s) detected
690 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
691 Interactive-mode selected
692 Configuring Port 0 (socket 0)
693 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
694 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
695 Port 0: E4:1D:2D:E7:0C:FE
696 Configuring Port 1 (socket 0)
697 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
698 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
699 Port 1: E4:1D:2D:E7:0C:FF
700 Configuring Port 2 (socket 0)
701 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
702 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
703 Port 2: E4:1D:2D:E7:0C:FA
704 Configuring Port 3 (socket 0)
705 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
706 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
707 Port 3: E4:1D:2D:E7:0C:FB
708 Checking link statuses...
709 Port 0 Link Up - speed 40000 Mbps - full-duplex
710 Port 1 Link Up - speed 40000 Mbps - full-duplex
711 Port 2 Link Up - speed 10000 Mbps - full-duplex
712 Port 3 Link Up - speed 10000 Mbps - full-duplex