1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
5 .. include:: <isonum.txt>
7 MLX5 Ethernet Poll Mode Driver
8 ==============================
10 The mlx5 Ethernet poll mode driver library (**librte_net_mlx5**) provides support
11 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
12 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6 Dx**, **Mellanox
13 ConnectX-6 Lx**, **Mellanox BlueField** and **Mellanox BlueField-2** families
14 of 10/25/40/50/100/200 Gb/s adapters as well as their virtual functions (VF)
21 Besides its dependency on libibverbs (that implies libmlx5 and associated
22 kernel support), librte_net_mlx5 relies heavily on system calls for control
23 operations such as querying/updating the MTU and flow control parameters.
25 This capability allows the PMD to coexist with kernel network interfaces
26 which remain functional, although they stop receiving unicast packets as
27 long as they share the same MAC address.
28 This means legacy linux control tools (for example: ethtool, ifconfig and
29 more) can operate on the same network interfaces that owned by the DPDK
32 See :doc:`../../platform/mlx5` guide for more design details.
37 - Multi arch support: x86_64, POWER8, ARMv8, i686.
38 - Multiple TX and RX queues.
40 - Rx queue delay drop.
41 - Support steering for external Rx queue created outside the PMD.
42 - Support for scattered TX frames.
43 - Advanced support for scattered Rx frames with tunable buffer attributes.
44 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
45 - RSS using different combinations of fields: L3 only, L4 only or both,
46 and source only, destination only or both.
47 - Several RSS hash keys, one for each flow type.
48 - Default RSS operation with no hash key specification.
49 - Configurable RETA table.
50 - Link flow control (pause frame).
51 - Support for multiple MAC addresses.
55 - RX CRC stripping configuration.
56 - TX mbuf fast free offload.
57 - Promiscuous mode on PF and VF.
58 - Multicast promiscuous mode on PF and VF.
59 - Hardware checksum offloads.
60 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
62 - Flow API, including :ref:`flow_isolated_mode`.
64 - KVM and VMware ESX SR-IOV modes are supported.
65 - RSS hash result is supported.
66 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
67 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
69 - Statistics query including Basic, Extended and per queue.
71 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve, GTP.
72 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
73 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
74 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
75 - Flow insertion rate of more then million flows per second, when using Direct Rules.
76 - Support for multiple rte_flow groups.
77 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
80 - Multiple-thread flow insertion.
81 - Matching on IPv4 Internet Header Length (IHL).
82 - Matching on GTP extension header with raw encap/decap action.
83 - Matching on Geneve TLV option header with raw encap/decap action.
84 - RSS support in sample action.
85 - E-Switch mirroring and jump.
86 - E-Switch mirroring and modify.
87 - 21844 flow priorities for ingress or egress flow groups greater than 0 and for any transfer
89 - Flow metering, including meter policy API.
90 - Flow meter hierarchy.
91 - Flow integrity offload API.
92 - Connection tracking.
93 - Sub-Function representors.
102 On Windows, the features are limited:
104 - Promiscuous mode is not supported
105 - The following rules are supported:
107 - IPv4/UDP with CVLAN filtering
108 - Unicast MAC filtering
110 - Additional rules are supported from WinOF2 version 2.70:
112 - IPv4/TCP with CVLAN filtering
113 - L4 steering rules for port RSS of UDP, TCP and IP
115 - For secondary process:
117 - Forked secondary process not supported.
118 - MPRQ is not supported. Callback to free externally attached MPRQ buffer is set
119 in a primary process, but has a different virtual address in a secondary process.
120 Calling a function at the wrong address leads to a segmentation fault.
121 - External memory unregistered in EAL memseg list cannot be used for DMA
122 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
123 primary process and remapped to the same virtual address in secondary
124 process. If the external memory is registered by primary process but has
125 different virtual address in secondary process, unexpected error may happen.
129 - Counters of received packets and bytes number of devices in same share group are same.
130 - Counters of received packets and bytes number of queues in same group and queue ID are same.
132 - When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
133 specific VLAN will match for VLAN packets as well:
135 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
136 Meaning, the flow rule::
138 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
140 Will only match vlan packets with vid=3. and the flow rule::
142 flow create 0 ingress pattern eth / ipv4 / end ...
144 Will match any ipv4 packet (VLAN included).
146 - When using Verbs flow engine (``dv_flow_en`` = 0), multi-tagged(QinQ) match is not supported.
148 - When using DV flow engine (``dv_flow_en`` = 1), flow pattern with any VLAN specification will match only single-tagged packets unless the ETH item ``type`` field is 0x88A8 or the VLAN item ``has_more_vlan`` field is 1.
151 flow create 0 ingress pattern eth / ipv4 / end ...
153 Will match any ipv4 packet.
156 flow create 0 ingress pattern eth / vlan / end ...
157 flow create 0 ingress pattern eth has_vlan is 1 / end ...
158 flow create 0 ingress pattern eth type is 0x8100 / end ...
160 Will match single-tagged packets only, with any VLAN ID value.
163 flow create 0 ingress pattern eth type is 0x88A8 / end ...
164 flow create 0 ingress pattern eth / vlan has_more_vlan is 1 / end ...
166 Will match multi-tagged packets only, with any VLAN ID value.
168 - A flow pattern with 2 sequential VLAN items is not supported.
170 - VLAN pop offload command:
172 - Flow rules having a VLAN pop offload command as one of their actions and
173 are lacking a match on VLAN as one of their items are not supported.
174 - The command is not supported on egress traffic in NIC mode.
176 - VLAN push offload is not supported on ingress traffic in NIC mode.
178 - VLAN set PCP offload is not supported on existing headers.
180 - A multi segment packet must have not more segments than reported by dev_infos_get()
181 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
182 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
183 inline settings) to 58.
185 - Match on VXLAN supports the following fields only:
188 - Last reserved 8-bits
190 Last reserved 8-bits matching is only supported When using DV flow
191 engine (``dv_flow_en`` = 1).
192 For ConnectX-5, the UDP destination port must be the standard one (4789).
193 Group zero's behavior may differ which depends on FW.
194 Matching value equals 0 (value & mask) is not supported.
196 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
198 - Match on Geneve header supports the following fields only:
205 - Match on Geneve TLV option is supported on the following fields:
212 Only one Class/Type/Length Geneve TLV option is supported per shared device.
213 Class/Type/Length fields must be specified as well as masks.
214 Class/Type/Length specified masks must be full.
215 Matching Geneve TLV option without specifying data is not supported.
216 Matching Geneve TLV option with ``data & mask == 0`` is not supported.
218 - VF: flow rules created on VF devices can only match traffic targeted at the
219 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
221 - Match on GTP tunnel header item supports the following fields only:
223 - v_pt_rsv_flags: E flag, S flag, PN flag
227 - Match on GTP extension header only for GTP PDU session container (next
228 extension header type = 0x85).
229 - Match on GTP extension header is not supported in group 0.
233 - Hardware support: BlueField-2.
234 - Flex item is supported on PF only.
235 - Hardware limits ``header_length_mask_width`` up to 6 bits.
236 - Firmware supports 8 global sample fields.
237 Each flex item allocates non-shared sample fields from that pool.
238 - Supported flex item can have 1 input link - ``eth`` or ``udp``
239 and up to 2 output links - ``ipv4`` or ``ipv6``.
240 - Flex item fields (``next_header``, ``next_protocol``, ``samples``)
241 do not participate in RSS hash functions.
242 - In flex item configuration, ``next_header.field_base`` value
243 must be byte aligned (multiple of 8).
245 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
246 The flows within group 0 and set metadata action are rejected by hardware.
250 MAC addresses not already present in the bridge table of the associated
251 kernel network device will be added and cleaned up by the PMD when closing
252 the device. In case of ungraceful program termination, some entries may
253 remain present and should be removed manually by other means.
255 - Buffer split offload is supported with regular Rx burst routine only,
256 no MPRQ feature or vectorized code can be engaged.
258 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
259 externally attached to a user-provided mbuf with having RTE_MBUF_F_EXTERNAL in
260 ol_flags. As the mempool for the external buffer is managed by PMD, all the
261 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
262 the external buffers will be freed by PMD and the application which still
263 holds the external buffers may be corrupted.
264 User-managed mempools with external pinned data buffers
265 cannot be used in conjunction with MPRQ
266 since packets may be already attached to PMD-managed external buffers.
268 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
269 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
270 supported. Some Rx packets may not have RTE_MBUF_F_RX_RSS_HASH.
272 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
273 and allmulticast mode are both set to off.
274 To receive IPv6 Multicast messages on VM, explicitly set the relevant
275 MAC address using rte_eth_dev_mac_addr_add() API.
277 - To support a mixed traffic pattern (some buffers from local host memory, some
278 buffers from other devices) with high bandwidth, a mbuf flag is used.
280 An application hints the PMD whether or not it should try to inline the
281 given mbuf data buffer. PMD should do the best effort to act upon this request.
283 The hint flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE`` is dynamic,
284 registered by application with rte_mbuf_dynflag_register(). This flag is
285 purely driver-specific and declared in PMD specific header ``rte_pmd_mlx5.h``,
286 which is intended to be used by the application.
288 To query the supported specific flags in runtime,
289 the function ``rte_pmd_mlx5_get_dyn_flag_names`` returns the array of
290 currently (over present hardware and configuration) supported specific flags.
291 The "not inline hint" feature operating flow is the following one:
294 - probe the devices, ports are created
295 - query the port capabilities
296 - if port supporting the feature is found
297 - register dynamic flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE``
298 - application starts the ports
299 - on ``dev_start()`` PMD checks whether the feature flag is registered and
300 enables the feature support in datapath
301 - application might set the registered flag bit in ``ol_flags`` field
302 of mbuf being sent and PMD will handle ones appropriately.
304 - The amount of descriptors in Tx queue may be limited by data inline settings.
305 Inline data require the more descriptor building blocks and overall block
306 amount may exceed the hardware supported limits. The application should
307 reduce the requested Tx size or adjust data inline settings with
308 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
310 - To provide the packet send scheduling on mbuf timestamps the ``tx_pp``
311 parameter should be specified.
312 When PMD sees the RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME set on the packet
313 being sent it tries to synchronize the time of packet appearing on
314 the wire with the specified packet timestamp. It the specified one
315 is in the past it should be ignored, if one is in the distant future
316 it should be capped with some reasonable value (in range of seconds).
317 These specific cases ("too late" and "distant future") can be optionally
318 reported via device xstats to assist applications to detect the
319 time-related problems.
321 The timestamp upper "too-distant-future" limit
322 at the moment of invoking the Tx burst routine
323 can be estimated as ``tx_pp`` option (in nanoseconds) multiplied by 2^23.
324 Please note, for the testpmd txonly mode,
325 the limit is deduced from the expression::
327 (n_tx_descriptors / burst_size + 1) * inter_burst_gap
329 There is no any packet reordering according timestamps is supposed,
330 neither within packet burst, nor between packets, it is an entirely
331 application responsibility to generate packets and its timestamps
332 in desired order. The timestamps can be put only in the first packet
333 in the burst providing the entire burst scheduling.
335 - E-Switch decapsulation Flow:
337 - can be applied to PF port only.
338 - must specify VF port action (packet redirection from PF to VF).
339 - optionally may specify tunnel inner source and destination MAC addresses.
341 - E-Switch encapsulation Flow:
343 - can be applied to VF ports only.
344 - must specify PF port action (packet redirection from VF to PF).
348 - The input buffer, used as outer header, is not validated.
352 - The decapsulation is always done up to the outermost tunnel detected by the HW.
353 - The input buffer, providing the removal size, is not validated.
354 - The buffer size must match the length of the headers to be removed.
356 - ICMP(code/type/identifier/sequence number) / ICMP6(code/type) matching, IP-in-IP and MPLS flow matching are all
357 mutually exclusive features which cannot be supported together
358 (see :ref:`mlx5_firmware_config`).
362 - Requires DevX and DV flow to be enabled.
363 - KEEP_CRC offload cannot be supported with LRO.
364 - The first mbuf length, without head-room, must be big enough to include the
366 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
367 it with size limited to max LRO size, not to max RX packet length.
368 - LRO can be used with outer header of TCP packets of the standard format:
369 eth (with or without vlan) / ipv4 or ipv6 / tcp / payload
371 Other TCP packets (e.g. with MPLS label) received on Rx queue with LRO enabled, will be received with bad checksum.
372 - LRO packet aggregation is performed by HW only for packet size larger than
373 ``lro_min_mss_size``. This value is reported on device start, when debug
378 - ``RTE_ETH_RX_OFFLOAD_KEEP_CRC`` cannot be supported with decapsulation
379 for some NICs (such as ConnectX-6 Dx, ConnectX-6 Lx, and BlueField-2).
380 The capability bit ``scatter_fcs_w_decap_disable`` shows NIC support.
384 - fast free offload assumes the all mbufs being sent are originated from the
385 same memory pool and there is no any extra references to the mbufs (the
386 reference counter for each mbuf is equal 1 on tx_burst call). The latter
387 means there should be no any externally attached buffers in mbufs. It is
388 an application responsibility to provide the correct mbufs if the fast
389 free offload is engaged. The mlx5 PMD implicitly produces the mbufs with
390 externally attached buffers if MPRQ option is enabled, hence, the fast
391 free offload is neither supported nor advertised if there is MPRQ enabled.
395 - Supports ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action only within NIC Rx and
396 E-Switch steering domain.
397 - For E-Switch Sampling flow with sample ratio > 1, additional actions are not
398 supported in the sample actions list.
399 - For ConnectX-5, the ``RTE_FLOW_ACTION_TYPE_SAMPLE`` is typically used as
400 first action in the E-Switch egress flow if with header modify or
401 encapsulation actions.
402 - For NIC Rx flow, supports ``MARK``, ``COUNT``, ``QUEUE``, ``RSS`` in the
404 - For E-Switch mirroring flow, supports ``RAW ENCAP``, ``Port ID``,
405 ``VXLAN ENCAP``, ``NVGRE ENCAP`` in the sample actions list.
406 - For ConnectX-5 trusted device, the application metadata with SET_TAG index 0
407 is not supported before ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action.
411 - Supports the 'set' operation only for ``RTE_FLOW_ACTION_TYPE_MODIFY_FIELD`` action.
412 - Modification of an arbitrary place in a packet via the special ``RTE_FLOW_FIELD_START`` Field ID is not supported.
413 - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported.
414 - Encapsulation levels are not supported, can modify outermost header fields only.
415 - Offsets must be 32-bits aligned, cannot skip past the boundary of a field.
416 - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE``
417 and packet contains one or more VLAN headers,
418 the meaningful type field following the last VLAN header
419 is used as modify field operation argument.
420 The modify field action is not intended to modify VLAN headers type field,
421 dedicated VLAN push and pop actions should be used instead.
423 - IPv6 header item 'proto' field, indicating the next header protocol, should
424 not be set as extension header.
425 In case the next header is an extension header, it should not be specified in
426 IPv6 header item 'proto' field.
427 The last extension header item 'next header' field can specify the following
428 header protocol type.
432 - Hairpin between two ports could only manual binding and explicit Tx flow mode. For single port hairpin, all the combinations of auto/manual binding and explicit/implicit Tx flow mode could be supported.
433 - Hairpin in switchdev SR-IOV mode is not supported till now.
437 - All the meter colors with drop action will be counted only by the global drop statistics.
438 - Yellow detection is only supported with ASO metering.
439 - Red color must be with drop action.
440 - Meter statistics are supported only for drop case.
441 - A meter action created with pre-defined policy must be the last action in the flow except single case where the policy actions are:
442 - green: NULL or END.
443 - yellow: NULL or END.
445 - The only supported meter policy actions:
446 - green: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK and SET_TAG.
447 - yellow: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK and SET_TAG.
449 - Policy actions of RSS for green and yellow should have the same configuration except queues.
450 - Policy with RSS/queue action is not supported when ``dv_xmeta_en`` enabled.
451 - meter profile packet mode is supported.
452 - meter profiles of RFC2697, RFC2698 and RFC4115 are supported.
456 - Integrity offload is enabled for **ConnectX-6** family.
457 - Verification bits provided by the hardware are ``l3_ok``, ``ipv4_csum_ok``, ``l4_ok``, ``l4_csum_ok``.
458 - ``level`` value 0 references outer headers.
459 - Multiple integrity items not supported in a single flow rule.
460 - Flow rule items supplied by application must explicitly specify network headers referred by integrity item.
461 For example, if integrity item mask sets ``l4_ok`` or ``l4_csum_ok`` bits, reference to L4 network header,
462 TCP or UDP, must be in the rule pattern as well::
464 flow create 0 ingress pattern integrity level is 0 value mask l3_ok value spec l3_ok / eth / ipv6 / end …
466 flow create 0 ingress pattern integrity level is 0 value mask l4_ok value spec 0 / eth / ipv4 proto is udp / end …
468 - Connection tracking:
470 - Cannot co-exist with ASO meter, ASO age action in a single flow rule.
471 - Flow rules insertion rate and memory consumption need more optimization.
473 - 4M connections maximum.
475 - Multi-thread flow insertion:
477 - In order to achieve best insertion rate, application should manage the flows per lcore.
478 - Better to disable memory reclaim by setting ``reclaim_mem_mode`` to 0 to accelerate the flow object allocation and release with cache.
482 - TXQ affinity subjects to HW hash once enabled.
484 - Bonding under socket direct mode
490 - CQE timestamp field width is limited by hardware to 63 bits, MSB is zero.
491 - In the free-running mode the timestamp counter is reset on power on
492 and 63-bit value provides over 1800 years of uptime till overflow.
493 - In the real-time mode
494 (configurable with ``REAL_TIME_CLOCK_ENABLE`` firmware settings),
495 the timestamp presents the nanoseconds elapsed since 01-Jan-1970,
496 hardware timestamp overflow will happen on 19-Jan-2038
497 (0x80000000 seconds since 01-Jan-1970).
498 - The send scheduling is based on timestamps
499 from the reference "Clock Queue" completions,
500 the scheduled send timestamps should not be specified with non-zero MSB.
504 - WQE based high scaling and safer flow insertion/destruction.
505 - Set ``dv_flow_en`` to 2 in order to enable HW steering.
506 - Async queue-based ``rte_flow_q`` APIs supported only.
508 - Match on GRE header supports the following fields:
510 - c_rsvd0_v: C bit, K bit, S bit
516 Matching on checksum and sequence needs OFED 5.6+.
518 - The NIC egress flow rules on representor port are not supported.
524 MLX5 supports various methods to report statistics:
526 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
528 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
530 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
536 See :ref:`mlx5 common compilation <mlx5_common_compilation>`.
542 Environment Configuration
543 ~~~~~~~~~~~~~~~~~~~~~~~~~
545 See :ref:`mlx5 common configuration <mlx5_common_env>`.
547 Firmware configuration
548 ~~~~~~~~~~~~~~~~~~~~~~
550 See :ref:`mlx5_firmware_config` guide.
555 Please refer to :ref:`mlx5 common options <mlx5_common_driver_options>`
556 for an additional list of options shared with other mlx5 drivers.
558 - ``rxq_cqe_comp_en`` parameter [int]
560 A nonzero value enables the compression of CQE on RX side. This feature
561 allows to save PCI bandwidth and improve performance. Enabled by default.
562 Different compression formats are supported in order to achieve the best
563 performance for different traffic patterns. Default format depends on
564 Multi-Packet Rx queue configuration: Hash RSS format is used in case
565 MPRQ is disabled, Checksum format is used in case MPRQ is enabled.
567 Specifying 2 as a ``rxq_cqe_comp_en`` value selects Flow Tag format for
568 better compression rate in case of RTE Flow Mark traffic.
569 Specifying 3 as a ``rxq_cqe_comp_en`` value selects Checksum format.
570 Specifying 4 as a ``rxq_cqe_comp_en`` value selects L3/L4 Header format for
571 better compression rate in case of mixed TCP/UDP and IPv4/IPv6 traffic.
572 CQE compression format selection requires DevX to be enabled. If there is
573 no DevX enabled/supported the value is reset to 1 by default.
577 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
578 ConnectX-6 Lx, BlueField and BlueField-2.
579 - POWER9 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
580 ConnectX-6 Lx, BlueField and BlueField-2.
582 - ``rxq_pkt_pad_en`` parameter [int]
584 A nonzero value enables padding Rx packet to the size of cacheline on PCI
585 transaction. This feature would waste PCI bandwidth but could improve
586 performance by avoiding partial cacheline write which may cause costly
587 read-modify-copy in memory transaction on some architectures. Disabled by
592 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
593 ConnectX-6 Lx, BlueField and BlueField-2.
594 - POWER8 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
595 ConnectX-6 Lx, BlueField and BlueField-2.
597 - ``delay_drop`` parameter [int]
599 Bitmask value for the Rx queue delay drop attribute. Bit 0 is used for the
600 standard Rx queue and bit 1 is used for the hairpin Rx queue. By default, the
601 delay drop is disabled for all Rx queues. It will be ignored if the port does
602 not support the attribute even if it is enabled explicitly.
604 The packets being received will not be dropped immediately when the WQEs are
605 exhausted in a Rx queue with delay drop enabled.
607 A timeout value is set in the driver to control the waiting time before
608 dropping a packet. Once the timer is expired, the delay drop will be
609 deactivated for all the Rx queues with this feature enable. To re-activate
610 it, a rearming is needed and it is part of the kernel driver starting from
613 To enable / disable the delay drop rearming, the private flag ``dropless_rq``
614 can be set and queried via ethtool:
616 - ethtool --set-priv-flags <netdev> dropless_rq on (/ off)
617 - ethtool --show-priv-flags <netdev>
619 The configuration flag is global per PF and can only be set on the PF, once
620 it is on, all the VFs', SFs' and representors' Rx queues will share the timer
623 - ``mprq_en`` parameter [int]
625 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
626 configured as Multi-Packet RQ if the total number of Rx queues is
627 ``rxqs_min_mprq`` or more. Disabled by default.
629 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
630 by posting a single large buffer for multiple packets. Instead of posting a
631 buffers per a packet, one large buffer is posted in order to receive multiple
632 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
633 and each stride receives one packet. MPRQ can improve throughput for
634 small-packet traffic.
636 When MPRQ is enabled, MTU can be larger than the size of
637 user-provided mbuf even if RTE_ETH_RX_OFFLOAD_SCATTER isn't enabled. PMD will
638 configure large stride size enough to accommodate MTU as long as
639 device allows. Note that this can waste system memory compared to enabling Rx
640 scatter and multi-segment packet.
642 - ``mprq_log_stride_num`` parameter [int]
644 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
645 strides can reduce PCIe traffic further. If configured value is not in the
646 range of device capability, the default value will be set with a warning
647 message. The default value is 4 which is 16 strides per a buffer, valid only
648 if ``mprq_en`` is set.
650 The size of Rx queue should be bigger than the number of strides.
652 - ``mprq_log_stride_size`` parameter [int]
654 Log 2 of the size of a stride for Multi-Packet Rx queue. Configuring a smaller
655 stride size can save some memory and reduce probability of a depletion of all
656 available strides due to unreleased packets by an application. If configured
657 value is not in the range of device capability, the default value will be set
658 with a warning message. The default value is 11 which is 2048 bytes per a
659 stride, valid only if ``mprq_en`` is set. With ``mprq_log_stride_size`` set
660 it is possible for a packet to span across multiple strides. This mode allows
661 support of jumbo frames (9K) with MPRQ. The memcopy of some packets (or part
662 of a packet if Rx scatter is configured) may be required in case there is no
663 space left for a head room at the end of a stride which incurs some
666 - ``mprq_max_memcpy_len`` parameter [int]
668 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
669 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
670 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
671 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
672 A mempool for external buffers will be allocated and managed by PMD. If Rx
673 packet is externally attached, ol_flags field of the mbuf will have
674 RTE_MBUF_F_EXTERNAL and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
675 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
677 - ``rxqs_min_mprq`` parameter [int]
679 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
680 greater or equal to this value. The default value is 12, valid only if
683 - ``txq_inline`` parameter [int]
685 Amount of data to be inlined during TX operations. This parameter is
686 deprecated and converted to the new parameter ``txq_inline_max`` providing
687 partial compatibility.
689 - ``txqs_min_inline`` parameter [int]
691 Enable inline data send only when the number of TX queues is greater or equal
694 This option should be used in combination with ``txq_inline_max`` and
695 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
697 If this option is not specified the default value 16 is used for BlueField
698 and 8 for other platforms
700 The data inlining consumes the CPU cycles, so this option is intended to
701 auto enable inline data if we have enough Tx queues, which means we have
702 enough CPU cores and PCI bandwidth is getting more critical and CPU
703 is not supposed to be bottleneck anymore.
705 The copying data into WQE improves latency and can improve PPS performance
706 when PCI back pressure is detected and may be useful for scenarios involving
707 heavy traffic on many queues.
709 Because additional software logic is necessary to handle this mode, this
710 option should be used with care, as it may lower performance when back
711 pressure is not expected.
713 If inline data are enabled it may affect the maximal size of Tx queue in
714 descriptors because the inline data increase the descriptor size and
715 queue size limits supported by hardware may be exceeded.
717 - ``txq_inline_min`` parameter [int]
719 Minimal amount of data to be inlined into WQE during Tx operations. NICs
720 may require this minimal data amount to operate correctly. The exact value
721 may depend on NIC operation mode, requested offloads, etc. It is strongly
722 recommended to omit this parameter and use the default values. Anyway,
723 applications using this parameter should take into consideration that
724 specifying an inconsistent value may prevent the NIC from sending packets.
726 If ``txq_inline_min`` key is present the specified value (may be aligned
727 by the driver in order not to exceed the limits and provide better descriptor
728 space utilization) will be used by the driver and it is guaranteed that
729 requested amount of data bytes are inlined into the WQE beside other inline
730 settings. This key also may update ``txq_inline_max`` value (default
731 or specified explicitly in devargs) to reserve the space for inline data.
733 If ``txq_inline_min`` key is not present, the value may be queried by the
734 driver from the NIC via DevX if this feature is available. If there is no DevX
735 enabled/supported the value 18 (supposing L2 header including VLAN) is set
736 for ConnectX-4 and ConnectX-4 Lx, and 0 is set by default for ConnectX-5
737 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
740 For ConnectX-4 NIC, driver does not allow specifying value below 18
741 (minimal L2 header, including VLAN), error will be raised.
743 For ConnectX-4 Lx NIC, it is allowed to specify values below 18, but
744 it is not recommended and may prevent NIC from sending packets over
747 For ConnectX-4 and ConnectX-4 Lx NICs, automatically configured value
748 is insufficient for some traffic, because they require at least all L2 headers
749 to be inlined. For example, Q-in-Q adds 4 bytes to default 18 bytes
750 of Ethernet and VLAN, thus ``txq_inline_min`` must be set to 22.
751 MPLS would add 4 bytes per label. Final value must account for all possible
752 L2 encapsulation headers used in particular environment.
754 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
755 Multi-Packet Write), because last one does not support partial packet inlining.
756 This is not very critical due to minimal data inlining is mostly required
757 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
759 - ``txq_inline_max`` parameter [int]
761 Specifies the maximal packet length to be completely inlined into WQE
762 Ethernet Segment for ordinary SEND method. If packet is larger than specified
763 value, the packet data won't be copied by the driver at all, data buffer
764 is addressed with a pointer. If packet length is less or equal all packet
765 data will be copied into WQE. This may improve PCI bandwidth utilization for
766 short packets significantly but requires the extra CPU cycles.
768 The data inline feature is controlled by number of Tx queues, if number of Tx
769 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
770 is engaged, if there are not enough Tx queues (which means not enough CPU cores
771 and CPU resources are scarce), data inline is not performed by the driver.
772 Assigning ``txqs_min_inline`` with zero always enables the data inline.
774 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
775 by the driver in order not to exceed the limit (930 bytes) and to provide better
776 WQE space filling without gaps, the adjustment is reflected in the debug log.
777 Also, the default value (290) may be decreased in run-time if the large transmit
778 queue size is requested and hardware does not support enough descriptor
779 amount, in this case warning is emitted. If ``txq_inline_max`` key is
780 specified and requested inline settings can not be satisfied then error
783 - ``txq_inline_mpw`` parameter [int]
785 Specifies the maximal packet length to be completely inlined into WQE for
786 Enhanced MPW method. If packet is large the specified value, the packet data
787 won't be copied, and data buffer is addressed with pointer. If packet length
788 is less or equal, all packet data will be copied into WQE. This may improve PCI
789 bandwidth utilization for short packets significantly but requires the extra
792 The data inline feature is controlled by number of TX queues, if number of Tx
793 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
794 is engaged, if there are not enough Tx queues (which means not enough CPU cores
795 and CPU resources are scarce), data inline is not performed by the driver.
796 Assigning ``txqs_min_inline`` with zero always enables the data inline.
798 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
799 by the driver in order not to exceed the limit (930 bytes) and to provide better
800 WQE space filling without gaps, the adjustment is reflected in the debug log.
801 Due to multiple packets may be included to the same WQE with Enhanced Multi
802 Packet Write Method and overall WQE size is limited it is not recommended to
803 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
804 may be decreased in run-time if the large transmit queue size is requested
805 and hardware does not support enough descriptor amount, in this case warning
806 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
807 settings can not be satisfied then error will be raised.
809 - ``txqs_max_vec`` parameter [int]
811 Enable vectorized Tx only when the number of TX queues is less than or
812 equal to this value. This parameter is deprecated and ignored, kept
813 for compatibility issue to not prevent driver from probing.
815 - ``txq_mpw_hdr_dseg_en`` parameter [int]
817 A nonzero value enables including two pointers in the first block of TX
818 descriptor. The parameter is deprecated and ignored, kept for compatibility
821 - ``txq_max_inline_len`` parameter [int]
823 Maximum size of packet to be inlined. This limits the size of packet to
824 be inlined. If the size of a packet is larger than configured value, the
825 packet isn't inlined even though there's enough space remained in the
826 descriptor. Instead, the packet is included with pointer. This parameter
827 is deprecated and converted directly to ``txq_inline_mpw`` providing full
828 compatibility. Valid only if eMPW feature is engaged.
830 - ``txq_mpw_en`` parameter [int]
832 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
833 ConnectX-6, ConnectX-6 Dx, ConnectX-6 Lx, BlueField, BlueField-2.
834 eMPW allows the Tx burst function to pack up multiple packets
835 in a single descriptor session in order to save PCI bandwidth
836 and improve performance at the cost of a slightly higher CPU usage.
837 When ``txq_inline_mpw`` is set along with ``txq_mpw_en``,
838 Tx burst function copies entire packet data on to Tx descriptor
839 instead of including pointer of packet.
841 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
842 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
843 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
844 option or reported by the NIC, the eMPW feature is disengaged.
846 - ``tx_db_nc`` parameter [int]
848 This parameter name is deprecated and ignored.
849 The new name for this parameter is ``sq_db_nc``.
850 See :ref:`common driver options <mlx5_common_driver_options>`.
852 - ``tx_pp`` parameter [int]
854 If a nonzero value is specified the driver creates all necessary internal
855 objects to provide accurate packet send scheduling on mbuf timestamps.
856 The positive value specifies the scheduling granularity in nanoseconds,
857 the packet send will be accurate up to specified digits. The allowed range is
858 from 500 to 1 million of nanoseconds. The negative value specifies the module
859 of granularity and engages the special test mode the check the schedule rate.
860 By default (if the ``tx_pp`` is not specified) send scheduling on timestamps
863 Starting with ConnectX-7 the capability to schedule traffic directly
864 on timestamp specified in descriptor is provided,
865 no extra objects are needed anymore and scheduling capability
866 is advertised and handled regardless ``tx_pp`` parameter presence.
868 - ``tx_skew`` parameter [int]
870 The parameter adjusts the send packet scheduling on timestamps and represents
871 the average delay between beginning of the transmitting descriptor processing
872 by the hardware and appearance of actual packet data on the wire. The value
873 should be provided in nanoseconds and is valid only if ``tx_pp`` parameter is
874 specified. The default value is zero.
876 - ``tx_vec_en`` parameter [int]
878 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 Dx,
879 ConnectX-6 Lx, BlueField and BlueField-2 NICs
880 if the number of global Tx queues on the port is less than ``txqs_max_vec``.
881 The parameter is deprecated and ignored.
883 - ``rx_vec_en`` parameter [int]
885 A nonzero value enables Rx vector if the port is not configured in
886 multi-segment otherwise this parameter is ignored.
890 - ``vf_nl_en`` parameter [int]
892 A nonzero value enables Netlink requests from the VF to add/remove MAC
893 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
894 Otherwise the relevant configuration must be run with Linux iproute2 tools.
895 This is a prerequisite to receive this kind of traffic.
897 Enabled by default, valid only on VF devices ignored otherwise.
899 - ``l3_vxlan_en`` parameter [int]
901 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
902 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
903 parameter. This is a prerequisite to receive this kind of traffic.
907 - ``dv_xmeta_en`` parameter [int]
909 A nonzero value enables extensive flow metadata support if device is
910 capable and driver supports it. This can enable extensive support of
911 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
912 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
914 There are some possible configurations, depending on parameter value:
916 - 0, this is default value, defines the legacy mode, the ``MARK`` and
917 ``META`` related actions and items operate only within NIC Tx and
918 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
919 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
920 item is 32 bits wide and match supported on egress only.
922 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
923 related actions and items operate within all supported steering domains,
924 including FDB, ``MARK`` and ``META`` information may cross the domain
925 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
926 depends on kernel and firmware configurations and might be 0, 16 or
927 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
928 compatibility, the actual width of data transferred to the FDB domain
929 depends on kernel configuration and may be vary. The actual supported
930 width can be retrieved in runtime by series of rte_flow_validate()
933 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
934 related actions and items operate within all supported steering domains,
935 including FDB, ``MARK`` and ``META`` information may cross the domain
936 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
937 depends on kernel and firmware configurations and might be 0, 16 or
938 24 bits. The actual supported width can be retrieved in runtime by
939 series of rte_flow_validate() trials.
941 - 3, this engages tunnel offload mode. In E-Switch configuration, that
942 mode implicitly activates ``dv_xmeta_en=1``.
944 +------+-----------+-----------+-------------+-------------+
945 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
946 +======+===========+===========+=============+=============+
947 | 0 | 24 bits | 32 bits | 32 bits | no |
948 +------+-----------+-----------+-------------+-------------+
949 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
950 +------+-----------+-----------+-------------+-------------+
951 | 2 | vary 0-24 | 32 bits | 32 bits | yes |
952 +------+-----------+-----------+-------------+-------------+
954 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
955 ignored and the device is configured to operate in legacy mode (0).
957 Disabled by default (set to 0).
959 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
960 of the extensive metadata features. The legacy Verbs supports FLAG and
961 MARK metadata actions over NIC Rx steering domain only.
963 Setting META value to zero in flow action means there is no item provided
964 and receiving datapath will not report in mbufs the metadata are present.
965 Setting MARK value to zero in flow action means the zero FDIR ID value
966 will be reported on packet receiving.
968 For the MARK action the last 16 values in the full range are reserved for
969 internal PMD purposes (to emulate FLAG action). The valid range for the
970 MARK action values is 0-0xFFEF for the 16-bit mode and 0-0xFFFFEF
971 for the 24-bit mode, the flows with the MARK action value outside
972 the specified range will be rejected.
974 - ``dv_flow_en`` parameter [int]
976 Value 0 means legacy Verbs flow offloading.
978 Value 1 enables the DV flow steering assuming it is supported by the
979 driver (requires rdma-core 24 or higher).
981 Value 2 enables the WQE based hardware steering.
982 In this mode, only queue-based flow management is supported.
984 It is configured by default to 1 (DV flow steering) if supported.
985 Otherwise, the value is 0 which indicates legacy Verbs flow offloading.
987 - ``dv_esw_en`` parameter [int]
989 A nonzero value enables E-Switch using Direct Rules.
991 Enabled by default if supported.
993 - ``lacp_by_user`` parameter [int]
995 A nonzero value enables the control of LACP traffic by the user application.
996 When a bond exists in the driver, by default it should be managed by the
997 kernel and therefore LACP traffic should be steered to the kernel.
998 If this devarg is set to 1 it will allow the user to manage the bond by
999 itself and not steer LACP traffic to the kernel.
1001 Disabled by default (set to 0).
1003 - ``representor`` parameter [list]
1005 This parameter can be used to instantiate DPDK Ethernet devices from
1006 existing port (PF, VF or SF) representors configured on the device.
1008 It is a standard parameter whose format is described in
1009 :ref:`ethernet_device_standard_device_arguments`.
1011 For instance, to probe VF port representors 0 through 2::
1013 <PCI_BDF>,representor=vf[0-2]
1015 To probe SF port representors 0 through 2::
1017 <PCI_BDF>,representor=sf[0-2]
1019 To probe VF port representors 0 through 2 on both PFs of bonding device::
1021 <Primary_PCI_BDF>,representor=pf[0,1]vf[0-2]
1023 - ``max_dump_files_num`` parameter [int]
1025 The maximum number of files per PMD entity that may be created for debug information.
1026 The files will be created in /var/log directory or in current directory.
1028 set to 128 by default.
1030 - ``lro_timeout_usec`` parameter [int]
1032 The maximum allowed duration of an LRO session, in micro-seconds.
1033 PMD will set the nearest value supported by HW, which is not bigger than
1034 the input ``lro_timeout_usec`` value.
1035 If this parameter is not specified, by default PMD will set
1036 the smallest value supported by HW.
1038 - ``hp_buf_log_sz`` parameter [int]
1040 The total data buffer size of a hairpin queue (logarithmic form), in bytes.
1041 PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
1042 The capacity of the value is specified by the firmware and the initialization
1043 will get a failure if it is out of scope.
1044 The range of the value is from 11 to 19 right now, and the supported frame
1045 size of a single packet for hairpin is from 512B to 128KB. It might change if
1046 different firmware release is being used. By using a small value, it could
1047 reduce memory consumption but not work with a large frame. If the value is
1048 too large, the memory consumption will be high and some potential performance
1049 degradation will be introduced.
1050 By default, the PMD will set this value to 16, which means that 9KB jumbo
1051 frames will be supported.
1053 - ``reclaim_mem_mode`` parameter [int]
1055 Cache some resources in flow destroy will help flow recreation more efficient.
1056 While some systems may require the all the resources can be reclaimed after
1058 The parameter ``reclaim_mem_mode`` provides the option for user to configure
1059 if the resource cache is needed or not.
1061 There are three options to choose:
1063 - 0. It means the flow resources will be cached as usual. The resources will
1064 be cached, helpful with flow insertion rate.
1066 - 1. It will only enable the DPDK PMD level resources reclaim.
1068 - 2. Both DPDK PMD level and rdma-core low level will be configured as
1071 By default, the PMD will set this value to 0.
1073 - ``decap_en`` parameter [int]
1075 Some devices do not support FCS (frame checksum) scattering for
1076 tunnel-decapsulated packets.
1077 If set to 0, this option forces the FCS feature and rejects tunnel
1078 decapsulation in the flow engine for such devices.
1080 By default, the PMD will set this value to 1.
1082 - ``allow_duplicate_pattern`` parameter [int]
1084 There are two options to choose:
1086 - 0. Prevent insertion of rules with the same pattern items on non-root table.
1087 In this case, only the first rule is inserted and the following rules are
1088 rejected and error code EEXIST is returned.
1090 - 1. Allow insertion of rules with the same pattern items.
1091 In this case, all rules are inserted but only the first rule takes effect,
1092 the next rule takes effect only if the previous rules are deleted.
1094 By default, the PMD will set this value to 1.
1100 The following Mellanox device families are supported by the same mlx5 driver:
1112 Below are detailed device names:
1114 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX4111A-XCAT (1x10G)
1115 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX412A-XCAT (2x10G)
1116 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX4111A-ACAT (1x25G)
1117 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX412A-ACAT (2x25G)
1118 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX413A-BCAT (1x40G)
1119 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX4131A-BCAT (1x40G)
1120 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX415A-BCAT (1x40G)
1121 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX413A-GCAT (1x50G)
1122 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX4131A-GCAT (1x50G)
1123 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX414A-BCAT (2x50G)
1124 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-GCAT (1x50G)
1125 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-BCAT (2x50G)
1126 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-GCAT (2x50G)
1127 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-CCAT (1x100G)
1128 * Mellanox\ |reg| ConnectX\ |reg|-4 100G MCX416A-CCAT (2x100G)
1129 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4111A-XCAT (1x10G)
1130 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4121A-XCAT (2x10G)
1131 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4111A-ACAT (1x25G)
1132 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4121A-ACAT (2x25G)
1133 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 40G MCX4131A-BCAT (1x40G)
1134 * Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-ECAT (2x100G)
1135 * Mellanox\ |reg| ConnectX\ |reg|-5 Ex EN 100G MCX516A-CDAT (2x100G)
1136 * Mellanox\ |reg| ConnectX\ |reg|-6 200G MCX654106A-HCAT (2x200G)
1137 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 100G MCX623106AN-CDAT (2x100G)
1138 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 200G MCX623105AN-VDAT (1x200G)
1139 * Mellanox\ |reg| ConnectX\ |reg|-6 Lx EN 25G MCX631102AN-ADAT (2x25G)
1145 See :ref:`mlx5_sub_function`.
1147 Sub-Function representor support
1148 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1150 A SF netdev supports E-Switch representation offload
1151 similar to PF and VF representors.
1152 Use <sfnum> to probe SF representor::
1154 testpmd> port attach <PCI_BDF>,representor=sf<sfnum>,dv_flow_en=1
1160 1. Configure aggressive CQE Zipping for maximum performance::
1162 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1164 To set it back to the default CQE Zipping mode use::
1166 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1168 2. In case of virtualization:
1170 - Make sure that hypervisor kernel is 3.16 or newer.
1171 - Configure boot with ``iommu=pt``.
1172 - Use 1G huge pages.
1173 - Make sure to allocate a VM on huge pages.
1174 - Make sure to set CPU pinning.
1176 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1177 for better performance. For VMs, verify that the right CPU
1178 and NUMA node are pinned according to the above. Run::
1180 lstopo-no-graphics --merge
1182 to identify the NUMA node to which the PCIe adapter is connected.
1184 4. If more than one adapter is used, and root complex capabilities allow
1185 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1186 it is recommended to locate both adapters on the same NUMA node.
1187 This in order to forward packets from one to the other without
1188 NUMA performance penalty.
1190 5. Disable pause frames::
1192 ethtool -A <netdev> rx off tx off
1194 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1195 via the BIOS configuration. Please contact you server provider for more
1196 information about the settings.
1200 On some machines, depends on the machine integrator, it is beneficial
1201 to set the PCI max read request parameter to 1K. This can be
1202 done in the following way:
1204 To query the read request size use::
1206 setpci -s <NIC PCI address> 68.w
1208 If the output is different than 3XXX, set it by::
1210 setpci -s <NIC PCI address> 68.w=3XXX
1212 The XXX can be different on different systems. Make sure to configure
1213 according to the setpci output.
1215 7. To minimize overhead of searching Memory Regions:
1217 - '--socket-mem' is recommended to pin memory by predictable amount.
1218 - Configure per-lcore cache when creating Mempools for packet buffer.
1219 - Refrain from dynamically allocating/freeing memory in run-time.
1224 There are multiple Rx burst functions with different advantages and limitations.
1226 .. table:: Rx burst functions
1228 +-------------------+------------------------+---------+-----------------+------+-------+
1229 || Function Name || Enabler || Scatter|| Error Recovery || CQE || Large|
1230 | | | | || comp|| MTU |
1231 +===================+========================+=========+=================+======+=======+
1232 | rx_burst | rx_vec_en=0 | Yes | Yes | Yes | Yes |
1233 +-------------------+------------------------+---------+-----------------+------+-------+
1234 | rx_burst_vec | rx_vec_en=1 (default) | No | if CQE comp off | Yes | No |
1235 +-------------------+------------------------+---------+-----------------+------+-------+
1236 | rx_burst_mprq || mprq_en=1 | No | Yes | Yes | Yes |
1237 | || RxQs >= rxqs_min_mprq | | | | |
1238 +-------------------+------------------------+---------+-----------------+------+-------+
1239 | rx_burst_mprq_vec || rx_vec_en=1 (default) | No | if CQE comp off | Yes | Yes |
1240 | || mprq_en=1 | | | | |
1241 | || RxQs >= rxqs_min_mprq | | | | |
1242 +-------------------+------------------------+---------+-----------------+------+-------+
1244 .. _mlx5_offloads_support:
1246 Supported hardware offloads
1247 ---------------------------
1249 .. table:: Minimal SW/HW versions for queue offloads
1251 ============== ===== ===== ========= ===== ========== =============
1252 Offload DPDK Linux rdma-core OFED firmware hardware
1253 ============== ===== ===== ========= ===== ========== =============
1254 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1255 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1256 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1257 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1258 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1259 Tx scheduling 20.08 N/A N/A 5.1-2 22.28.2006 ConnectX-6 Dx
1260 Buffer Split 20.11 N/A N/A 5.1-2 16.28.2006 ConnectX-5
1261 ============== ===== ===== ========= ===== ========== =============
1263 .. table:: Minimal SW/HW versions for rte_flow offloads
1265 +-----------------------+-----------------+-----------------+
1266 | Offload | with E-Switch | with NIC |
1267 +=======================+=================+=================+
1268 | Count | | DPDK 19.05 | | DPDK 19.02 |
1269 | | | OFED 4.6 | | OFED 4.6 |
1270 | | | rdma-core 24 | | rdma-core 23 |
1271 | | | ConnectX-5 | | ConnectX-5 |
1272 +-----------------------+-----------------+-----------------+
1273 | Drop | | DPDK 19.05 | | DPDK 18.11 |
1274 | | | OFED 4.6 | | OFED 4.5 |
1275 | | | rdma-core 24 | | rdma-core 23 |
1276 | | | ConnectX-5 | | ConnectX-4 |
1277 +-----------------------+-----------------+-----------------+
1278 | Queue / RSS | | | | DPDK 18.11 |
1279 | | | N/A | | OFED 4.5 |
1280 | | | | | rdma-core 23 |
1281 | | | | | ConnectX-4 |
1282 +-----------------------+-----------------+-----------------+
1283 | Shared action | | | | |
1284 | | | :numref:`sact`| | :numref:`sact`|
1287 +-----------------------+-----------------+-----------------+
1288 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1289 | | (of_pop_vlan / | | OFED 4.7-1 | | OFED 4.7-1 |
1290 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1291 | | of_set_vlan_pcp / | | | | |
1292 | | of_set_vlan_vid) | | | | |
1293 +-----------------------+-----------------+-----------------+
1294 | | VLAN | | DPDK 21.05 | | |
1295 | | ingress and / | | OFED 5.3 | | N/A |
1296 | | of_push_vlan / | | ConnectX-6 Dx | | |
1297 +-----------------------+-----------------+-----------------+
1298 | | VLAN | | DPDK 21.05 | | |
1299 | | egress and / | | OFED 5.3 | | N/A |
1300 | | of_pop_vlan / | | ConnectX-6 Dx | | |
1301 +-----------------------+-----------------+-----------------+
1302 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1303 | (VXLAN / NVGRE / RAW) | | OFED 4.7-1 | | OFED 4.6 |
1304 | | | rdma-core 24 | | rdma-core 23 |
1305 | | | ConnectX-5 | | ConnectX-5 |
1306 +-----------------------+-----------------+-----------------+
1307 | Encapsulation | | DPDK 19.11 | | DPDK 19.11 |
1308 | GENEVE | | OFED 4.7-3 | | OFED 4.7-3 |
1309 | | | rdma-core 27 | | rdma-core 27 |
1310 | | | ConnectX-5 | | ConnectX-5 |
1311 +-----------------------+-----------------+-----------------+
1312 | Tunnel Offload | | DPDK 20.11 | | DPDK 20.11 |
1313 | | | OFED 5.1-2 | | OFED 5.1-2 |
1314 | | | rdma-core 32 | | N/A |
1315 | | | ConnectX-5 | | ConnectX-5 |
1316 +-----------------------+-----------------+-----------------+
1317 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1318 | | (set_ipv4_src / | | OFED 4.7-1 | | OFED 4.7-1 |
1319 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 24 |
1320 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1321 | | set_ipv6_dst / | | | | |
1322 | | set_tp_src / | | | | |
1323 | | set_tp_dst / | | | | |
1324 | | dec_ttl / | | | | |
1325 | | set_ttl / | | | | |
1326 | | set_mac_src / | | | | |
1327 | | set_mac_dst) | | | | |
1328 +-----------------------+-----------------+-----------------+
1329 | | Header rewrite | | DPDK 20.02 | | DPDK 20.02 |
1330 | | (set_dscp) | | OFED 5.0 | | OFED 5.0 |
1331 | | | | rdma-core 24 | | rdma-core 24 |
1332 | | | | ConnectX-5 | | ConnectX-5 |
1333 +-----------------------+-----------------+-----------------+
1334 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1335 | | | OFED 4.7-1 | | OFED 4.7-1 |
1336 | | | rdma-core 24 | | N/A |
1337 | | | ConnectX-5 | | ConnectX-5 |
1338 +-----------------------+-----------------+-----------------+
1339 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1340 | | | OFED 4.6 | | OFED 4.5 |
1341 | | | rdma-core 24 | | rdma-core 23 |
1342 | | | ConnectX-5 | | ConnectX-4 |
1343 +-----------------------+-----------------+-----------------+
1344 | Meta data | | DPDK 19.11 | | DPDK 19.11 |
1345 | | | OFED 4.7-3 | | OFED 4.7-3 |
1346 | | | rdma-core 26 | | rdma-core 26 |
1347 | | | ConnectX-5 | | ConnectX-5 |
1348 +-----------------------+-----------------+-----------------+
1349 | Port ID | | DPDK 19.05 | | N/A |
1350 | | | OFED 4.7-1 | | N/A |
1351 | | | rdma-core 24 | | N/A |
1352 | | | ConnectX-5 | | N/A |
1353 +-----------------------+-----------------+-----------------+
1354 | Hairpin | | | | DPDK 19.11 |
1355 | | | N/A | | OFED 4.7-3 |
1356 | | | | | rdma-core 26 |
1357 | | | | | ConnectX-5 |
1358 +-----------------------+-----------------+-----------------+
1359 | 2-port Hairpin | | | | DPDK 20.11 |
1360 | | | N/A | | OFED 5.1-2 |
1362 | | | | | ConnectX-5 |
1363 +-----------------------+-----------------+-----------------+
1364 | Metering | | DPDK 19.11 | | DPDK 19.11 |
1365 | | | OFED 4.7-3 | | OFED 4.7-3 |
1366 | | | rdma-core 26 | | rdma-core 26 |
1367 | | | ConnectX-5 | | ConnectX-5 |
1368 +-----------------------+-----------------+-----------------+
1369 | ASO Metering | | DPDK 21.05 | | DPDK 21.05 |
1370 | | | OFED 5.3 | | OFED 5.3 |
1371 | | | rdma-core 33 | | rdma-core 33 |
1372 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1373 +-----------------------+-----------------+-----------------+
1374 | Metering Hierarchy | | DPDK 21.08 | | DPDK 21.08 |
1375 | | | OFED 5.3 | | OFED 5.3 |
1377 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1378 +-----------------------+-----------------+-----------------+
1379 | Sampling | | DPDK 20.11 | | DPDK 20.11 |
1380 | | | OFED 5.1-2 | | OFED 5.1-2 |
1381 | | | rdma-core 32 | | N/A |
1382 | | | ConnectX-5 | | ConnectX-5 |
1383 +-----------------------+-----------------+-----------------+
1384 | Encapsulation | | DPDK 21.02 | | DPDK 21.02 |
1385 | GTP PSC | | OFED 5.2 | | OFED 5.2 |
1386 | | | rdma-core 35 | | rdma-core 35 |
1387 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1388 +-----------------------+-----------------+-----------------+
1389 | Encapsulation | | DPDK 21.02 | | DPDK 21.02 |
1390 | GENEVE TLV option | | OFED 5.2 | | OFED 5.2 |
1391 | | | rdma-core 34 | | rdma-core 34 |
1392 | | | ConnectX-6 Dx | | ConnectX-6 Dx |
1393 +-----------------------+-----------------+-----------------+
1394 | Modify Field | | DPDK 21.02 | | DPDK 21.02 |
1395 | | | OFED 5.2 | | OFED 5.2 |
1396 | | | rdma-core 35 | | rdma-core 35 |
1397 | | | ConnectX-5 | | ConnectX-5 |
1398 +-----------------------+-----------------+-----------------+
1399 | Connection tracking | | | | DPDK 21.05 |
1400 | | | N/A | | OFED 5.3 |
1401 | | | | | rdma-core 35 |
1402 | | | | | ConnectX-6 Dx |
1403 +-----------------------+-----------------+-----------------+
1405 .. table:: Minimal SW/HW versions for shared action offload
1408 +-----------------------+-----------------+-----------------+
1409 | Shared Action | with E-Switch | with NIC |
1410 +=======================+=================+=================+
1411 | RSS | | | | DPDK 20.11 |
1412 | | | N/A | | OFED 5.2 |
1413 | | | | | rdma-core 33 |
1414 | | | | | ConnectX-5 |
1415 +-----------------------+-----------------+-----------------+
1416 | Age | | DPDK 20.11 | | DPDK 20.11 |
1417 | | | OFED 5.2 | | OFED 5.2 |
1418 | | | rdma-core 32 | | rdma-core 32 |
1419 | | | ConnectX-6 Dx | | ConnectX-6 Dx |
1420 +-----------------------+-----------------+-----------------+
1421 | Count | | DPDK 21.05 | | DPDK 21.05 |
1422 | | | OFED 4.6 | | OFED 4.6 |
1423 | | | rdma-core 24 | | rdma-core 23 |
1424 | | | ConnectX-5 | | ConnectX-5 |
1425 +-----------------------+-----------------+-----------------+
1430 MARK and META items are interrelated with datapath - they might move from/to
1431 the applications in mbuf fields. Hence, zero value for these items has the
1432 special meaning - it means "no metadata are provided", not zero values are
1433 treated by applications and PMD as valid ones.
1435 Moreover in the flow engine domain the value zero is acceptable to match and
1436 set, and we should allow to specify zero values as rte_flow parameters for the
1437 META and MARK items and actions. In the same time zero mask has no meaning and
1438 should be rejected on validation stage.
1443 Flows are not cached in the driver.
1444 When stopping a device port, all the flows created on this port from the
1445 application will be flushed automatically in the background.
1446 After stopping the device port, all flows on this port become invalid and
1447 not represented in the system.
1448 All references to these flows held by the application should be discarded
1449 directly but neither destroyed nor flushed.
1451 The application should re-create the flows as required after the port restart.
1456 Compared to librte_net_mlx4 that implements a single RSS configuration per
1457 port, librte_net_mlx5 supports per-protocol RSS configuration.
1459 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1460 command-line parameter to enable additional protocols (UDP and TCP as well
1461 as IP), the following commands must be entered from its CLI to get the same
1462 behavior as librte_net_mlx4::
1465 > port config all rss all
1471 This section demonstrates how to launch **testpmd** with Mellanox
1472 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_net_mlx5.
1474 #. Load the kernel modules::
1476 modprobe -a ib_uverbs mlx5_core mlx5_ib
1478 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1481 /etc/init.d/openibd restart
1485 User space I/O kernel modules (uio and igb_uio) are not used and do
1486 not have to be loaded.
1488 #. Make sure Ethernet interfaces are in working order and linked to kernel
1489 verbs. Related sysfs entries should be present::
1491 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1500 #. Optionally, retrieve their PCI bus addresses for to be used with the allow list::
1503 for intf in eth2 eth3 eth4 eth5;
1505 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1508 sed -n 's,.*/\(.*\),-a \1,p'
1517 #. Request huge pages::
1519 dpdk-hugepages.py --setup 2G
1521 #. Start testpmd with basic parameters::
1523 dpdk-testpmd -l 8-15 -n 4 -a 05:00.0 -a 05:00.1 -a 06:00.0 -a 06:00.1 -- --rxq=2 --txq=2 -i
1528 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1529 EAL: probe driver: 15b3:1013 librte_net_mlx5
1530 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1531 PMD: librte_net_mlx5: 1 port(s) detected
1532 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1533 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1534 EAL: probe driver: 15b3:1013 librte_net_mlx5
1535 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1536 PMD: librte_net_mlx5: 1 port(s) detected
1537 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1538 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1539 EAL: probe driver: 15b3:1013 librte_net_mlx5
1540 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
1541 PMD: librte_net_mlx5: 1 port(s) detected
1542 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
1543 EAL: PCI device 0000:06:00.1 on NUMA socket 0
1544 EAL: probe driver: 15b3:1013 librte_net_mlx5
1545 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
1546 PMD: librte_net_mlx5: 1 port(s) detected
1547 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
1548 Interactive-mode selected
1549 Configuring Port 0 (socket 0)
1550 PMD: librte_net_mlx5: 0x8cba80: TX queues number update: 0 -> 2
1551 PMD: librte_net_mlx5: 0x8cba80: RX queues number update: 0 -> 2
1552 Port 0: E4:1D:2D:E7:0C:FE
1553 Configuring Port 1 (socket 0)
1554 PMD: librte_net_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
1555 PMD: librte_net_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
1556 Port 1: E4:1D:2D:E7:0C:FF
1557 Configuring Port 2 (socket 0)
1558 PMD: librte_net_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
1559 PMD: librte_net_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
1560 Port 2: E4:1D:2D:E7:0C:FA
1561 Configuring Port 3 (socket 0)
1562 PMD: librte_net_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
1563 PMD: librte_net_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
1564 Port 3: E4:1D:2D:E7:0C:FB
1565 Checking link statuses...
1566 Port 0 Link Up - speed 40000 Mbps - full-duplex
1567 Port 1 Link Up - speed 40000 Mbps - full-duplex
1568 Port 2 Link Up - speed 10000 Mbps - full-duplex
1569 Port 3 Link Up - speed 10000 Mbps - full-duplex
1576 This section demonstrates how to dump flows. Currently, it's possible to dump
1577 all flows with assistance of external tools.
1579 #. 2 ways to get flow raw file:
1581 - Using testpmd CLI:
1583 .. code-block:: console
1586 testpmd> flow dump <port> all <output_file>
1588 testpmd> flow dump <port> rule <rule_id> <output_file>
1590 - call rte_flow_dev_dump api:
1592 .. code-block:: console
1594 rte_flow_dev_dump(port, flow, file, NULL);
1596 #. Dump human-readable flows from raw file:
1598 Get flow parsing tool from: https://github.com/Mellanox/mlx_steering_dump
1600 .. code-block:: console
1602 mlx_steering_dump.py -f <output_file> -flowptr <flow_ptr>
1604 How to share a meter between ports in the same switch domain
1605 ------------------------------------------------------------
1607 This section demonstrates how to use the shared meter. A meter M can be created
1608 on port X and to be shared with a port Y on the same switch domain by the next way:
1610 .. code-block:: console
1612 flow create X ingress transfer pattern eth / port_id id is Y / end actions meter mtr_id M / end
1614 How to use meter hierarchy
1615 --------------------------
1617 This section demonstrates how to create and use a meter hierarchy.
1618 A termination meter M can be the policy green action of another termination meter N.
1619 The two meters are chained together as a chain. Using meter N in a flow will apply
1620 both the meters in hierarchy on that flow.
1622 .. code-block:: console
1624 add port meter policy 0 1 g_actions queue index 0 / end y_actions end r_actions drop / end
1625 create port meter 0 M 1 1 yes 0xffff 1 0
1626 add port meter policy 0 2 g_actions meter mtr_id M / end y_actions end r_actions drop / end
1627 create port meter 0 N 2 2 yes 0xffff 1 0
1628 flow create 0 ingress group 1 pattern eth / end actions meter mtr_id N / end
1630 How to configure a VF as trusted
1631 --------------------------------
1633 This section demonstrates how to configure a virtual function (VF) interface as trusted.
1634 Trusted VF is needed to offload rules with rte_flow to a group that is bigger than 0.
1635 The configuration is done in two parts: driver and FW.
1637 The procedure below is an example of using a ConnectX-5 adapter card (pf0) with 2 VFs:
1639 #. Create 2 VFs on the PF pf0 when in Legacy SR-IOV mode::
1641 $ echo 2 > /sys/class/net/pf0/device/mlx5_num_vfs
1643 #. Verify the VFs are created:
1645 .. code-block:: console
1647 $ lspci | grep Mellanox
1648 82:00.0 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]
1649 82:00.1 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]
1650 82:00.2 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5 Virtual Function]
1651 82:00.3 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5 Virtual Function]
1653 #. Unbind all VFs. For each VF PCIe, using the following command to unbind the driver::
1655 $ echo "0000:82:00.2" >> /sys/bus/pci/drivers/mlx5_core/unbind
1657 #. Set the VFs to be trusted for the kernel by using one of the methods below:
1659 - Using sysfs file::
1661 $ echo ON | tee /sys/class/net/pf0/device/sriov/0/trust
1662 $ echo ON | tee /sys/class/net/pf0/device/sriov/1/trust
1664 - Using “ip link” command::
1666 $ ip link set p0 vf 0 trust on
1667 $ ip link set p0 vf 1 trust on
1669 #. Configure all VFs using mlxreg::
1671 $ mlxreg -d /dev/mst/mt4121_pciconf0 --reg_name VHCA_TRUST_LEVEL --yes --set "all_vhca=0x1,trust_level=0x1"
1675 Firmware version used must be >= xx.29.1016 and MFT >= 4.18
1677 #. For each VF PCIe, using the following command to bind the driver::
1679 $ echo "0000:82:00.2" >> /sys/bus/pci/drivers/mlx5_core/bind