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33 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
34 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
35 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
36 virtual functions (VF) in SR-IOV context.
38 Information and documentation about these adapters can be found on the
39 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
40 `Mellanox community <http://community.mellanox.com/welcome>`__.
42 There is also a `section dedicated to this poll mode driver
43 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
47 Due to external dependencies, this driver is disabled by default. It must
48 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
51 Implementation details
52 ----------------------
54 Besides its dependency on libibverbs (that implies libmlx5 and associated
55 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
56 operations such as querying/updating the MTU and flow control parameters.
58 For security reasons and robustness, this driver only deals with virtual
59 memory addresses. The way resources allocations are handled by the kernel
60 combined with hardware specifications that allow it to handle virtual memory
61 addresses directly ensure that DPDK applications cannot access random
62 physical memory (or memory that does not belong to the current process).
64 This capability allows the PMD to coexist with kernel network interfaces
65 which remain functional, although they stop receiving unicast packets as
66 long as they share the same MAC address.
68 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
74 - Multiple TX and RX queues.
75 - Support for scattered TX and RX frames.
76 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
77 - Several RSS hash keys, one for each flow type.
78 - Configurable RETA table.
79 - Support for multiple MAC addresses.
83 - RX CRC stripping configuration.
85 - Multicast promiscuous mode.
86 - Hardware checksum offloads.
87 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
90 - Secondary process TX is supported.
91 - KVM and VMware ESX SR-IOV modes are supported.
92 - RSS hash result is supported.
97 - Inner RSS for VXLAN frames is not supported yet.
98 - Port statistics through software counters only.
99 - Hardware checksum offloads for VXLAN inner header are not supported yet.
100 - Secondary process RX is not supported.
108 These options can be modified in the ``.config`` file.
110 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
112 Toggle compilation of librte_pmd_mlx5 itself.
114 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
116 Toggle debugging code and stricter compilation flags. Enabling this option
117 adds additional run-time checks and debugging messages at the cost of
120 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
122 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
123 which buffers are to be transmitted must be associated to memory regions
124 (MRs). This is a slow operation that must be cached.
126 This value is always 1 for RX queues since they use a single MP.
128 Environment variables
129 ~~~~~~~~~~~~~~~~~~~~~
131 - ``MLX5_PMD_ENABLE_PADDING``
133 Enables HW packet padding in PCI bus transactions.
135 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
136 bytes are written to the PCI bus. Enabling padding makes such packets
139 In cases where PCI bandwidth is the bottleneck, padding can improve
142 This is disabled by default since this can also decrease performance for
143 unaligned packet sizes.
145 Run-time configuration
146 ~~~~~~~~~~~~~~~~~~~~~~
148 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
149 because it is affected by their state. Forcing them down prevents packets
152 - **ethtool** operations on related kernel interfaces also affect the PMD.
154 - ``rxq_cqe_comp_en`` parameter [int]
156 A nonzero value enables the compression of CQE on RX side. This feature
157 allows to save PCI bandwidth and improve performance at the cost of a
158 slightly higher CPU usage. Enabled by default.
162 - x86_64 with ConnectX4 and ConnectX4 LX
163 - Power8 with ConnectX4 LX
165 - ``txq_inline`` parameter [int]
167 Amount of data to be inlined during TX operations. Improves latency.
168 Can improve PPS performance when PCI back pressure is detected and may be
169 useful for scenarios involving heavy traffic on many queues.
171 It is not enabled by default (set to 0) since the additional software
172 logic necessary to handle this mode can lower performance when back
173 pressure is not expected.
175 - ``txqs_min_inline`` parameter [int]
177 Enable inline send only when the number of TX queues is greater or equal
180 This option should be used in combination with ``txq_inline`` above.
182 - ``txq_mpw_en`` parameter [int]
184 A nonzero value enables multi-packet send. This feature allows the TX
185 burst function to pack up to five packets in two descriptors in order to
186 save PCI bandwidth and improve performance at the cost of a slightly
189 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
190 families of adapters. Enabled by default.
195 This driver relies on external libraries and kernel drivers for resources
196 allocations and initialization. The following dependencies are not part of
197 DPDK and must be installed separately:
201 User space Verbs framework used by librte_pmd_mlx5. This library provides
202 a generic interface between the kernel and low-level user space drivers
205 It allows slow and privileged operations (context initialization, hardware
206 resources allocations) to be managed by the kernel and fast operations to
207 never leave user space.
211 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
212 devices, it is automatically loaded by libibverbs.
214 This library basically implements send/receive calls to the hardware
217 - **Kernel modules** (mlnx-ofed-kernel)
219 They provide the kernel-side Verbs API and low level device drivers that
220 manage actual hardware initialization and resources sharing with user
223 Unlike most other PMDs, these modules must remain loaded and bound to
226 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
227 devices and related Ethernet kernel network devices.
228 - mlx5_ib: InifiniBand device driver.
229 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
231 - **Firmware update**
233 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
236 Because each release provides new features, these updates must be applied to
237 match the kernel modules and libraries they come with.
241 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
244 Currently supported by DPDK:
246 - Mellanox OFED version: **4.0-1.0.1.0**
249 - ConnectX-4: **12.18.1000**
250 - ConnectX-4 Lx: **14.18.1000**
251 - ConnectX-5: **16.18.1000**
252 - ConnectX-5 Ex: **16.18.1000**
254 Getting Mellanox OFED
255 ~~~~~~~~~~~~~~~~~~~~~
257 While these libraries and kernel modules are available on OpenFabrics
258 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
259 managers on most distributions, this PMD requires Ethernet extensions that
260 may not be supported at the moment (this is a work in progress).
263 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
264 includes the necessary support and should be used in the meantime. For DPDK,
265 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
266 required from that distribution.
270 Several versions of Mellanox OFED are available. Installing the version
271 this DPDK release was developed and tested against is strongly
272 recommended. Please check the `prerequisites`_.
277 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
278 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
279 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
280 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
281 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
282 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
283 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
284 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
285 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
286 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
287 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
288 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
289 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
290 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
291 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
292 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
293 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
294 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
295 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
300 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
301 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
303 Since ``testpmd`` defaults to IP RSS mode and there is currently no
304 command-line parameter to enable additional protocols (UDP and TCP as well
305 as IP), the following commands must be entered from its CLI to get the same
306 behavior as librte_pmd_mlx4:
308 .. code-block:: console
311 > port config all rss all
317 This section demonstrates how to launch **testpmd** with Mellanox
318 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
320 #. Load the kernel modules:
322 .. code-block:: console
324 modprobe -a ib_uverbs mlx5_core mlx5_ib
326 Alternatively if MLNX_OFED is fully installed, the following script can
329 .. code-block:: console
331 /etc/init.d/openibd restart
335 User space I/O kernel modules (uio and igb_uio) are not used and do
336 not have to be loaded.
338 #. Make sure Ethernet interfaces are in working order and linked to kernel
339 verbs. Related sysfs entries should be present:
341 .. code-block:: console
343 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
347 .. code-block:: console
354 #. Optionally, retrieve their PCI bus addresses for whitelisting:
356 .. code-block:: console
359 for intf in eth2 eth3 eth4 eth5;
361 (cd "/sys/class/net/${intf}/device/" && pwd -P);
364 sed -n 's,.*/\(.*\),-w \1,p'
368 .. code-block:: console
375 #. Request huge pages:
377 .. code-block:: console
379 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
381 #. Start testpmd with basic parameters:
383 .. code-block:: console
385 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
389 .. code-block:: console
392 EAL: PCI device 0000:05:00.0 on NUMA socket 0
393 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
394 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
395 PMD: librte_pmd_mlx5: 1 port(s) detected
396 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
397 EAL: PCI device 0000:05:00.1 on NUMA socket 0
398 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
399 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
400 PMD: librte_pmd_mlx5: 1 port(s) detected
401 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
402 EAL: PCI device 0000:06:00.0 on NUMA socket 0
403 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
404 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
405 PMD: librte_pmd_mlx5: 1 port(s) detected
406 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
407 EAL: PCI device 0000:06:00.1 on NUMA socket 0
408 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
409 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
410 PMD: librte_pmd_mlx5: 1 port(s) detected
411 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
412 Interactive-mode selected
413 Configuring Port 0 (socket 0)
414 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
415 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
416 Port 0: E4:1D:2D:E7:0C:FE
417 Configuring Port 1 (socket 0)
418 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
419 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
420 Port 1: E4:1D:2D:E7:0C:FF
421 Configuring Port 2 (socket 0)
422 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
423 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
424 Port 2: E4:1D:2D:E7:0C:FA
425 Configuring Port 3 (socket 0)
426 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
427 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
428 Port 3: E4:1D:2D:E7:0C:FB
429 Checking link statuses...
430 Port 0 Link Up - speed 40000 Mbps - full-duplex
431 Port 1 Link Up - speed 40000 Mbps - full-duplex
432 Port 2 Link Up - speed 10000 Mbps - full-duplex
433 Port 3 Link Up - speed 10000 Mbps - full-duplex