1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
8 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
9 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
10 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6DX** and
11 **Mellanox BlueField** families of 10/25/40/50/100/200 Gb/s adapters
12 as well as their virtual functions (VF) in SR-IOV context.
14 Information and documentation about these adapters can be found on the
15 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
16 `Mellanox community <http://community.mellanox.com/welcome>`__.
18 There is also a `section dedicated to this poll mode driver
19 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
23 Due to external dependencies, this driver is disabled in default configuration
24 of the "make" build. It can be enabled with ``CONFIG_RTE_LIBRTE_MLX5_PMD=y``
25 or by using "meson" build system which will detect dependencies.
30 Besides its dependency on libibverbs (that implies libmlx5 and associated
31 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
32 operations such as querying/updating the MTU and flow control parameters.
34 For security reasons and robustness, this driver only deals with virtual
35 memory addresses. The way resources allocations are handled by the kernel,
36 combined with hardware specifications that allow to handle virtual memory
37 addresses directly, ensure that DPDK applications cannot access random
38 physical memory (or memory that does not belong to the current process).
40 This capability allows the PMD to coexist with kernel network interfaces
41 which remain functional, although they stop receiving unicast packets as
42 long as they share the same MAC address.
43 This means legacy linux control tools (for example: ethtool, ifconfig and
44 more) can operate on the same network interfaces that owned by the DPDK
47 The PMD can use libibverbs and libmlx5 to access the device firmware
48 or directly the hardware components.
49 There are different levels of objects and bypassing abilities
50 to get the best performances:
52 - Verbs is a complete high-level generic API
53 - Direct Verbs is a device-specific API
54 - DevX allows to access firmware objects
55 - Direct Rules manages flow steering at low-level hardware layer
57 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
63 - Multi arch support: x86_64, POWER8, ARMv8, i686.
64 - Multiple TX and RX queues.
65 - Support for scattered TX and RX frames.
66 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
67 - RSS using different combinations of fields: L3 only, L4 only or both,
68 and source only, destination only or both.
69 - Several RSS hash keys, one for each flow type.
70 - Default RSS operation with no hash key specification.
71 - Configurable RETA table.
72 - Link flow control (pause frame).
73 - Support for multiple MAC addresses.
77 - RX CRC stripping configuration.
78 - Promiscuous mode on PF and VF.
79 - Multicast promiscuous mode on PF and VF.
80 - Hardware checksum offloads.
81 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
83 - Flow API, including :ref:`flow_isolated_mode`.
85 - KVM and VMware ESX SR-IOV modes are supported.
86 - RSS hash result is supported.
87 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
88 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
90 - Statistics query including Basic, Extended and per queue.
92 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve.
93 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
94 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
95 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
96 - Flow insertion rate of more then million flows per second, when using Direct Rules.
97 - Support for multiple rte_flow groups.
103 - For secondary process:
105 - Forked secondary process not supported.
106 - External memory unregistered in EAL memseg list cannot be used for DMA
107 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
108 primary process and remapped to the same virtual address in secondary
109 process. If the external memory is registered by primary process but has
110 different virtual address in secondary process, unexpected error may happen.
112 - Flow pattern without any specific vlan will match for vlan packets as well:
114 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
115 Meaning, the flow rule::
117 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
119 Will only match vlan packets with vid=3. and the flow rules::
121 flow create 0 ingress pattern eth / ipv4 / end ...
125 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
127 Will match any ipv4 packet (VLAN included).
129 - VLAN pop offload command:
131 - Flow rules having a VLAN pop offload command as one of their actions and
132 are lacking a match on VLAN as one of their items are not supported.
133 - The command is not supported on egress traffic.
135 - VLAN push offload is not supported on ingress traffic.
137 - VLAN set PCP offload is not supported on existing headers.
139 - A multi segment packet must have not more segments than reported by dev_infos_get()
140 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
141 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
142 inline settings) to 58.
144 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
145 to 0 are not supported.
147 - VXLAN TSO and checksum offloads are not supported on VM.
149 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
151 - Match on Geneve header supports the following fields only:
157 Currently, the only supported options length value is 0.
159 - VF: flow rules created on VF devices can only match traffic targeted at the
160 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
164 MAC addresses not already present in the bridge table of the associated
165 kernel network device will be added and cleaned up by the PMD when closing
166 the device. In case of ungraceful program termination, some entries may
167 remain present and should be removed manually by other means.
169 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
170 externally attached to a user-provided mbuf with having EXT_ATTACHED_MBUF in
171 ol_flags. As the mempool for the external buffer is managed by PMD, all the
172 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
173 the external buffers will be freed by PMD and the application which still
174 holds the external buffers may be corrupted.
176 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
177 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
178 supported. Some Rx packets may not have PKT_RX_RSS_HASH.
180 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
181 and allmulticast mode are both set to off.
182 To receive IPv6 Multicast messages on VM, explicitly set the relevant
183 MAC address using rte_eth_dev_mac_addr_add() API.
185 - The amount of descriptors in Tx queue may be limited by data inline settings.
186 Inline data require the more descriptor building blocks and overall block
187 amount may exceed the hardware supported limits. The application should
188 reduce the requested Tx size or adjust data inline settings with
189 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
191 - E-Switch decapsulation Flow:
193 - can be applied to PF port only.
194 - must specify VF port action (packet redirection from PF to VF).
195 - optionally may specify tunnel inner source and destination MAC addresses.
197 - E-Switch encapsulation Flow:
199 - can be applied to VF ports only.
200 - must specify PF port action (packet redirection from VF to PF).
202 - ICMP/ICMP6 code/type matching, IP-in-IP and MPLS flow matching are all
203 mutually exclusive features which cannot be supported together
204 (see :ref:`mlx5_firmware_config`).
208 - Requires DevX and DV flow to be enabled.
209 - KEEP_CRC offload cannot be supported with LRO.
210 - The first mbuf length, without head-room, must be big enough to include the
212 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
213 it with size limited to max LRO size, not to max RX packet length.
218 MLX5 supports various methods to report statistics:
220 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
222 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
224 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
232 These options can be modified in the ``.config`` file.
234 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
236 Toggle compilation of librte_pmd_mlx5 itself.
238 - ``CONFIG_RTE_IBVERBS_LINK_DLOPEN`` (default **n**)
240 Build PMD with additional code to make it loadable without hard
241 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
242 on the target system.
244 In this mode, their presence is still required for it to run properly,
245 however their absence won't prevent a DPDK application from starting (with
246 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
247 missing with ``ldd(1)``.
249 It works by moving these dependencies to a purpose-built rdma-core "glue"
250 plug-in which must either be installed in a directory whose name is based
251 on ``CONFIG_RTE_EAL_PMD_PATH`` suffixed with ``-glue`` if set, or in a
252 standard location for the dynamic linker (e.g. ``/lib``) if left to the
253 default empty string (``""``).
255 This option has no performance impact.
257 - ``CONFIG_RTE_IBVERBS_LINK_STATIC`` (default **n**)
259 Embed static flavor of the dependencies **libibverbs** and **libmlx5**
260 in the PMD shared library or the executable static binary.
262 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
264 Toggle debugging code and stricter compilation flags. Enabling this option
265 adds additional run-time checks and debugging messages at the cost of
270 For BlueField, target should be set to ``arm64-bluefield-linux-gcc``. This
271 will enable ``CONFIG_RTE_LIBRTE_MLX5_PMD`` and set ``RTE_CACHE_LINE_SIZE`` to
272 64. Default armv8a configuration of make build and meson build set it to 128
273 then brings performance degradation.
275 Environment variables
276 ~~~~~~~~~~~~~~~~~~~~~
280 A list of directories in which to search for the rdma-core "glue" plug-in,
281 separated by colons or semi-colons.
283 Only matters when compiled with ``CONFIG_RTE_IBVERBS_LINK_DLOPEN``
284 enabled and most useful when ``CONFIG_RTE_EAL_PMD_PATH`` is also set,
285 since ``LD_LIBRARY_PATH`` has no effect in this case.
287 - ``MLX5_SHUT_UP_BF``
289 Configures HW Tx doorbell register as IO-mapped.
291 By default, the HW Tx doorbell is configured as a write-combining register.
292 The register would be flushed to HW usually when the write-combining buffer
293 becomes full, but it depends on CPU design.
295 Except for vectorized Tx burst routines, a write memory barrier is enforced
296 after updating the register so that the update can be immediately visible to
299 When vectorized Tx burst is called, the barrier is set only if the burst size
300 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
301 variable will bring better latency even though the maximum throughput can
304 Run-time configuration
305 ~~~~~~~~~~~~~~~~~~~~~~
307 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
308 because it is affected by their state. Forcing them down prevents packets
311 - **ethtool** operations on related kernel interfaces also affect the PMD.
313 - ``rxq_cqe_comp_en`` parameter [int]
315 A nonzero value enables the compression of CQE on RX side. This feature
316 allows to save PCI bandwidth and improve performance. Enabled by default.
320 - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
322 - POWER9 and ARMv8 with ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
325 - ``rxq_cqe_pad_en`` parameter [int]
327 A nonzero value enables 128B padding of CQE on RX side. The size of CQE
328 is aligned with the size of a cacheline of the core. If cacheline size is
329 128B, the CQE size is configured to be 128B even though the device writes
330 only 64B data on the cacheline. This is to avoid unnecessary cache
331 invalidation by device's two consecutive writes on to one cacheline.
332 However in some architecture, it is more beneficial to update entire
333 cacheline with padding the rest 64B rather than striding because
334 read-modify-write could drop performance a lot. On the other hand,
335 writing extra data will consume more PCIe bandwidth and could also drop
336 the maximum throughput. It is recommended to empirically set this
337 parameter. Disabled by default.
341 - CPU having 128B cacheline with ConnectX-5 and BlueField.
343 - ``rxq_pkt_pad_en`` parameter [int]
345 A nonzero value enables padding Rx packet to the size of cacheline on PCI
346 transaction. This feature would waste PCI bandwidth but could improve
347 performance by avoiding partial cacheline write which may cause costly
348 read-modify-copy in memory transaction on some architectures. Disabled by
353 - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
355 - POWER8 and ARMv8 with ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
358 - ``mprq_en`` parameter [int]
360 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
361 configured as Multi-Packet RQ if the total number of Rx queues is
362 ``rxqs_min_mprq`` or more and Rx scatter isn't configured. Disabled by
365 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
366 by posting a single large buffer for multiple packets. Instead of posting a
367 buffers per a packet, one large buffer is posted in order to receive multiple
368 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
369 and each stride receives one packet. MPRQ can improve throughput for
370 small-packet traffic.
372 When MPRQ is enabled, max_rx_pkt_len can be larger than the size of
373 user-provided mbuf even if DEV_RX_OFFLOAD_SCATTER isn't enabled. PMD will
374 configure large stride size enough to accommodate max_rx_pkt_len as long as
375 device allows. Note that this can waste system memory compared to enabling Rx
376 scatter and multi-segment packet.
378 - ``mprq_log_stride_num`` parameter [int]
380 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
381 strides can reduce PCIe traffic further. If configured value is not in the
382 range of device capability, the default value will be set with a warning
383 message. The default value is 4 which is 16 strides per a buffer, valid only
384 if ``mprq_en`` is set.
386 The size of Rx queue should be bigger than the number of strides.
388 - ``mprq_max_memcpy_len`` parameter [int]
390 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
391 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
392 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
393 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
394 A mempool for external buffers will be allocated and managed by PMD. If Rx
395 packet is externally attached, ol_flags field of the mbuf will have
396 EXT_ATTACHED_MBUF and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
397 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
399 - ``rxqs_min_mprq`` parameter [int]
401 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
402 greater or equal to this value. The default value is 12, valid only if
405 - ``txq_inline`` parameter [int]
407 Amount of data to be inlined during TX operations. This parameter is
408 deprecated and converted to the new parameter ``txq_inline_max`` providing
409 partial compatibility.
411 - ``txqs_min_inline`` parameter [int]
413 Enable inline data send only when the number of TX queues is greater or equal
416 This option should be used in combination with ``txq_inline_max`` and
417 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
419 If this option is not specified the default value 16 is used for BlueField
420 and 8 for other platforms
422 The data inlining consumes the CPU cycles, so this option is intended to
423 auto enable inline data if we have enough Tx queues, which means we have
424 enough CPU cores and PCI bandwidth is getting more critical and CPU
425 is not supposed to be bottleneck anymore.
427 The copying data into WQE improves latency and can improve PPS performance
428 when PCI back pressure is detected and may be useful for scenarios involving
429 heavy traffic on many queues.
431 Because additional software logic is necessary to handle this mode, this
432 option should be used with care, as it may lower performance when back
433 pressure is not expected.
435 If inline data are enabled it may affect the maximal size of Tx queue in
436 descriptors because the inline data increase the descriptor size and
437 queue size limits supported by hardware may be exceeded.
439 - ``txq_inline_min`` parameter [int]
441 Minimal amount of data to be inlined into WQE during Tx operations. NICs
442 may require this minimal data amount to operate correctly. The exact value
443 may depend on NIC operation mode, requested offloads, etc. It is strongly
444 recommended to omit this parameter and use the default values. Anyway,
445 applications using this parameter should take into consideration that
446 specifying an inconsistent value may prevent the NIC from sending packets.
448 If ``txq_inline_min`` key is present the specified value (may be aligned
449 by the driver in order not to exceed the limits and provide better descriptor
450 space utilization) will be used by the driver and it is guaranteed that
451 requested amount of data bytes are inlined into the WQE beside other inline
452 settings. This key also may update ``txq_inline_max`` value (default
453 or specified explicitly in devargs) to reserve the space for inline data.
455 If ``txq_inline_min`` key is not present, the value may be queried by the
456 driver from the NIC via DevX if this feature is available. If there is no DevX
457 enabled/supported the value 18 (supposing L2 header including VLAN) is set
458 for ConnectX-4 and ConnectX-4LX, and 0 is set by default for ConnectX-5
459 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
462 For ConnectX-4 NIC, driver does not allow specifying value below 18
463 (minimal L2 header, including VLAN), error will be raised.
465 For ConnectX-4LX NIC, it is allowed to specify values below 18, but
466 it is not recommended and may prevent NIC from sending packets over
469 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
470 Multi-Packet Write), because last one does not support partial packet inlining.
471 This is not very critical due to minimal data inlining is mostly required
472 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
474 - ``txq_inline_max`` parameter [int]
476 Specifies the maximal packet length to be completely inlined into WQE
477 Ethernet Segment for ordinary SEND method. If packet is larger than specified
478 value, the packet data won't be copied by the driver at all, data buffer
479 is addressed with a pointer. If packet length is less or equal all packet
480 data will be copied into WQE. This may improve PCI bandwidth utilization for
481 short packets significantly but requires the extra CPU cycles.
483 The data inline feature is controlled by number of Tx queues, if number of Tx
484 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
485 is engaged, if there are not enough Tx queues (which means not enough CPU cores
486 and CPU resources are scarce), data inline is not performed by the driver.
487 Assigning ``txqs_min_inline`` with zero always enables the data inline.
489 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
490 by the driver in order not to exceed the limit (930 bytes) and to provide better
491 WQE space filling without gaps, the adjustment is reflected in the debug log.
492 Also, the default value (290) may be decreased in run-time if the large transmit
493 queue size is requested and hardware does not support enough descriptor
494 amount, in this case warning is emitted. If ``txq_inline_max`` key is
495 specified and requested inline settings can not be satisfied then error
498 - ``txq_inline_mpw`` parameter [int]
500 Specifies the maximal packet length to be completely inlined into WQE for
501 Enhanced MPW method. If packet is large the specified value, the packet data
502 won't be copied, and data buffer is addressed with pointer. If packet length
503 is less or equal, all packet data will be copied into WQE. This may improve PCI
504 bandwidth utilization for short packets significantly but requires the extra
507 The data inline feature is controlled by number of TX queues, if number of Tx
508 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
509 is engaged, if there are not enough Tx queues (which means not enough CPU cores
510 and CPU resources are scarce), data inline is not performed by the driver.
511 Assigning ``txqs_min_inline`` with zero always enables the data inline.
513 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
514 by the driver in order not to exceed the limit (930 bytes) and to provide better
515 WQE space filling without gaps, the adjustment is reflected in the debug log.
516 Due to multiple packets may be included to the same WQE with Enhanced Multi
517 Packet Write Method and overall WQE size is limited it is not recommended to
518 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
519 may be decreased in run-time if the large transmit queue size is requested
520 and hardware does not support enough descriptor amount, in this case warning
521 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
522 settings can not be satisfied then error will be raised.
524 - ``txqs_max_vec`` parameter [int]
526 Enable vectorized Tx only when the number of TX queues is less than or
527 equal to this value. This parameter is deprecated and ignored, kept
528 for compatibility issue to not prevent driver from probing.
530 - ``txq_mpw_hdr_dseg_en`` parameter [int]
532 A nonzero value enables including two pointers in the first block of TX
533 descriptor. The parameter is deprecated and ignored, kept for compatibility
536 - ``txq_max_inline_len`` parameter [int]
538 Maximum size of packet to be inlined. This limits the size of packet to
539 be inlined. If the size of a packet is larger than configured value, the
540 packet isn't inlined even though there's enough space remained in the
541 descriptor. Instead, the packet is included with pointer. This parameter
542 is deprecated and converted directly to ``txq_inline_mpw`` providing full
543 compatibility. Valid only if eMPW feature is engaged.
545 - ``txq_mpw_en`` parameter [int]
547 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
548 ConnectX-6, ConnectX-6 DX and BlueField. eMPW allows the TX burst function to pack
549 up multiple packets in a single descriptor session in order to save PCI bandwidth
550 and improve performance at the cost of a slightly higher CPU usage. When
551 ``txq_inline_mpw`` is set along with ``txq_mpw_en``, TX burst function copies
552 entire packet data on to TX descriptor instead of including pointer of packet.
554 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
555 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
556 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
557 option or reported by the NIC, the eMPW feature is disengaged.
559 - ``tx_db_nc`` parameter [int]
561 The rdma core library can map doorbell register in two ways, depending on the
562 environment variable "MLX5_SHUT_UP_BF":
564 - As regular cached memory, if the variable is either missing or set to zero.
565 - As non-cached memory, if the variable is present and set to not "0" value.
567 The type of mapping may slightly affect the Tx performance, the optimal choice
568 is strongly relied on the host architecture and should be deduced practically.
570 If ``tx_db_nc`` is set to zero, the doorbell is forced to be mapped to regular
571 memory, the PMD will perform the extra write memory barrier after writing to
572 doorbell, it might increase the needed CPU clocks per packet to send, but
573 latency might be improved.
575 If ``tx_db_nc`` is set to one, the doorbell is forced to be mapped to non
576 cached memory, the PMD will not perform the extra write memory barrier
577 after writing to doorbell, on some architectures it might improve the
580 If ``tx_db_nc`` is set to two, the doorbell is forced to be mapped to regular
581 memory, the PMD will use heuristics to decide whether write memory barrier
582 should be performed. For bursts with size multiple of recommended one (64 pkts)
583 it is supposed the next burst is coming and no need to issue the extra memory
584 barrier (it is supposed to be issued in the next coming burst, at least after
585 descriptor writing). It might increase latency (on some hosts till next
586 packets transmit) and should be used with care.
588 If ``tx_db_nc`` is omitted or set to zero, the preset (if any) environment
589 variable "MLX5_SHUT_UP_BF" value is used. If there is no "MLX5_SHUT_UP_BF",
590 the default ``tx_db_nc`` value is zero for ARM64 hosts and one for others.
592 - ``tx_vec_en`` parameter [int]
594 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 DX
595 and BlueField NICs if the number of global Tx queues on the port is less than
596 ``txqs_max_vec``. The parameter is deprecated and ignored.
598 - ``rx_vec_en`` parameter [int]
600 A nonzero value enables Rx vector if the port is not configured in
601 multi-segment otherwise this parameter is ignored.
605 - ``vf_nl_en`` parameter [int]
607 A nonzero value enables Netlink requests from the VF to add/remove MAC
608 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
609 Otherwise the relevant configuration must be run with Linux iproute2 tools.
610 This is a prerequisite to receive this kind of traffic.
612 Enabled by default, valid only on VF devices ignored otherwise.
614 - ``l3_vxlan_en`` parameter [int]
616 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
617 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
618 parameter. This is a prerequisite to receive this kind of traffic.
622 - ``dv_xmeta_en`` parameter [int]
624 A nonzero value enables extensive flow metadata support if device is
625 capable and driver supports it. This can enable extensive support of
626 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
627 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
629 There are some possible configurations, depending on parameter value:
631 - 0, this is default value, defines the legacy mode, the ``MARK`` and
632 ``META`` related actions and items operate only within NIC Tx and
633 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
634 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
635 item is 32 bits wide and match supported on egress only.
637 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
638 related actions and items operate within all supported steering domains,
639 including FDB, ``MARK`` and ``META`` information may cross the domain
640 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
641 depends on kernel and firmware configurations and might be 0, 16 or
642 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
643 compatibility, the actual width of data transferred to the FDB domain
644 depends on kernel configuration and may be vary. The actual supported
645 width can be retrieved in runtime by series of rte_flow_validate()
648 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
649 related actions and items operate within all supported steering domains,
650 including FDB, ``MARK`` and ``META`` information may cross the domain
651 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
652 depends on kernel and firmware configurations and might be 0, 16 or
653 24 bits. The actual supported width can be retrieved in runtime by
654 series of rte_flow_validate() trials.
656 +------+-----------+-----------+-------------+-------------+
657 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
658 +======+===========+===========+=============+=============+
659 | 0 | 24 bits | 32 bits | 32 bits | no |
660 +------+-----------+-----------+-------------+-------------+
661 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
662 +------+-----------+-----------+-------------+-------------+
663 | 2 | vary 0-32 | 32 bits | 32 bits | yes |
664 +------+-----------+-----------+-------------+-------------+
666 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
667 ignored and the device is configured to operate in legacy mode (0).
669 Disabled by default (set to 0).
671 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
672 of the extensive metadata features. The legacy Verbs supports FLAG and
673 MARK metadata actions over NIC Rx steering domain only.
675 - ``dv_flow_en`` parameter [int]
677 A nonzero value enables the DV flow steering assuming it is supported
678 by the driver (RDMA Core library version is rdma-core-24.0 or higher).
680 Enabled by default if supported.
682 - ``dv_esw_en`` parameter [int]
684 A nonzero value enables E-Switch using Direct Rules.
686 Enabled by default if supported.
688 - ``mr_ext_memseg_en`` parameter [int]
690 A nonzero value enables extending memseg when registering DMA memory. If
691 enabled, the number of entries in MR (Memory Region) lookup table on datapath
692 is minimized and it benefits performance. On the other hand, it worsens memory
693 utilization because registered memory is pinned by kernel driver. Even if a
694 page in the extended chunk is freed, that doesn't become reusable until the
695 entire memory is freed.
699 - ``representor`` parameter [list]
701 This parameter can be used to instantiate DPDK Ethernet devices from
702 existing port (or VF) representors configured on the device.
704 It is a standard parameter whose format is described in
705 :ref:`ethernet_device_standard_device_arguments`.
707 For instance, to probe port representors 0 through 2::
711 - ``max_dump_files_num`` parameter [int]
713 The maximum number of files per PMD entity that may be created for debug information.
714 The files will be created in /var/log directory or in current directory.
716 set to 128 by default.
718 - ``lro_timeout_usec`` parameter [int]
720 The maximum allowed duration of an LRO session, in micro-seconds.
721 PMD will set the nearest value supported by HW, which is not bigger than
722 the input ``lro_timeout_usec`` value.
723 If this parameter is not specified, by default PMD will set
724 the smallest value supported by HW.
726 .. _mlx5_firmware_config:
728 Firmware configuration
729 ~~~~~~~~~~~~~~~~~~~~~~
731 Firmware features can be configured as key/value pairs.
733 The command to set a value is::
735 mlxconfig -d <device> set <key>=<value>
737 The command to query a value is::
739 mlxconfig -d <device> query | grep <key>
741 The device name for the command ``mlxconfig`` can be either the PCI address,
742 or the mst device name found with::
746 Below are some firmware configurations listed.
752 value: 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
758 - maximum number of SR-IOV virtual functions::
762 - enable DevX (required by Direct Rules and other features)::
766 - aggressive CQE zipping::
770 - L3 VXLAN and VXLAN-GPE destination UDP port::
773 IP_OVER_VXLAN_PORT=<udp dport>
775 - enable IP-in-IP tunnel flow matching::
777 FLEX_PARSER_PROFILE_ENABLE=0
779 - enable MPLS flow matching::
781 FLEX_PARSER_PROFILE_ENABLE=1
783 - enable ICMP/ICMP6 code/type fields matching::
785 FLEX_PARSER_PROFILE_ENABLE=2
787 - enable Geneve flow matching::
789 FLEX_PARSER_PROFILE_ENABLE=0
794 This driver relies on external libraries and kernel drivers for resources
795 allocations and initialization. The following dependencies are not part of
796 DPDK and must be installed separately:
800 User space Verbs framework used by librte_pmd_mlx5. This library provides
801 a generic interface between the kernel and low-level user space drivers
804 It allows slow and privileged operations (context initialization, hardware
805 resources allocations) to be managed by the kernel and fast operations to
806 never leave user space.
810 Low-level user space driver library for Mellanox
811 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices, it is automatically loaded
814 This library basically implements send/receive calls to the hardware
819 They provide the kernel-side Verbs API and low level device drivers that
820 manage actual hardware initialization and resources sharing with user
823 Unlike most other PMDs, these modules must remain loaded and bound to
826 - mlx5_core: hardware driver managing Mellanox
827 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices and related Ethernet kernel
829 - mlx5_ib: InifiniBand device driver.
830 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
832 - **Firmware update**
834 Mellanox OFED/EN releases include firmware updates for
835 ConnectX-4/ConnectX-5/ConnectX-6/BlueField adapters.
837 Because each release provides new features, these updates must be applied to
838 match the kernel modules and libraries they come with.
842 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
848 Either RDMA Core library with a recent enough Linux kernel release
849 (recommended) or Mellanox OFED/EN, which provides compatibility with older
852 RDMA Core with Linux Kernel
853 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
855 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
856 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
857 (see `RDMA Core installation documentation`_)
858 - When building for i686 use:
860 - rdma-core version 18.0 or above built with 32bit support.
861 - Kernel version 4.14.41 or above.
863 - Starting with rdma-core v21, static libraries can be built::
866 CFLAGS=-fPIC cmake -DIN_PLACE=1 -DENABLE_STATIC=1 -GNinja ..
869 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
870 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
872 If rdma-core libraries are built but not installed, DPDK makefile can link them,
873 thanks to these environment variables:
875 - ``EXTRA_CFLAGS=-I/path/to/rdma-core/build/include``
876 - ``EXTRA_LDFLAGS=-L/path/to/rdma-core/build/lib``
877 - ``PKG_CONFIG_PATH=/path/to/rdma-core/build/lib/pkgconfig``
882 - Mellanox OFED version: ** 4.5, 4.6** /
883 Mellanox EN version: **4.5, 4.6**
886 - ConnectX-4: **12.21.1000** and above.
887 - ConnectX-4 Lx: **14.21.1000** and above.
888 - ConnectX-5: **16.21.1000** and above.
889 - ConnectX-5 Ex: **16.21.1000** and above.
890 - ConnectX-6: **20.99.5374** and above.
891 - ConnectX-6 DX: **22.27.0090** and above.
892 - BlueField: **18.25.1010** and above.
894 While these libraries and kernel modules are available on OpenFabrics
895 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
896 managers on most distributions, this PMD requires Ethernet extensions that
897 may not be supported at the moment (this is a work in progress).
900 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__ and
902 <http://www.mellanox.com/page/products_dyn?product_family=27&mtag=linux>`__
903 include the necessary support and should be used in the meantime. For DPDK,
904 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
905 required from that distribution.
909 Several versions of Mellanox OFED/EN are available. Installing the version
910 this DPDK release was developed and tested against is strongly
911 recommended. Please check the `prerequisites`_.
916 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
917 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
918 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
919 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
920 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
921 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
922 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
923 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
924 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
925 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
926 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
927 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
928 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
929 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
930 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
931 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
932 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
933 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
934 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
935 * Mellanox(R) ConnectX(R)-6 200G MCX654106A-HCAT (4x200G)
936 * Mellanox(R) ConnectX(R)-6DX EN 100G MCX623106AN-CDAT (2*100g)
937 * Mellanox(R) ConnectX(R)-6DX EN 200G MCX623105AN-VDAT (1*200g)
939 Quick Start Guide on OFED/EN
940 ----------------------------
942 1. Download latest Mellanox OFED/EN. For more info check the `prerequisites`_.
945 2. Install the required libraries and kernel modules either by installing
946 only the required set, or by installing the entire Mellanox OFED/EN::
948 ./mlnxofedinstall --upstream-libs --dpdk
950 3. Verify the firmware is the correct one::
954 4. Verify all ports links are set to Ethernet::
956 mlxconfig -d <mst device> query | grep LINK_TYPE
960 Link types may have to be configured to Ethernet::
962 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
964 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
966 For hypervisors, verify SR-IOV is enabled on the NIC::
968 mlxconfig -d <mst device> query | grep SRIOV_EN
971 If needed, configure SR-IOV::
973 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
974 mlxfwreset -d <mst device> reset
976 5. Restart the driver::
978 /etc/init.d/openibd restart
982 service openibd restart
984 If link type was changed, firmware must be reset as well::
986 mlxfwreset -d <mst device> reset
988 For hypervisors, after reset write the sysfs number of virtual functions
991 To dynamically instantiate a given number of virtual functions (VFs)::
993 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
995 6. Compile DPDK and you are ready to go. See instructions on
996 :ref:`Development Kit Build System <Development_Kit_Build_System>`
998 Enable switchdev mode
999 ---------------------
1001 Switchdev mode is a mode in E-Switch, that binds between representor and VF.
1002 Representor is a port in DPDK that is connected to a VF in such a way
1003 that assuming there are no offload flows, each packet that is sent from the VF
1004 will be received by the corresponding representor. While each packet that is
1005 sent to a representor will be received by the VF.
1006 This is very useful in case of SRIOV mode, where the first packet that is sent
1007 by the VF will be received by the DPDK application which will decide if this
1008 flow should be offloaded to the E-Switch. After offloading the flow packet
1009 that the VF that are matching the flow will not be received any more by
1010 the DPDK application.
1012 1. Enable SRIOV mode::
1014 mlxconfig -d <mst device> set SRIOV_EN=true
1016 2. Configure the max number of VFs::
1018 mlxconfig -d <mst device> set NUM_OF_VFS=<num of vfs>
1022 mlxfwreset -d <mst device> reset
1024 3. Configure the actual number of VFs::
1026 echo <num of vfs > /sys/class/net/<net device>/device/sriov_numvfs
1028 4. Unbind the device (can be rebind after the switchdev mode)::
1030 echo -n "<device pci address" > /sys/bus/pci/drivers/mlx5_core/unbind
1032 5. Enbale switchdev mode::
1034 echo switchdev > /sys/class/net/<net device>/compat/devlink/mode
1039 1. Configure aggressive CQE Zipping for maximum performance::
1041 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1043 To set it back to the default CQE Zipping mode use::
1045 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1047 2. In case of virtualization:
1049 - Make sure that hypervisor kernel is 3.16 or newer.
1050 - Configure boot with ``iommu=pt``.
1051 - Use 1G huge pages.
1052 - Make sure to allocate a VM on huge pages.
1053 - Make sure to set CPU pinning.
1055 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1056 for better performance. For VMs, verify that the right CPU
1057 and NUMA node are pinned according to the above. Run::
1061 to identify the NUMA node to which the PCIe adapter is connected.
1063 4. If more than one adapter is used, and root complex capabilities allow
1064 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1065 it is recommended to locate both adapters on the same NUMA node.
1066 This in order to forward packets from one to the other without
1067 NUMA performance penalty.
1069 5. Disable pause frames::
1071 ethtool -A <netdev> rx off tx off
1073 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1074 via the BIOS configuration. Please contact you server provider for more
1075 information about the settings.
1079 On some machines, depends on the machine integrator, it is beneficial
1080 to set the PCI max read request parameter to 1K. This can be
1081 done in the following way:
1083 To query the read request size use::
1085 setpci -s <NIC PCI address> 68.w
1087 If the output is different than 3XXX, set it by::
1089 setpci -s <NIC PCI address> 68.w=3XXX
1091 The XXX can be different on different systems. Make sure to configure
1092 according to the setpci output.
1094 7. To minimize overhead of searching Memory Regions:
1096 - '--socket-mem' is recommended to pin memory by predictable amount.
1097 - Configure per-lcore cache when creating Mempools for packet buffer.
1098 - Refrain from dynamically allocating/freeing memory in run-time.
1100 .. _mlx5_offloads_support:
1102 Supported hardware offloads
1103 ---------------------------
1105 .. table:: Minimal SW/HW versions for queue offloads
1107 ============== ===== ===== ========= ===== ========== ==========
1108 Offload DPDK Linux rdma-core OFED firmware hardware
1109 ============== ===== ===== ========= ===== ========== ==========
1110 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1111 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1112 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1113 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1114 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1115 ============== ===== ===== ========= ===== ========== ==========
1117 .. table:: Minimal SW/HW versions for rte_flow offloads
1119 +-----------------------+-----------------+-----------------+
1120 | Offload | with E-Switch | with NIC |
1121 +=======================+=================+=================+
1122 | Count | | DPDK 19.05 | | DPDK 19.02 |
1123 | | | OFED 4.6 | | OFED 4.6 |
1124 | | | rdma-core 24 | | rdma-core 23 |
1125 | | | ConnectX-5 | | ConnectX-5 |
1126 +-----------------------+-----------------+-----------------+
1127 | Drop | | DPDK 19.05 | | DPDK 18.11 |
1128 | | | OFED 4.6 | | OFED 4.5 |
1129 | | | rdma-core 24 | | rdma-core 23 |
1130 | | | ConnectX-5 | | ConnectX-4 |
1131 +-----------------------+-----------------+-----------------+
1132 | Queue / RSS | | | | DPDK 18.11 |
1133 | | | N/A | | OFED 4.5 |
1134 | | | | | rdma-core 23 |
1135 | | | | | ConnectX-4 |
1136 +-----------------------+-----------------+-----------------+
1137 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1138 | (VXLAN / NVGRE / RAW) | | OFED 4.7-1 | | OFED 4.6 |
1139 | | | rdma-core 24 | | rdma-core 23 |
1140 | | | ConnectX-5 | | ConnectX-5 |
1141 +-----------------------+-----------------+-----------------+
1142 | Encapsulation | | DPDK 19.11 | | DPDK 19.11 |
1143 | GENEVE | | OFED 4.7-3 | | OFED 4.7-3 |
1144 | | | rdma-core 27 | | rdma-core 27 |
1145 | | | ConnectX-5 | | ConnectX-5 |
1146 +-----------------------+-----------------+-----------------+
1147 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1148 | | (set_ipv4_src / | | OFED 4.7-1 | | OFED 4.7-1 |
1149 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 24 |
1150 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1151 | | set_ipv6_dst / | | | | |
1152 | | set_tp_src / | | | | |
1153 | | set_tp_dst / | | | | |
1154 | | dec_ttl / | | | | |
1155 | | set_ttl / | | | | |
1156 | | set_mac_src / | | | | |
1157 | | set_mac_dst) | | | | |
1159 | | (of_set_vlan_vid) | | DPDK 19.11 | | DPDK 19.11 |
1160 | | | OFED 4.7-1 | | OFED 4.7-1 |
1161 | | | ConnectX-5 | | ConnectX-5 |
1162 +-----------------------+-----------------+-----------------+
1163 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1164 | | | OFED 4.7-1 | | OFED 4.7-1 |
1165 | | | rdma-core 24 | | N/A |
1166 | | | ConnectX-5 | | ConnectX-5 |
1167 +-----------------------+-----------------+-----------------+
1168 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1169 | | | OFED 4.6 | | OFED 4.5 |
1170 | | | rdma-core 24 | | rdma-core 23 |
1171 | | | ConnectX-5 | | ConnectX-4 |
1172 +-----------------------+-----------------+-----------------+
1173 | Port ID | | DPDK 19.05 | | N/A |
1174 | | | OFED 4.7-1 | | N/A |
1175 | | | rdma-core 24 | | N/A |
1176 | | | ConnectX-5 | | N/A |
1177 +-----------------------+-----------------+-----------------+
1178 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1179 | | (of_pop_vlan / | | OFED 4.7-1 | | OFED 4.7-1 |
1180 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1181 | | of_set_vlan_pcp / | | |
1182 | | of_set_vlan_vid) | | |
1183 +-----------------------+-----------------+-----------------+
1184 | Hairpin | | | | DPDK 19.11 |
1185 | | | N/A | | OFED 4.7-3 |
1186 | | | | | rdma-core 26 |
1187 | | | | | ConnectX-5 |
1188 +-----------------------+-----------------+-----------------+
1189 | Meta data | | DPDK 19.11 | | DPDK 19.11 |
1190 | | | OFED 4.7-3 | | OFED 4.7-3 |
1191 | | | rdma-core 26 | | rdma-core 26 |
1192 | | | ConnectX-5 | | ConnectX-5 |
1193 +-----------------------+-----------------+-----------------+
1194 | Metering | | DPDK 19.11 | | DPDK 19.11 |
1195 | | | OFED 4.7-3 | | OFED 4.7-3 |
1196 | | | rdma-core 26 | | rdma-core 26 |
1197 | | | ConnectX-5 | | ConnectX-5 |
1198 +-----------------------+-----------------+-----------------+
1203 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
1204 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
1206 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1207 command-line parameter to enable additional protocols (UDP and TCP as well
1208 as IP), the following commands must be entered from its CLI to get the same
1209 behavior as librte_pmd_mlx4::
1212 > port config all rss all
1218 This section demonstrates how to launch **testpmd** with Mellanox
1219 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_pmd_mlx5.
1221 #. Load the kernel modules::
1223 modprobe -a ib_uverbs mlx5_core mlx5_ib
1225 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1228 /etc/init.d/openibd restart
1232 User space I/O kernel modules (uio and igb_uio) are not used and do
1233 not have to be loaded.
1235 #. Make sure Ethernet interfaces are in working order and linked to kernel
1236 verbs. Related sysfs entries should be present::
1238 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1247 #. Optionally, retrieve their PCI bus addresses for whitelisting::
1250 for intf in eth2 eth3 eth4 eth5;
1252 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1255 sed -n 's,.*/\(.*\),-w \1,p'
1264 #. Request huge pages::
1266 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
1268 #. Start testpmd with basic parameters::
1270 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
1275 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1276 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1277 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1278 PMD: librte_pmd_mlx5: 1 port(s) detected
1279 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1280 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1281 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1282 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1283 PMD: librte_pmd_mlx5: 1 port(s) detected
1284 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1285 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1286 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1287 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
1288 PMD: librte_pmd_mlx5: 1 port(s) detected
1289 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
1290 EAL: PCI device 0000:06:00.1 on NUMA socket 0
1291 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1292 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
1293 PMD: librte_pmd_mlx5: 1 port(s) detected
1294 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
1295 Interactive-mode selected
1296 Configuring Port 0 (socket 0)
1297 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
1298 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
1299 Port 0: E4:1D:2D:E7:0C:FE
1300 Configuring Port 1 (socket 0)
1301 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
1302 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
1303 Port 1: E4:1D:2D:E7:0C:FF
1304 Configuring Port 2 (socket 0)
1305 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
1306 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
1307 Port 2: E4:1D:2D:E7:0C:FA
1308 Configuring Port 3 (socket 0)
1309 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
1310 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
1311 Port 3: E4:1D:2D:E7:0C:FB
1312 Checking link statuses...
1313 Port 0 Link Up - speed 40000 Mbps - full-duplex
1314 Port 1 Link Up - speed 40000 Mbps - full-duplex
1315 Port 2 Link Up - speed 10000 Mbps - full-duplex
1316 Port 3 Link Up - speed 10000 Mbps - full-duplex