1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
5 .. include:: <isonum.txt>
10 The MLX5 poll mode driver library (**librte_net_mlx5**) provides support
11 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
12 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6 Dx**, **Mellanox
13 ConnectX-6 Lx**, **Mellanox BlueField** and **Mellanox BlueField-2** families
14 of 10/25/40/50/100/200 Gb/s adapters as well as their virtual functions (VF)
17 Information and documentation about these adapters can be found on the
18 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
19 `Mellanox community <http://community.mellanox.com/welcome>`__.
21 There is also a `section dedicated to this poll mode driver
22 <https://developer.nvidia.com/networking/dpdk>`_.
28 Besides its dependency on libibverbs (that implies libmlx5 and associated
29 kernel support), librte_net_mlx5 relies heavily on system calls for control
30 operations such as querying/updating the MTU and flow control parameters.
32 For security reasons and robustness, this driver only deals with virtual
33 memory addresses. The way resources allocations are handled by the kernel,
34 combined with hardware specifications that allow to handle virtual memory
35 addresses directly, ensure that DPDK applications cannot access random
36 physical memory (or memory that does not belong to the current process).
38 This capability allows the PMD to coexist with kernel network interfaces
39 which remain functional, although they stop receiving unicast packets as
40 long as they share the same MAC address.
41 This means legacy linux control tools (for example: ethtool, ifconfig and
42 more) can operate on the same network interfaces that owned by the DPDK
45 The PMD can use libibverbs and libmlx5 to access the device firmware
46 or directly the hardware components.
47 There are different levels of objects and bypassing abilities
48 to get the best performances:
50 - Verbs is a complete high-level generic API
51 - Direct Verbs is a device-specific API
52 - DevX allows to access firmware objects
53 - Direct Rules manages flow steering at low-level hardware layer
55 Enabling librte_net_mlx5 causes DPDK applications to be linked against
61 - Multi arch support: x86_64, POWER8, ARMv8, i686.
62 - Multiple TX and RX queues.
64 - Rx queue delay drop.
65 - Support for scattered TX frames.
66 - Advanced support for scattered Rx frames with tunable buffer attributes.
67 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
68 - RSS using different combinations of fields: L3 only, L4 only or both,
69 and source only, destination only or both.
70 - Several RSS hash keys, one for each flow type.
71 - Default RSS operation with no hash key specification.
72 - Configurable RETA table.
73 - Link flow control (pause frame).
74 - Support for multiple MAC addresses.
78 - RX CRC stripping configuration.
79 - TX mbuf fast free offload.
80 - Promiscuous mode on PF and VF.
81 - Multicast promiscuous mode on PF and VF.
82 - Hardware checksum offloads.
83 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
85 - Flow API, including :ref:`flow_isolated_mode`.
87 - KVM and VMware ESX SR-IOV modes are supported.
88 - RSS hash result is supported.
89 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
90 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
92 - Statistics query including Basic, Extended and per queue.
94 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve, GTP.
95 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
96 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
97 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
98 - Flow insertion rate of more then million flows per second, when using Direct Rules.
99 - Support for multiple rte_flow groups.
100 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
103 - Multiple-thread flow insertion.
104 - Matching on IPv4 Internet Header Length (IHL).
105 - Matching on GTP extension header with raw encap/decap action.
106 - Matching on Geneve TLV option header with raw encap/decap action.
107 - RSS support in sample action.
108 - E-Switch mirroring and jump.
109 - E-Switch mirroring and modify.
110 - 21844 flow priorities for ingress or egress flow groups greater than 0 and for any transfer
112 - Flow metering, including meter policy API.
113 - Flow meter hierarchy.
114 - Flow integrity offload API.
115 - Connection tracking.
116 - Sub-Function representors.
125 On Windows, the features are limited:
127 - Promiscuous mode is not supported
128 - The following rules are supported:
130 - IPv4/UDP with CVLAN filtering
131 - Unicast MAC filtering
133 - Additional rules are supported from WinOF2 version 2.70:
135 - IPv4/TCP with CVLAN filtering
136 - L4 steering rules for port RSS of UDP, TCP and IP
138 - For secondary process:
140 - Forked secondary process not supported.
141 - MPRQ is not supported. Callback to free externally attached MPRQ buffer is set
142 in a primary process, but has a different virtual address in a secondary process.
143 Calling a function at the wrong address leads to a segmentation fault.
144 - External memory unregistered in EAL memseg list cannot be used for DMA
145 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
146 primary process and remapped to the same virtual address in secondary
147 process. If the external memory is registered by primary process but has
148 different virtual address in secondary process, unexpected error may happen.
152 - Counters of received packets and bytes number of devices in same share group are same.
153 - Counters of received packets and bytes number of queues in same group and queue ID are same.
155 - When using Verbs flow engine (``dv_flow_en`` = 0), flow pattern without any
156 specific VLAN will match for VLAN packets as well:
158 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
159 Meaning, the flow rule::
161 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
163 Will only match vlan packets with vid=3. and the flow rule::
165 flow create 0 ingress pattern eth / ipv4 / end ...
167 Will match any ipv4 packet (VLAN included).
169 - When using Verbs flow engine (``dv_flow_en`` = 0), multi-tagged(QinQ) match is not supported.
171 - When using DV flow engine (``dv_flow_en`` = 1), flow pattern with any VLAN specification will match only single-tagged packets unless the ETH item ``type`` field is 0x88A8 or the VLAN item ``has_more_vlan`` field is 1.
174 flow create 0 ingress pattern eth / ipv4 / end ...
176 Will match any ipv4 packet.
179 flow create 0 ingress pattern eth / vlan / end ...
180 flow create 0 ingress pattern eth has_vlan is 1 / end ...
181 flow create 0 ingress pattern eth type is 0x8100 / end ...
183 Will match single-tagged packets only, with any VLAN ID value.
186 flow create 0 ingress pattern eth type is 0x88A8 / end ...
187 flow create 0 ingress pattern eth / vlan has_more_vlan is 1 / end ...
189 Will match multi-tagged packets only, with any VLAN ID value.
191 - A flow pattern with 2 sequential VLAN items is not supported.
193 - VLAN pop offload command:
195 - Flow rules having a VLAN pop offload command as one of their actions and
196 are lacking a match on VLAN as one of their items are not supported.
197 - The command is not supported on egress traffic in NIC mode.
199 - VLAN push offload is not supported on ingress traffic in NIC mode.
201 - VLAN set PCP offload is not supported on existing headers.
203 - A multi segment packet must have not more segments than reported by dev_infos_get()
204 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
205 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
206 inline settings) to 58.
208 - Match on VXLAN supports the following fields only:
211 - Last reserved 8-bits
213 Last reserved 8-bits matching is only supported When using DV flow
214 engine (``dv_flow_en`` = 1).
215 For ConnectX-5, the UDP destination port must be the standard one (4789).
216 Group zero's behavior may differ which depends on FW.
217 Matching value equals 0 (value & mask) is not supported.
219 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
221 - Match on Geneve header supports the following fields only:
228 - Match on Geneve TLV option is supported on the following fields:
235 Only one Class/Type/Length Geneve TLV option is supported per shared device.
236 Class/Type/Length fields must be specified as well as masks.
237 Class/Type/Length specified masks must be full.
238 Matching Geneve TLV option without specifying data is not supported.
239 Matching Geneve TLV option with ``data & mask == 0`` is not supported.
241 - VF: flow rules created on VF devices can only match traffic targeted at the
242 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
244 - Match on GTP tunnel header item supports the following fields only:
246 - v_pt_rsv_flags: E flag, S flag, PN flag
250 - Match on GTP extension header only for GTP PDU session container (next
251 extension header type = 0x85).
252 - Match on GTP extension header is not supported in group 0.
256 - Hardware support: BlueField 2.
257 - Flex item is supported on PF only.
258 - Hardware limits ``header_length_mask_width`` up to 6 bits.
259 - Firmware supports 8 global sample fields.
260 Each flex item allocates non-shared sample fields from that pool.
261 - Supported flex item can have 1 input link - ``eth`` or ``udp``
262 and up to 2 output links - ``ipv4`` or ``ipv6``.
263 - Flex item fields (``next_header``, ``next_protocol``, ``samples``)
264 do not participate in RSS hash functions.
265 - In flex item configuration, ``next_header.field_base`` value
266 must be byte aligned (multiple of 8).
268 - No Tx metadata go to the E-Switch steering domain for the Flow group 0.
269 The flows within group 0 and set metadata action are rejected by hardware.
273 MAC addresses not already present in the bridge table of the associated
274 kernel network device will be added and cleaned up by the PMD when closing
275 the device. In case of ungraceful program termination, some entries may
276 remain present and should be removed manually by other means.
278 - Buffer split offload is supported with regular Rx burst routine only,
279 no MPRQ feature or vectorized code can be engaged.
281 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
282 externally attached to a user-provided mbuf with having RTE_MBUF_F_EXTERNAL in
283 ol_flags. As the mempool for the external buffer is managed by PMD, all the
284 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
285 the external buffers will be freed by PMD and the application which still
286 holds the external buffers may be corrupted.
288 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
289 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
290 supported. Some Rx packets may not have RTE_MBUF_F_RX_RSS_HASH.
292 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
293 and allmulticast mode are both set to off.
294 To receive IPv6 Multicast messages on VM, explicitly set the relevant
295 MAC address using rte_eth_dev_mac_addr_add() API.
297 - To support a mixed traffic pattern (some buffers from local host memory, some
298 buffers from other devices) with high bandwidth, a mbuf flag is used.
300 An application hints the PMD whether or not it should try to inline the
301 given mbuf data buffer. PMD should do the best effort to act upon this request.
303 The hint flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE`` is dynamic,
304 registered by application with rte_mbuf_dynflag_register(). This flag is
305 purely driver-specific and declared in PMD specific header ``rte_pmd_mlx5.h``,
306 which is intended to be used by the application.
308 To query the supported specific flags in runtime,
309 the function ``rte_pmd_mlx5_get_dyn_flag_names`` returns the array of
310 currently (over present hardware and configuration) supported specific flags.
311 The "not inline hint" feature operating flow is the following one:
314 - probe the devices, ports are created
315 - query the port capabilities
316 - if port supporting the feature is found
317 - register dynamic flag ``RTE_PMD_MLX5_FINE_GRANULARITY_INLINE``
318 - application starts the ports
319 - on ``dev_start()`` PMD checks whether the feature flag is registered and
320 enables the feature support in datapath
321 - application might set the registered flag bit in ``ol_flags`` field
322 of mbuf being sent and PMD will handle ones appropriately.
324 - The amount of descriptors in Tx queue may be limited by data inline settings.
325 Inline data require the more descriptor building blocks and overall block
326 amount may exceed the hardware supported limits. The application should
327 reduce the requested Tx size or adjust data inline settings with
328 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
330 - To provide the packet send scheduling on mbuf timestamps the ``tx_pp``
331 parameter should be specified.
332 When PMD sees the RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME set on the packet
333 being sent it tries to synchronize the time of packet appearing on
334 the wire with the specified packet timestamp. It the specified one
335 is in the past it should be ignored, if one is in the distant future
336 it should be capped with some reasonable value (in range of seconds).
337 These specific cases ("too late" and "distant future") can be optionally
338 reported via device xstats to assist applications to detect the
339 time-related problems.
341 The timestamp upper "too-distant-future" limit
342 at the moment of invoking the Tx burst routine
343 can be estimated as ``tx_pp`` option (in nanoseconds) multiplied by 2^23.
344 Please note, for the testpmd txonly mode,
345 the limit is deduced from the expression::
347 (n_tx_descriptors / burst_size + 1) * inter_burst_gap
349 There is no any packet reordering according timestamps is supposed,
350 neither within packet burst, nor between packets, it is an entirely
351 application responsibility to generate packets and its timestamps
352 in desired order. The timestamps can be put only in the first packet
353 in the burst providing the entire burst scheduling.
355 - E-Switch decapsulation Flow:
357 - can be applied to PF port only.
358 - must specify VF port action (packet redirection from PF to VF).
359 - optionally may specify tunnel inner source and destination MAC addresses.
361 - E-Switch encapsulation Flow:
363 - can be applied to VF ports only.
364 - must specify PF port action (packet redirection from VF to PF).
368 - The input buffer, used as outer header, is not validated.
372 - The decapsulation is always done up to the outermost tunnel detected by the HW.
373 - The input buffer, providing the removal size, is not validated.
374 - The buffer size must match the length of the headers to be removed.
376 - ICMP(code/type/identifier/sequence number) / ICMP6(code/type) matching, IP-in-IP and MPLS flow matching are all
377 mutually exclusive features which cannot be supported together
378 (see :ref:`mlx5_firmware_config`).
382 - Requires DevX and DV flow to be enabled.
383 - KEEP_CRC offload cannot be supported with LRO.
384 - The first mbuf length, without head-room, must be big enough to include the
386 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
387 it with size limited to max LRO size, not to max RX packet length.
388 - LRO can be used with outer header of TCP packets of the standard format:
389 eth (with or without vlan) / ipv4 or ipv6 / tcp / payload
391 Other TCP packets (e.g. with MPLS label) received on Rx queue with LRO enabled, will be received with bad checksum.
392 - LRO packet aggregation is performed by HW only for packet size larger than
393 ``lro_min_mss_size``. This value is reported on device start, when debug
398 - ``RTE_ETH_RX_OFFLOAD_KEEP_CRC`` cannot be supported with decapsulation
399 for some NICs (such as ConnectX-6 Dx, ConnectX-6 Lx, and BlueField-2).
400 The capability bit ``scatter_fcs_w_decap_disable`` shows NIC support.
404 - fast free offload assumes the all mbufs being sent are originated from the
405 same memory pool and there is no any extra references to the mbufs (the
406 reference counter for each mbuf is equal 1 on tx_burst call). The latter
407 means there should be no any externally attached buffers in mbufs. It is
408 an application responsibility to provide the correct mbufs if the fast
409 free offload is engaged. The mlx5 PMD implicitly produces the mbufs with
410 externally attached buffers if MPRQ option is enabled, hence, the fast
411 free offload is neither supported nor advertised if there is MPRQ enabled.
415 - Supports ``RTE_FLOW_ACTION_TYPE_SAMPLE`` action only within NIC Rx and
416 E-Switch steering domain.
417 - For E-Switch Sampling flow with sample ratio > 1, additional actions are not
418 supported in the sample actions list.
419 - For ConnectX-5, the ``RTE_FLOW_ACTION_TYPE_SAMPLE`` is typically used as
420 first action in the E-Switch egress flow if with header modify or
421 encapsulation actions.
422 - For NIC Rx flow, supports ``MARK``, ``COUNT``, ``QUEUE``, ``RSS`` in the
424 - For E-Switch mirroring flow, supports ``RAW ENCAP``, ``Port ID``,
425 ``VXLAN ENCAP``, ``NVGRE ENCAP`` in the sample actions list.
429 - Supports the 'set' operation only for ``RTE_FLOW_ACTION_TYPE_MODIFY_FIELD`` action.
430 - Modification of an arbitrary place in a packet via the special ``RTE_FLOW_FIELD_START`` Field ID is not supported.
431 - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported.
432 - Encapsulation levels are not supported, can modify outermost header fields only.
433 - Offsets must be 32-bits aligned, cannot skip past the boundary of a field.
435 - IPv6 header item 'proto' field, indicating the next header protocol, should
436 not be set as extension header.
437 In case the next header is an extension header, it should not be specified in
438 IPv6 header item 'proto' field.
439 The last extension header item 'next header' field can specify the following
440 header protocol type.
444 - Hairpin between two ports could only manual binding and explicit Tx flow mode. For single port hairpin, all the combinations of auto/manual binding and explicit/implicit Tx flow mode could be supported.
445 - Hairpin in switchdev SR-IOV mode is not supported till now.
449 - All the meter colors with drop action will be counted only by the global drop statistics.
450 - Yellow detection is only supported with ASO metering.
451 - Red color must be with drop action.
452 - Meter statistics are supported only for drop case.
453 - A meter action created with pre-defined policy must be the last action in the flow except single case where the policy actions are:
454 - green: NULL or END.
455 - yellow: NULL or END.
457 - The only supported meter policy actions:
458 - green: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK and SET_TAG.
459 - yellow: QUEUE, RSS, PORT_ID, REPRESENTED_PORT, JUMP, DROP, MARK and SET_TAG.
461 - Policy actions of RSS for green and yellow should have the same configuration except queues.
462 - Policy with RSS/queue action is not supported when ``dv_xmeta_en`` enabled.
463 - meter profile packet mode is supported.
464 - meter profiles of RFC2697, RFC2698 and RFC4115 are supported.
468 - Integrity offload is enabled for **ConnectX-6** family.
469 - Verification bits provided by the hardware are ``l3_ok``, ``ipv4_csum_ok``, ``l4_ok``, ``l4_csum_ok``.
470 - ``level`` value 0 references outer headers.
471 - Multiple integrity items not supported in a single flow rule.
472 - Flow rule items supplied by application must explicitly specify network headers referred by integrity item.
473 For example, if integrity item mask sets ``l4_ok`` or ``l4_csum_ok`` bits, reference to L4 network header,
474 TCP or UDP, must be in the rule pattern as well::
476 flow create 0 ingress pattern integrity level is 0 value mask l3_ok value spec l3_ok / eth / ipv6 / end …
478 flow create 0 ingress pattern integrity level is 0 value mask l4_ok value spec 0 / eth / ipv4 proto is udp / end …
480 - Connection tracking:
482 - Cannot co-exist with ASO meter, ASO age action in a single flow rule.
483 - Flow rules insertion rate and memory consumption need more optimization.
485 - 4M connections maximum.
487 - Multi-thread flow insertion:
489 - In order to achieve best insertion rate, application should manage the flows per lcore.
490 - Better to disable memory reclaim by setting ``reclaim_mem_mode`` to 0 to accelerate the flow object allocation and release with cache.
494 - TXQ affinity subjects to HW hash once enabled.
496 - Bonding under socket direct mode
502 - CQE timestamp field width is limited by hardware to 63 bits, MSB is zero.
503 - In the free-running mode the timestamp counter is reset on power on
504 and 63-bit value provides over 1800 years of uptime till overflow.
505 - In the real-time mode
506 (configurable with ``REAL_TIME_CLOCK_ENABLE`` firmware settings),
507 the timestamp presents the nanoseconds elapsed since 01-Jan-1970,
508 hardware timestamp overflow will happen on 19-Jan-2038
509 (0x80000000 seconds since 01-Jan-1970).
510 - The send scheduling is based on timestamps
511 from the reference "Clock Queue" completions,
512 the scheduled send timestamps should not be specified with non-zero MSB.
517 MLX5 supports various methods to report statistics:
519 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
521 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
523 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
531 The ibverbs libraries can be linked with this PMD in a number of ways,
532 configured by the ``ibverbs_link`` build option:
534 - ``shared`` (default): the PMD depends on some .so files.
536 - ``dlopen``: Split the dependencies glue in a separate library
537 loaded when needed by dlopen.
538 It make dependencies on libibverbs and libmlx4 optional,
539 and has no performance impact.
541 - ``static``: Embed static flavor of the dependencies libibverbs and libmlx4
542 in the PMD shared library or the executable static binary.
544 Environment variables
545 ~~~~~~~~~~~~~~~~~~~~~
549 A list of directories in which to search for the rdma-core "glue" plug-in,
550 separated by colons or semi-colons.
552 - ``MLX5_SHUT_UP_BF``
554 Configures HW Tx doorbell register as IO-mapped.
556 By default, the HW Tx doorbell is configured as a write-combining register.
557 The register would be flushed to HW usually when the write-combining buffer
558 becomes full, but it depends on CPU design.
560 Run-time configuration
561 ~~~~~~~~~~~~~~~~~~~~~~
563 - librte_net_mlx5 brings kernel network interfaces up during initialization
564 because it is affected by their state. Forcing them down prevents packets
567 - **ethtool** operations on related kernel interfaces also affect the PMD.
572 In order to run as a non-root user,
573 some capabilities must be granted to the application::
575 setcap cap_sys_admin,cap_net_admin,cap_net_raw,cap_ipc_lock+ep <dpdk-app>
577 Below are the reasons of the need for each capability:
580 When using physical addresses (PA mode), with Linux >= 4.0,
581 for access to ``/proc/self/pagemap``.
584 For device configuration.
587 For raw ethernet queue allocation through kernel driver.
590 For DMA memory pinning.
595 - ``rxq_cqe_comp_en`` parameter [int]
597 A nonzero value enables the compression of CQE on RX side. This feature
598 allows to save PCI bandwidth and improve performance. Enabled by default.
599 Different compression formats are supported in order to achieve the best
600 performance for different traffic patterns. Default format depends on
601 Multi-Packet Rx queue configuration: Hash RSS format is used in case
602 MPRQ is disabled, Checksum format is used in case MPRQ is enabled.
604 Specifying 2 as a ``rxq_cqe_comp_en`` value selects Flow Tag format for
605 better compression rate in case of RTE Flow Mark traffic.
606 Specifying 3 as a ``rxq_cqe_comp_en`` value selects Checksum format.
607 Specifying 4 as a ``rxq_cqe_comp_en`` value selects L3/L4 Header format for
608 better compression rate in case of mixed TCP/UDP and IPv4/IPv6 traffic.
609 CQE compression format selection requires DevX to be enabled. If there is
610 no DevX enabled/supported the value is reset to 1 by default.
614 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
615 ConnectX-6 Lx, BlueField and BlueField-2.
616 - POWER9 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
617 ConnectX-6 Lx, BlueField and BlueField-2.
619 - ``rxq_pkt_pad_en`` parameter [int]
621 A nonzero value enables padding Rx packet to the size of cacheline on PCI
622 transaction. This feature would waste PCI bandwidth but could improve
623 performance by avoiding partial cacheline write which may cause costly
624 read-modify-copy in memory transaction on some architectures. Disabled by
629 - x86_64 with ConnectX-4, ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
630 ConnectX-6 Lx, BlueField and BlueField-2.
631 - POWER8 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx,
632 ConnectX-6 Lx, BlueField and BlueField-2.
634 - ``delay_drop`` parameter [int]
636 Bitmask value for the Rx queue delay drop attribute. Bit 0 is used for the
637 standard Rx queue and bit 1 is used for the hairpin Rx queue. By default, the
638 delay drop is disabled for all Rx queues. It will be ignored if the port does
639 not support the attribute even if it is enabled explicitly.
641 The packets being received will not be dropped immediately when the WQEs are
642 exhausted in a Rx queue with delay drop enabled.
644 A timeout value is set in the driver to control the waiting time before
645 dropping a packet. Once the timer is expired, the delay drop will be
646 deactivated for all the Rx queues with this feature enable. To re-activate
647 it, a rearming is needed and it is part of the kernel driver starting from
650 To enable / disable the delay drop rearming, the private flag ``dropless_rq``
651 can be set and queried via ethtool:
653 - ethtool --set-priv-flags <netdev> dropless_rq on (/ off)
654 - ethtool --show-priv-flags <netdev>
656 The configuration flag is global per PF and can only be set on the PF, once
657 it is on, all the VFs', SFs' and representors' Rx queues will share the timer
660 - ``mprq_en`` parameter [int]
662 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
663 configured as Multi-Packet RQ if the total number of Rx queues is
664 ``rxqs_min_mprq`` or more. Disabled by default.
666 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
667 by posting a single large buffer for multiple packets. Instead of posting a
668 buffers per a packet, one large buffer is posted in order to receive multiple
669 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
670 and each stride receives one packet. MPRQ can improve throughput for
671 small-packet traffic.
673 When MPRQ is enabled, MTU can be larger than the size of
674 user-provided mbuf even if RTE_ETH_RX_OFFLOAD_SCATTER isn't enabled. PMD will
675 configure large stride size enough to accommodate MTU as long as
676 device allows. Note that this can waste system memory compared to enabling Rx
677 scatter and multi-segment packet.
679 - ``mprq_log_stride_num`` parameter [int]
681 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
682 strides can reduce PCIe traffic further. If configured value is not in the
683 range of device capability, the default value will be set with a warning
684 message. The default value is 4 which is 16 strides per a buffer, valid only
685 if ``mprq_en`` is set.
687 The size of Rx queue should be bigger than the number of strides.
689 - ``mprq_log_stride_size`` parameter [int]
691 Log 2 of the size of a stride for Multi-Packet Rx queue. Configuring a smaller
692 stride size can save some memory and reduce probability of a depletion of all
693 available strides due to unreleased packets by an application. If configured
694 value is not in the range of device capability, the default value will be set
695 with a warning message. The default value is 11 which is 2048 bytes per a
696 stride, valid only if ``mprq_en`` is set. With ``mprq_log_stride_size`` set
697 it is possible for a packet to span across multiple strides. This mode allows
698 support of jumbo frames (9K) with MPRQ. The memcopy of some packets (or part
699 of a packet if Rx scatter is configured) may be required in case there is no
700 space left for a head room at the end of a stride which incurs some
703 - ``mprq_max_memcpy_len`` parameter [int]
705 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
706 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
707 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
708 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
709 A mempool for external buffers will be allocated and managed by PMD. If Rx
710 packet is externally attached, ol_flags field of the mbuf will have
711 RTE_MBUF_F_EXTERNAL and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
712 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
714 - ``rxqs_min_mprq`` parameter [int]
716 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
717 greater or equal to this value. The default value is 12, valid only if
720 - ``txq_inline`` parameter [int]
722 Amount of data to be inlined during TX operations. This parameter is
723 deprecated and converted to the new parameter ``txq_inline_max`` providing
724 partial compatibility.
726 - ``txqs_min_inline`` parameter [int]
728 Enable inline data send only when the number of TX queues is greater or equal
731 This option should be used in combination with ``txq_inline_max`` and
732 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
734 If this option is not specified the default value 16 is used for BlueField
735 and 8 for other platforms
737 The data inlining consumes the CPU cycles, so this option is intended to
738 auto enable inline data if we have enough Tx queues, which means we have
739 enough CPU cores and PCI bandwidth is getting more critical and CPU
740 is not supposed to be bottleneck anymore.
742 The copying data into WQE improves latency and can improve PPS performance
743 when PCI back pressure is detected and may be useful for scenarios involving
744 heavy traffic on many queues.
746 Because additional software logic is necessary to handle this mode, this
747 option should be used with care, as it may lower performance when back
748 pressure is not expected.
750 If inline data are enabled it may affect the maximal size of Tx queue in
751 descriptors because the inline data increase the descriptor size and
752 queue size limits supported by hardware may be exceeded.
754 - ``txq_inline_min`` parameter [int]
756 Minimal amount of data to be inlined into WQE during Tx operations. NICs
757 may require this minimal data amount to operate correctly. The exact value
758 may depend on NIC operation mode, requested offloads, etc. It is strongly
759 recommended to omit this parameter and use the default values. Anyway,
760 applications using this parameter should take into consideration that
761 specifying an inconsistent value may prevent the NIC from sending packets.
763 If ``txq_inline_min`` key is present the specified value (may be aligned
764 by the driver in order not to exceed the limits and provide better descriptor
765 space utilization) will be used by the driver and it is guaranteed that
766 requested amount of data bytes are inlined into the WQE beside other inline
767 settings. This key also may update ``txq_inline_max`` value (default
768 or specified explicitly in devargs) to reserve the space for inline data.
770 If ``txq_inline_min`` key is not present, the value may be queried by the
771 driver from the NIC via DevX if this feature is available. If there is no DevX
772 enabled/supported the value 18 (supposing L2 header including VLAN) is set
773 for ConnectX-4 and ConnectX-4 Lx, and 0 is set by default for ConnectX-5
774 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
777 For ConnectX-4 NIC, driver does not allow specifying value below 18
778 (minimal L2 header, including VLAN), error will be raised.
780 For ConnectX-4 Lx NIC, it is allowed to specify values below 18, but
781 it is not recommended and may prevent NIC from sending packets over
784 For ConnectX-4 and ConnectX-4 Lx NICs, automatically configured value
785 is insufficient for some traffic, because they require at least all L2 headers
786 to be inlined. For example, Q-in-Q adds 4 bytes to default 18 bytes
787 of Ethernet and VLAN, thus ``txq_inline_min`` must be set to 22.
788 MPLS would add 4 bytes per label. Final value must account for all possible
789 L2 encapsulation headers used in particular environment.
791 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
792 Multi-Packet Write), because last one does not support partial packet inlining.
793 This is not very critical due to minimal data inlining is mostly required
794 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
796 - ``txq_inline_max`` parameter [int]
798 Specifies the maximal packet length to be completely inlined into WQE
799 Ethernet Segment for ordinary SEND method. If packet is larger than specified
800 value, the packet data won't be copied by the driver at all, data buffer
801 is addressed with a pointer. If packet length is less or equal all packet
802 data will be copied into WQE. This may improve PCI bandwidth utilization for
803 short packets significantly but requires the extra CPU cycles.
805 The data inline feature is controlled by number of Tx queues, if number of Tx
806 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
807 is engaged, if there are not enough Tx queues (which means not enough CPU cores
808 and CPU resources are scarce), data inline is not performed by the driver.
809 Assigning ``txqs_min_inline`` with zero always enables the data inline.
811 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
812 by the driver in order not to exceed the limit (930 bytes) and to provide better
813 WQE space filling without gaps, the adjustment is reflected in the debug log.
814 Also, the default value (290) may be decreased in run-time if the large transmit
815 queue size is requested and hardware does not support enough descriptor
816 amount, in this case warning is emitted. If ``txq_inline_max`` key is
817 specified and requested inline settings can not be satisfied then error
820 - ``txq_inline_mpw`` parameter [int]
822 Specifies the maximal packet length to be completely inlined into WQE for
823 Enhanced MPW method. If packet is large the specified value, the packet data
824 won't be copied, and data buffer is addressed with pointer. If packet length
825 is less or equal, all packet data will be copied into WQE. This may improve PCI
826 bandwidth utilization for short packets significantly but requires the extra
829 The data inline feature is controlled by number of TX queues, if number of Tx
830 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
831 is engaged, if there are not enough Tx queues (which means not enough CPU cores
832 and CPU resources are scarce), data inline is not performed by the driver.
833 Assigning ``txqs_min_inline`` with zero always enables the data inline.
835 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
836 by the driver in order not to exceed the limit (930 bytes) and to provide better
837 WQE space filling without gaps, the adjustment is reflected in the debug log.
838 Due to multiple packets may be included to the same WQE with Enhanced Multi
839 Packet Write Method and overall WQE size is limited it is not recommended to
840 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
841 may be decreased in run-time if the large transmit queue size is requested
842 and hardware does not support enough descriptor amount, in this case warning
843 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
844 settings can not be satisfied then error will be raised.
846 - ``txqs_max_vec`` parameter [int]
848 Enable vectorized Tx only when the number of TX queues is less than or
849 equal to this value. This parameter is deprecated and ignored, kept
850 for compatibility issue to not prevent driver from probing.
852 - ``txq_mpw_hdr_dseg_en`` parameter [int]
854 A nonzero value enables including two pointers in the first block of TX
855 descriptor. The parameter is deprecated and ignored, kept for compatibility
858 - ``txq_max_inline_len`` parameter [int]
860 Maximum size of packet to be inlined. This limits the size of packet to
861 be inlined. If the size of a packet is larger than configured value, the
862 packet isn't inlined even though there's enough space remained in the
863 descriptor. Instead, the packet is included with pointer. This parameter
864 is deprecated and converted directly to ``txq_inline_mpw`` providing full
865 compatibility. Valid only if eMPW feature is engaged.
867 - ``txq_mpw_en`` parameter [int]
869 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
870 ConnectX-6, ConnectX-6 Dx, ConnectX-6 Lx, BlueField, BlueField-2.
871 eMPW allows the Tx burst function to pack up multiple packets
872 in a single descriptor session in order to save PCI bandwidth
873 and improve performance at the cost of a slightly higher CPU usage.
874 When ``txq_inline_mpw`` is set along with ``txq_mpw_en``,
875 Tx burst function copies entire packet data on to Tx descriptor
876 instead of including pointer of packet.
878 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
879 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
880 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
881 option or reported by the NIC, the eMPW feature is disengaged.
883 - ``tx_db_nc`` parameter [int]
885 The rdma core library can map doorbell register in two ways, depending on the
886 environment variable "MLX5_SHUT_UP_BF":
888 - As regular cached memory (usually with write combining attribute), if the
889 variable is either missing or set to zero.
890 - As non-cached memory, if the variable is present and set to not "0" value.
892 The type of mapping may slightly affect the Tx performance, the optimal choice
893 is strongly relied on the host architecture and should be deduced practically.
895 If ``tx_db_nc`` is set to zero, the doorbell is forced to be mapped to regular
896 memory (with write combining), the PMD will perform the extra write memory barrier
897 after writing to doorbell, it might increase the needed CPU clocks per packet
898 to send, but latency might be improved.
900 If ``tx_db_nc`` is set to one, the doorbell is forced to be mapped to non
901 cached memory, the PMD will not perform the extra write memory barrier
902 after writing to doorbell, on some architectures it might improve the
905 If ``tx_db_nc`` is set to two, the doorbell is forced to be mapped to regular
906 memory, the PMD will use heuristics to decide whether write memory barrier
907 should be performed. For bursts with size multiple of recommended one (64 pkts)
908 it is supposed the next burst is coming and no need to issue the extra memory
909 barrier (it is supposed to be issued in the next coming burst, at least after
910 descriptor writing). It might increase latency (on some hosts till next
911 packets transmit) and should be used with care.
913 If ``tx_db_nc`` is omitted or set to zero, the preset (if any) environment
914 variable "MLX5_SHUT_UP_BF" value is used. If there is no "MLX5_SHUT_UP_BF",
915 the default ``tx_db_nc`` value is zero for ARM64 hosts and one for others.
917 - ``tx_pp`` parameter [int]
919 If a nonzero value is specified the driver creates all necessary internal
920 objects to provide accurate packet send scheduling on mbuf timestamps.
921 The positive value specifies the scheduling granularity in nanoseconds,
922 the packet send will be accurate up to specified digits. The allowed range is
923 from 500 to 1 million of nanoseconds. The negative value specifies the module
924 of granularity and engages the special test mode the check the schedule rate.
925 By default (if the ``tx_pp`` is not specified) send scheduling on timestamps
928 - ``tx_skew`` parameter [int]
930 The parameter adjusts the send packet scheduling on timestamps and represents
931 the average delay between beginning of the transmitting descriptor processing
932 by the hardware and appearance of actual packet data on the wire. The value
933 should be provided in nanoseconds and is valid only if ``tx_pp`` parameter is
934 specified. The default value is zero.
936 - ``tx_vec_en`` parameter [int]
938 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 Dx,
939 ConnectX-6 Lx, BlueField and BlueField-2 NICs
940 if the number of global Tx queues on the port is less than ``txqs_max_vec``.
941 The parameter is deprecated and ignored.
943 - ``rx_vec_en`` parameter [int]
945 A nonzero value enables Rx vector if the port is not configured in
946 multi-segment otherwise this parameter is ignored.
950 - ``vf_nl_en`` parameter [int]
952 A nonzero value enables Netlink requests from the VF to add/remove MAC
953 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
954 Otherwise the relevant configuration must be run with Linux iproute2 tools.
955 This is a prerequisite to receive this kind of traffic.
957 Enabled by default, valid only on VF devices ignored otherwise.
959 - ``l3_vxlan_en`` parameter [int]
961 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
962 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
963 parameter. This is a prerequisite to receive this kind of traffic.
967 - ``dv_xmeta_en`` parameter [int]
969 A nonzero value enables extensive flow metadata support if device is
970 capable and driver supports it. This can enable extensive support of
971 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
972 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
974 There are some possible configurations, depending on parameter value:
976 - 0, this is default value, defines the legacy mode, the ``MARK`` and
977 ``META`` related actions and items operate only within NIC Tx and
978 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
979 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
980 item is 32 bits wide and match supported on egress only.
982 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
983 related actions and items operate within all supported steering domains,
984 including FDB, ``MARK`` and ``META`` information may cross the domain
985 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
986 depends on kernel and firmware configurations and might be 0, 16 or
987 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
988 compatibility, the actual width of data transferred to the FDB domain
989 depends on kernel configuration and may be vary. The actual supported
990 width can be retrieved in runtime by series of rte_flow_validate()
993 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
994 related actions and items operate within all supported steering domains,
995 including FDB, ``MARK`` and ``META`` information may cross the domain
996 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
997 depends on kernel and firmware configurations and might be 0, 16 or
998 24 bits. The actual supported width can be retrieved in runtime by
999 series of rte_flow_validate() trials.
1001 - 3, this engages tunnel offload mode. In E-Switch configuration, that
1002 mode implicitly activates ``dv_xmeta_en=1``.
1004 +------+-----------+-----------+-------------+-------------+
1005 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
1006 +======+===========+===========+=============+=============+
1007 | 0 | 24 bits | 32 bits | 32 bits | no |
1008 +------+-----------+-----------+-------------+-------------+
1009 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
1010 +------+-----------+-----------+-------------+-------------+
1011 | 2 | vary 0-24 | 32 bits | 32 bits | yes |
1012 +------+-----------+-----------+-------------+-------------+
1014 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
1015 ignored and the device is configured to operate in legacy mode (0).
1017 Disabled by default (set to 0).
1019 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
1020 of the extensive metadata features. The legacy Verbs supports FLAG and
1021 MARK metadata actions over NIC Rx steering domain only.
1023 Setting META value to zero in flow action means there is no item provided
1024 and receiving datapath will not report in mbufs the metadata are present.
1025 Setting MARK value to zero in flow action means the zero FDIR ID value
1026 will be reported on packet receiving.
1028 For the MARK action the last 16 values in the full range are reserved for
1029 internal PMD purposes (to emulate FLAG action). The valid range for the
1030 MARK action values is 0-0xFFEF for the 16-bit mode and 0-0xFFFFEF
1031 for the 24-bit mode, the flows with the MARK action value outside
1032 the specified range will be rejected.
1034 - ``dv_flow_en`` parameter [int]
1036 A nonzero value enables the DV flow steering assuming it is supported
1037 by the driver (RDMA Core library version is rdma-core-24.0 or higher).
1039 Enabled by default if supported.
1041 - ``dv_esw_en`` parameter [int]
1043 A nonzero value enables E-Switch using Direct Rules.
1045 Enabled by default if supported.
1047 - ``lacp_by_user`` parameter [int]
1049 A nonzero value enables the control of LACP traffic by the user application.
1050 When a bond exists in the driver, by default it should be managed by the
1051 kernel and therefore LACP traffic should be steered to the kernel.
1052 If this devarg is set to 1 it will allow the user to manage the bond by
1053 itself and not steer LACP traffic to the kernel.
1055 Disabled by default (set to 0).
1057 - ``mr_ext_memseg_en`` parameter [int]
1059 A nonzero value enables extending memseg when registering DMA memory. If
1060 enabled, the number of entries in MR (Memory Region) lookup table on datapath
1061 is minimized and it benefits performance. On the other hand, it worsens memory
1062 utilization because registered memory is pinned by kernel driver. Even if a
1063 page in the extended chunk is freed, that doesn't become reusable until the
1064 entire memory is freed.
1068 - ``mr_mempool_reg_en`` parameter [int]
1070 A nonzero value enables implicit registration of DMA memory of all mempools
1071 except those having ``RTE_MEMPOOL_F_NON_IO``. This flag is set automatically
1072 for mempools populated with non-contiguous objects or those without IOVA.
1073 The effect is that when a packet from a mempool is transmitted,
1074 its memory is already registered for DMA in the PMD and no registration
1075 will happen on the data path. The tradeoff is extra work on the creation
1076 of each mempool and increased HW resource use if some mempools
1077 are not used with MLX5 devices.
1081 - ``representor`` parameter [list]
1083 This parameter can be used to instantiate DPDK Ethernet devices from
1084 existing port (PF, VF or SF) representors configured on the device.
1086 It is a standard parameter whose format is described in
1087 :ref:`ethernet_device_standard_device_arguments`.
1089 For instance, to probe VF port representors 0 through 2::
1091 <PCI_BDF>,representor=vf[0-2]
1093 To probe SF port representors 0 through 2::
1095 <PCI_BDF>,representor=sf[0-2]
1097 To probe VF port representors 0 through 2 on both PFs of bonding device::
1099 <Primary_PCI_BDF>,representor=pf[0,1]vf[0-2]
1101 - ``max_dump_files_num`` parameter [int]
1103 The maximum number of files per PMD entity that may be created for debug information.
1104 The files will be created in /var/log directory or in current directory.
1106 set to 128 by default.
1108 - ``lro_timeout_usec`` parameter [int]
1110 The maximum allowed duration of an LRO session, in micro-seconds.
1111 PMD will set the nearest value supported by HW, which is not bigger than
1112 the input ``lro_timeout_usec`` value.
1113 If this parameter is not specified, by default PMD will set
1114 the smallest value supported by HW.
1116 - ``hp_buf_log_sz`` parameter [int]
1118 The total data buffer size of a hairpin queue (logarithmic form), in bytes.
1119 PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
1120 The capacity of the value is specified by the firmware and the initialization
1121 will get a failure if it is out of scope.
1122 The range of the value is from 11 to 19 right now, and the supported frame
1123 size of a single packet for hairpin is from 512B to 128KB. It might change if
1124 different firmware release is being used. By using a small value, it could
1125 reduce memory consumption but not work with a large frame. If the value is
1126 too large, the memory consumption will be high and some potential performance
1127 degradation will be introduced.
1128 By default, the PMD will set this value to 16, which means that 9KB jumbo
1129 frames will be supported.
1131 - ``reclaim_mem_mode`` parameter [int]
1133 Cache some resources in flow destroy will help flow recreation more efficient.
1134 While some systems may require the all the resources can be reclaimed after
1136 The parameter ``reclaim_mem_mode`` provides the option for user to configure
1137 if the resource cache is needed or not.
1139 There are three options to choose:
1141 - 0. It means the flow resources will be cached as usual. The resources will
1142 be cached, helpful with flow insertion rate.
1144 - 1. It will only enable the DPDK PMD level resources reclaim.
1146 - 2. Both DPDK PMD level and rdma-core low level will be configured as
1149 By default, the PMD will set this value to 0.
1151 - ``sys_mem_en`` parameter [int]
1153 A non-zero value enables the PMD memory management allocating memory
1154 from system by default, without explicit rte memory flag.
1156 By default, the PMD will set this value to 0.
1158 - ``decap_en`` parameter [int]
1160 Some devices do not support FCS (frame checksum) scattering for
1161 tunnel-decapsulated packets.
1162 If set to 0, this option forces the FCS feature and rejects tunnel
1163 decapsulation in the flow engine for such devices.
1165 By default, the PMD will set this value to 1.
1167 - ``allow_duplicate_pattern`` parameter [int]
1169 There are two options to choose:
1171 - 0. Prevent insertion of rules with the same pattern items on non-root table.
1172 In this case, only the first rule is inserted and the following rules are
1173 rejected and error code EEXIST is returned.
1175 - 1. Allow insertion of rules with the same pattern items.
1176 In this case, all rules are inserted but only the first rule takes effect,
1177 the next rule takes effect only if the previous rules are deleted.
1179 By default, the PMD will set this value to 1.
1181 .. _mlx5_firmware_config:
1183 Firmware configuration
1184 ~~~~~~~~~~~~~~~~~~~~~~
1186 Firmware features can be configured as key/value pairs.
1188 The command to set a value is::
1190 mlxconfig -d <device> set <key>=<value>
1192 The command to query a value is::
1194 mlxconfig -d <device> query | grep <key>
1196 The device name for the command ``mlxconfig`` can be either the PCI address,
1197 or the mst device name found with::
1201 Below are some firmware configurations listed.
1207 value: 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
1213 - maximum number of SR-IOV virtual functions::
1217 - enable DevX (required by Direct Rules and other features)::
1221 - aggressive CQE zipping::
1225 - L3 VXLAN and VXLAN-GPE destination UDP port::
1228 IP_OVER_VXLAN_PORT=<udp dport>
1230 - enable VXLAN-GPE tunnel flow matching::
1232 FLEX_PARSER_PROFILE_ENABLE=0
1234 FLEX_PARSER_PROFILE_ENABLE=2
1236 - enable IP-in-IP tunnel flow matching::
1238 FLEX_PARSER_PROFILE_ENABLE=0
1240 - enable MPLS flow matching::
1242 FLEX_PARSER_PROFILE_ENABLE=1
1244 - enable ICMP(code/type/identifier/sequence number) / ICMP6(code/type) fields matching::
1246 FLEX_PARSER_PROFILE_ENABLE=2
1248 - enable Geneve flow matching::
1250 FLEX_PARSER_PROFILE_ENABLE=0
1252 FLEX_PARSER_PROFILE_ENABLE=1
1254 - enable Geneve TLV option flow matching::
1256 FLEX_PARSER_PROFILE_ENABLE=0
1258 - enable GTP flow matching::
1260 FLEX_PARSER_PROFILE_ENABLE=3
1262 - enable eCPRI flow matching::
1264 FLEX_PARSER_PROFILE_ENABLE=4
1267 - enable dynamic flex parser for flex item::
1269 FLEX_PARSER_PROFILE_ENABLE=4
1272 - enable realtime timestamp format::
1274 REAL_TIME_CLOCK_ENABLE=1
1279 This driver relies on external libraries and kernel drivers for resources
1280 allocations and initialization. The following dependencies are not part of
1281 DPDK and must be installed separately:
1285 User space Verbs framework used by librte_net_mlx5. This library provides
1286 a generic interface between the kernel and low-level user space drivers
1289 It allows slow and privileged operations (context initialization, hardware
1290 resources allocations) to be managed by the kernel and fast operations to
1291 never leave user space.
1295 Low-level user space driver library for Mellanox
1296 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices, it is automatically loaded
1299 This library basically implements send/receive calls to the hardware
1302 - **Kernel modules**
1304 They provide the kernel-side Verbs API and low level device drivers that
1305 manage actual hardware initialization and resources sharing with user
1308 Unlike most other PMDs, these modules must remain loaded and bound to
1311 - mlx5_core: hardware driver managing Mellanox
1312 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices and related Ethernet kernel
1314 - mlx5_ib: InfiniBand device driver.
1315 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
1317 - **Firmware update**
1319 Mellanox OFED/EN releases include firmware updates for
1320 ConnectX-4/ConnectX-5/ConnectX-6/BlueField adapters.
1322 Because each release provides new features, these updates must be applied to
1323 match the kernel modules and libraries they come with.
1327 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
1333 Either RDMA Core library with a recent enough Linux kernel release
1334 (recommended) or Mellanox OFED/EN, which provides compatibility with older
1337 RDMA Core with Linux Kernel
1338 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
1340 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
1341 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
1342 (see `RDMA Core installation documentation`_)
1343 - When building for i686 use:
1345 - rdma-core version 18.0 or above built with 32bit support.
1346 - Kernel version 4.14.41 or above.
1348 - Starting with rdma-core v21, static libraries can be built::
1351 CFLAGS=-fPIC cmake -DIN_PLACE=1 -DENABLE_STATIC=1 -GNinja ..
1354 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
1355 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
1361 - Mellanox OFED version: **4.5** and above /
1362 Mellanox EN version: **4.5** and above
1365 - ConnectX-4: **12.21.1000** and above.
1366 - ConnectX-4 Lx: **14.21.1000** and above.
1367 - ConnectX-5: **16.21.1000** and above.
1368 - ConnectX-5 Ex: **16.21.1000** and above.
1369 - ConnectX-6: **20.27.0090** and above.
1370 - ConnectX-6 Dx: **22.27.0090** and above.
1371 - BlueField: **18.25.1010** and above.
1373 While these libraries and kernel modules are available on OpenFabrics
1374 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
1375 managers on most distributions, this PMD requires Ethernet extensions that
1376 may not be supported at the moment (this is a work in progress).
1379 <https://network.nvidia.com/products/infiniband-drivers/linux/mlnx_ofed/>`__ and
1381 <https://network.nvidia.com/products/ethernet-drivers/linux/mlnx_en/>`__
1382 include the necessary support and should be used in the meantime. For DPDK,
1383 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
1384 required from that distribution.
1388 Several versions of Mellanox OFED/EN are available. Installing the version
1389 this DPDK release was developed and tested against is strongly
1390 recommended. Please check the `linux prerequisites`_.
1392 Windows Prerequisites
1393 ---------------------
1395 This driver relies on external libraries and kernel drivers for resources
1396 allocations and initialization. The dependencies in the following sub-sections
1397 are not part of DPDK, and must be installed separately.
1399 Compilation Prerequisites
1400 ~~~~~~~~~~~~~~~~~~~~~~~~~
1402 DevX SDK installation
1403 ^^^^^^^^^^^^^^^^^^^^^
1405 The DevX SDK must be installed on the machine building the Windows PMD.
1406 Additional information can be found at
1407 `How to Integrate Windows DevX in Your Development Environment
1408 <https://docs.mellanox.com/display/winof2v250/RShim+Drivers+and+Usage#RShimDriversandUsage-DevXInterface>`__.
1410 Runtime Prerequisites
1411 ~~~~~~~~~~~~~~~~~~~~~
1413 WinOF2 version 2.60 or higher must be installed on the machine.
1418 The driver can be downloaded from the following site:
1420 <https://www.mellanox.com/products/adapter-software/ethernet/windows/winof-2>`__
1425 DevX for Windows must be enabled in the Windows registry.
1426 The keys ``DevxEnabled`` and ``DevxFsRules`` must be set.
1427 Additional information can be found in the WinOF2 user manual.
1432 The following Mellanox device families are supported by the same mlx5 driver:
1444 Below are detailed device names:
1446 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX4111A-XCAT (1x10G)
1447 * Mellanox\ |reg| ConnectX\ |reg|-4 10G MCX412A-XCAT (2x10G)
1448 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX4111A-ACAT (1x25G)
1449 * Mellanox\ |reg| ConnectX\ |reg|-4 25G MCX412A-ACAT (2x25G)
1450 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX413A-BCAT (1x40G)
1451 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX4131A-BCAT (1x40G)
1452 * Mellanox\ |reg| ConnectX\ |reg|-4 40G MCX415A-BCAT (1x40G)
1453 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX413A-GCAT (1x50G)
1454 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX4131A-GCAT (1x50G)
1455 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX414A-BCAT (2x50G)
1456 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-GCAT (1x50G)
1457 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-BCAT (2x50G)
1458 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX416A-GCAT (2x50G)
1459 * Mellanox\ |reg| ConnectX\ |reg|-4 50G MCX415A-CCAT (1x100G)
1460 * Mellanox\ |reg| ConnectX\ |reg|-4 100G MCX416A-CCAT (2x100G)
1461 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4111A-XCAT (1x10G)
1462 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 10G MCX4121A-XCAT (2x10G)
1463 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4111A-ACAT (1x25G)
1464 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 25G MCX4121A-ACAT (2x25G)
1465 * Mellanox\ |reg| ConnectX\ |reg|-4 Lx 40G MCX4131A-BCAT (1x40G)
1466 * Mellanox\ |reg| ConnectX\ |reg|-5 100G MCX556A-ECAT (2x100G)
1467 * Mellanox\ |reg| ConnectX\ |reg|-5 Ex EN 100G MCX516A-CDAT (2x100G)
1468 * Mellanox\ |reg| ConnectX\ |reg|-6 200G MCX654106A-HCAT (2x200G)
1469 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 100G MCX623106AN-CDAT (2x100G)
1470 * Mellanox\ |reg| ConnectX\ |reg|-6 Dx EN 200G MCX623105AN-VDAT (1x200G)
1471 * Mellanox\ |reg| ConnectX\ |reg|-6 Lx EN 25G MCX631102AN-ADAT (2x25G)
1473 Quick Start Guide on OFED/EN
1474 ----------------------------
1476 1. Download latest Mellanox OFED/EN. For more info check the `linux prerequisites`_.
1479 2. Install the required libraries and kernel modules either by installing
1480 only the required set, or by installing the entire Mellanox OFED/EN::
1482 ./mlnxofedinstall --upstream-libs --dpdk
1484 3. Verify the firmware is the correct one::
1488 4. Verify all ports links are set to Ethernet::
1490 mlxconfig -d <mst device> query | grep LINK_TYPE
1494 Link types may have to be configured to Ethernet::
1496 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
1498 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
1500 For hypervisors, verify SR-IOV is enabled on the NIC::
1502 mlxconfig -d <mst device> query | grep SRIOV_EN
1505 If needed, configure SR-IOV::
1507 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
1508 mlxfwreset -d <mst device> reset
1510 5. Restart the driver::
1512 /etc/init.d/openibd restart
1516 service openibd restart
1518 If link type was changed, firmware must be reset as well::
1520 mlxfwreset -d <mst device> reset
1522 For hypervisors, after reset write the sysfs number of virtual functions
1525 To dynamically instantiate a given number of virtual functions (VFs)::
1527 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
1529 6. Install DPDK and you are ready to go.
1530 See :doc:`compilation instructions <../linux_gsg/build_dpdk>`.
1532 Enable switchdev mode
1533 ---------------------
1535 Switchdev mode is a mode in E-Switch, that binds between representor and VF or SF.
1536 Representor is a port in DPDK that is connected to a VF or SF in such a way
1537 that assuming there are no offload flows, each packet that is sent from the VF or SF
1538 will be received by the corresponding representor. While each packet that is or SF
1539 sent to a representor will be received by the VF or SF.
1540 This is very useful in case of SRIOV mode, where the first packet that is sent
1541 by the VF or SF will be received by the DPDK application which will decide if this
1542 flow should be offloaded to the E-Switch. After offloading the flow packet
1543 that the VF or SF that are matching the flow will not be received any more by
1544 the DPDK application.
1546 1. Enable SRIOV mode::
1548 mlxconfig -d <mst device> set SRIOV_EN=true
1550 2. Configure the max number of VFs::
1552 mlxconfig -d <mst device> set NUM_OF_VFS=<num of vfs>
1556 mlxfwreset -d <mst device> reset
1558 3. Configure the actual number of VFs::
1560 echo <num of vfs > /sys/class/net/<net device>/device/sriov_numvfs
1562 4. Unbind the device (can be rebind after the switchdev mode)::
1564 echo -n "<device pci address" > /sys/bus/pci/drivers/mlx5_core/unbind
1566 5. Enable switchdev mode::
1568 echo switchdev > /sys/class/net/<net device>/compat/devlink/mode
1570 Sub-Function support
1571 --------------------
1573 Sub-Function is a portion of the PCI device, a SF netdev has its own
1574 dedicated queues (txq, rxq).
1575 A SF shares PCI level resources with other SFs and/or with its parent PCI function.
1579 OFED version >= 5.4-0.3.3.0
1581 1. Configure SF feature::
1583 # Run mlxconfig on both PFs on host and ECPFs on BlueField.
1584 mlxconfig -d <mst device> set PER_PF_NUM_SF=1 PF_TOTAL_SF=252 PF_SF_BAR_SIZE=12
1586 2. Enable switchdev mode::
1588 mlxdevm dev eswitch set pci/<DBDF> mode switchdev
1592 mlxdevm port add pci/<DBDF> flavour pcisf pfnum 0 sfnum <sfnum>
1594 Get SFID from output: pci/<DBDF>/<SFID>
1596 4. Modify MAC address::
1598 mlxdevm port function set pci/<DBDF>/<SFID> hw_addr <MAC>
1600 5. Activate SF port::
1602 mlxdevm port function set pci/<DBDF>/<ID> state active
1604 6. Devargs to probe SF device::
1606 auxiliary:mlx5_core.sf.<num>,dv_flow_en=1
1608 Sub-Function representor support
1609 --------------------------------
1611 A SF netdev supports E-Switch representation offload
1612 similar to PF and VF representors.
1613 Use <sfnum> to probe SF representor::
1615 testpmd> port attach <PCI_BDF>,representor=sf<sfnum>,dv_flow_en=1
1620 1. Configure aggressive CQE Zipping for maximum performance::
1622 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1624 To set it back to the default CQE Zipping mode use::
1626 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1628 2. In case of virtualization:
1630 - Make sure that hypervisor kernel is 3.16 or newer.
1631 - Configure boot with ``iommu=pt``.
1632 - Use 1G huge pages.
1633 - Make sure to allocate a VM on huge pages.
1634 - Make sure to set CPU pinning.
1636 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1637 for better performance. For VMs, verify that the right CPU
1638 and NUMA node are pinned according to the above. Run::
1640 lstopo-no-graphics --merge
1642 to identify the NUMA node to which the PCIe adapter is connected.
1644 4. If more than one adapter is used, and root complex capabilities allow
1645 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1646 it is recommended to locate both adapters on the same NUMA node.
1647 This in order to forward packets from one to the other without
1648 NUMA performance penalty.
1650 5. Disable pause frames::
1652 ethtool -A <netdev> rx off tx off
1654 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1655 via the BIOS configuration. Please contact you server provider for more
1656 information about the settings.
1660 On some machines, depends on the machine integrator, it is beneficial
1661 to set the PCI max read request parameter to 1K. This can be
1662 done in the following way:
1664 To query the read request size use::
1666 setpci -s <NIC PCI address> 68.w
1668 If the output is different than 3XXX, set it by::
1670 setpci -s <NIC PCI address> 68.w=3XXX
1672 The XXX can be different on different systems. Make sure to configure
1673 according to the setpci output.
1675 7. To minimize overhead of searching Memory Regions:
1677 - '--socket-mem' is recommended to pin memory by predictable amount.
1678 - Configure per-lcore cache when creating Mempools for packet buffer.
1679 - Refrain from dynamically allocating/freeing memory in run-time.
1684 There are multiple Rx burst functions with different advantages and limitations.
1686 .. table:: Rx burst functions
1688 +-------------------+------------------------+---------+-----------------+------+-------+
1689 || Function Name || Enabler || Scatter|| Error Recovery || CQE || Large|
1690 | | | | || comp|| MTU |
1691 +===================+========================+=========+=================+======+=======+
1692 | rx_burst | rx_vec_en=0 | Yes | Yes | Yes | Yes |
1693 +-------------------+------------------------+---------+-----------------+------+-------+
1694 | rx_burst_vec | rx_vec_en=1 (default) | No | if CQE comp off | Yes | No |
1695 +-------------------+------------------------+---------+-----------------+------+-------+
1696 | rx_burst_mprq || mprq_en=1 | No | Yes | Yes | Yes |
1697 | || RxQs >= rxqs_min_mprq | | | | |
1698 +-------------------+------------------------+---------+-----------------+------+-------+
1699 | rx_burst_mprq_vec || rx_vec_en=1 (default) | No | if CQE comp off | Yes | Yes |
1700 | || mprq_en=1 | | | | |
1701 | || RxQs >= rxqs_min_mprq | | | | |
1702 +-------------------+------------------------+---------+-----------------+------+-------+
1704 .. _mlx5_offloads_support:
1706 Supported hardware offloads
1707 ---------------------------
1709 .. table:: Minimal SW/HW versions for queue offloads
1711 ============== ===== ===== ========= ===== ========== =============
1712 Offload DPDK Linux rdma-core OFED firmware hardware
1713 ============== ===== ===== ========= ===== ========== =============
1714 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1715 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1716 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1717 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1718 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1719 Tx scheduling 20.08 N/A N/A 5.1-2 22.28.2006 ConnectX-6 Dx
1720 Buffer Split 20.11 N/A N/A 5.1-2 16.28.2006 ConnectX-5
1721 ============== ===== ===== ========= ===== ========== =============
1723 .. table:: Minimal SW/HW versions for rte_flow offloads
1725 +-----------------------+-----------------+-----------------+
1726 | Offload | with E-Switch | with NIC |
1727 +=======================+=================+=================+
1728 | Count | | DPDK 19.05 | | DPDK 19.02 |
1729 | | | OFED 4.6 | | OFED 4.6 |
1730 | | | rdma-core 24 | | rdma-core 23 |
1731 | | | ConnectX-5 | | ConnectX-5 |
1732 +-----------------------+-----------------+-----------------+
1733 | Drop | | DPDK 19.05 | | DPDK 18.11 |
1734 | | | OFED 4.6 | | OFED 4.5 |
1735 | | | rdma-core 24 | | rdma-core 23 |
1736 | | | ConnectX-5 | | ConnectX-4 |
1737 +-----------------------+-----------------+-----------------+
1738 | Queue / RSS | | | | DPDK 18.11 |
1739 | | | N/A | | OFED 4.5 |
1740 | | | | | rdma-core 23 |
1741 | | | | | ConnectX-4 |
1742 +-----------------------+-----------------+-----------------+
1743 | Shared action | | | | |
1744 | | | :numref:`sact`| | :numref:`sact`|
1747 +-----------------------+-----------------+-----------------+
1748 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1749 | | (of_pop_vlan / | | OFED 4.7-1 | | OFED 4.7-1 |
1750 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1751 | | of_set_vlan_pcp / | | | | |
1752 | | of_set_vlan_vid) | | | | |
1753 +-----------------------+-----------------+-----------------+
1754 | | VLAN | | DPDK 21.05 | | |
1755 | | ingress and / | | OFED 5.3 | | N/A |
1756 | | of_push_vlan / | | ConnectX-6 Dx | | |
1757 +-----------------------+-----------------+-----------------+
1758 | | VLAN | | DPDK 21.05 | | |
1759 | | egress and / | | OFED 5.3 | | N/A |
1760 | | of_pop_vlan / | | ConnectX-6 Dx | | |
1761 +-----------------------+-----------------+-----------------+
1762 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1763 | (VXLAN / NVGRE / RAW) | | OFED 4.7-1 | | OFED 4.6 |
1764 | | | rdma-core 24 | | rdma-core 23 |
1765 | | | ConnectX-5 | | ConnectX-5 |
1766 +-----------------------+-----------------+-----------------+
1767 | Encapsulation | | DPDK 19.11 | | DPDK 19.11 |
1768 | GENEVE | | OFED 4.7-3 | | OFED 4.7-3 |
1769 | | | rdma-core 27 | | rdma-core 27 |
1770 | | | ConnectX-5 | | ConnectX-5 |
1771 +-----------------------+-----------------+-----------------+
1772 | Tunnel Offload | | DPDK 20.11 | | DPDK 20.11 |
1773 | | | OFED 5.1-2 | | OFED 5.1-2 |
1774 | | | rdma-core 32 | | N/A |
1775 | | | ConnectX-5 | | ConnectX-5 |
1776 +-----------------------+-----------------+-----------------+
1777 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1778 | | (set_ipv4_src / | | OFED 4.7-1 | | OFED 4.7-1 |
1779 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 24 |
1780 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1781 | | set_ipv6_dst / | | | | |
1782 | | set_tp_src / | | | | |
1783 | | set_tp_dst / | | | | |
1784 | | dec_ttl / | | | | |
1785 | | set_ttl / | | | | |
1786 | | set_mac_src / | | | | |
1787 | | set_mac_dst) | | | | |
1788 +-----------------------+-----------------+-----------------+
1789 | | Header rewrite | | DPDK 20.02 | | DPDK 20.02 |
1790 | | (set_dscp) | | OFED 5.0 | | OFED 5.0 |
1791 | | | | rdma-core 24 | | rdma-core 24 |
1792 | | | | ConnectX-5 | | ConnectX-5 |
1793 +-----------------------+-----------------+-----------------+
1794 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1795 | | | OFED 4.7-1 | | OFED 4.7-1 |
1796 | | | rdma-core 24 | | N/A |
1797 | | | ConnectX-5 | | ConnectX-5 |
1798 +-----------------------+-----------------+-----------------+
1799 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1800 | | | OFED 4.6 | | OFED 4.5 |
1801 | | | rdma-core 24 | | rdma-core 23 |
1802 | | | ConnectX-5 | | ConnectX-4 |
1803 +-----------------------+-----------------+-----------------+
1804 | Meta data | | DPDK 19.11 | | DPDK 19.11 |
1805 | | | OFED 4.7-3 | | OFED 4.7-3 |
1806 | | | rdma-core 26 | | rdma-core 26 |
1807 | | | ConnectX-5 | | ConnectX-5 |
1808 +-----------------------+-----------------+-----------------+
1809 | Port ID | | DPDK 19.05 | | N/A |
1810 | | | OFED 4.7-1 | | N/A |
1811 | | | rdma-core 24 | | N/A |
1812 | | | ConnectX-5 | | N/A |
1813 +-----------------------+-----------------+-----------------+
1814 | Hairpin | | | | DPDK 19.11 |
1815 | | | N/A | | OFED 4.7-3 |
1816 | | | | | rdma-core 26 |
1817 | | | | | ConnectX-5 |
1818 +-----------------------+-----------------+-----------------+
1819 | 2-port Hairpin | | | | DPDK 20.11 |
1820 | | | N/A | | OFED 5.1-2 |
1822 | | | | | ConnectX-5 |
1823 +-----------------------+-----------------+-----------------+
1824 | Metering | | DPDK 19.11 | | DPDK 19.11 |
1825 | | | OFED 4.7-3 | | OFED 4.7-3 |
1826 | | | rdma-core 26 | | rdma-core 26 |
1827 | | | ConnectX-5 | | ConnectX-5 |
1828 +-----------------------+-----------------+-----------------+
1829 | ASO Metering | | DPDK 21.05 | | DPDK 21.05 |
1830 | | | OFED 5.3 | | OFED 5.3 |
1831 | | | rdma-core 33 | | rdma-core 33 |
1832 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1833 +-----------------------+-----------------+-----------------+
1834 | Metering Hierarchy | | DPDK 21.08 | | DPDK 21.08 |
1835 | | | OFED 5.3 | | OFED 5.3 |
1837 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1838 +-----------------------+-----------------+-----------------+
1839 | Sampling | | DPDK 20.11 | | DPDK 20.11 |
1840 | | | OFED 5.1-2 | | OFED 5.1-2 |
1841 | | | rdma-core 32 | | N/A |
1842 | | | ConnectX-5 | | ConnectX-5 |
1843 +-----------------------+-----------------+-----------------+
1844 | Encapsulation | | DPDK 21.02 | | DPDK 21.02 |
1845 | GTP PSC | | OFED 5.2 | | OFED 5.2 |
1846 | | | rdma-core 35 | | rdma-core 35 |
1847 | | | ConnectX-6 Dx| | ConnectX-6 Dx |
1848 +-----------------------+-----------------+-----------------+
1849 | Encapsulation | | DPDK 21.02 | | DPDK 21.02 |
1850 | GENEVE TLV option | | OFED 5.2 | | OFED 5.2 |
1851 | | | rdma-core 34 | | rdma-core 34 |
1852 | | | ConnectX-6 Dx | | ConnectX-6 Dx |
1853 +-----------------------+-----------------+-----------------+
1854 | Modify Field | | DPDK 21.02 | | DPDK 21.02 |
1855 | | | OFED 5.2 | | OFED 5.2 |
1856 | | | rdma-core 35 | | rdma-core 35 |
1857 | | | ConnectX-5 | | ConnectX-5 |
1858 +-----------------------+-----------------+-----------------+
1859 | Connection tracking | | | | DPDK 21.05 |
1860 | | | N/A | | OFED 5.3 |
1861 | | | | | rdma-core 35 |
1862 | | | | | ConnectX-6 Dx |
1863 +-----------------------+-----------------+-----------------+
1865 .. table:: Minimal SW/HW versions for shared action offload
1868 +-----------------------+-----------------+-----------------+
1869 | Shared Action | with E-Switch | with NIC |
1870 +=======================+=================+=================+
1871 | RSS | | | | DPDK 20.11 |
1872 | | | N/A | | OFED 5.2 |
1873 | | | | | rdma-core 33 |
1874 | | | | | ConnectX-5 |
1875 +-----------------------+-----------------+-----------------+
1876 | Age | | DPDK 20.11 | | DPDK 20.11 |
1877 | | | OFED 5.2 | | OFED 5.2 |
1878 | | | rdma-core 32 | | rdma-core 32 |
1879 | | | ConnectX-6 Dx | | ConnectX-6 Dx |
1880 +-----------------------+-----------------+-----------------+
1881 | Count | | DPDK 21.05 | | DPDK 21.05 |
1882 | | | OFED 4.6 | | OFED 4.6 |
1883 | | | rdma-core 24 | | rdma-core 23 |
1884 | | | ConnectX-5 | | ConnectX-5 |
1885 +-----------------------+-----------------+-----------------+
1890 MARK and META items are interrelated with datapath - they might move from/to
1891 the applications in mbuf fields. Hence, zero value for these items has the
1892 special meaning - it means "no metadata are provided", not zero values are
1893 treated by applications and PMD as valid ones.
1895 Moreover in the flow engine domain the value zero is acceptable to match and
1896 set, and we should allow to specify zero values as rte_flow parameters for the
1897 META and MARK items and actions. In the same time zero mask has no meaning and
1898 should be rejected on validation stage.
1903 Flows are not cached in the driver.
1904 When stopping a device port, all the flows created on this port from the
1905 application will be flushed automatically in the background.
1906 After stopping the device port, all flows on this port become invalid and
1907 not represented in the system.
1908 All references to these flows held by the application should be discarded
1909 directly but neither destroyed nor flushed.
1911 The application should re-create the flows as required after the port restart.
1916 Compared to librte_net_mlx4 that implements a single RSS configuration per
1917 port, librte_net_mlx5 supports per-protocol RSS configuration.
1919 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1920 command-line parameter to enable additional protocols (UDP and TCP as well
1921 as IP), the following commands must be entered from its CLI to get the same
1922 behavior as librte_net_mlx4::
1925 > port config all rss all
1931 This section demonstrates how to launch **testpmd** with Mellanox
1932 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_net_mlx5.
1934 #. Load the kernel modules::
1936 modprobe -a ib_uverbs mlx5_core mlx5_ib
1938 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1941 /etc/init.d/openibd restart
1945 User space I/O kernel modules (uio and igb_uio) are not used and do
1946 not have to be loaded.
1948 #. Make sure Ethernet interfaces are in working order and linked to kernel
1949 verbs. Related sysfs entries should be present::
1951 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1960 #. Optionally, retrieve their PCI bus addresses for to be used with the allow list::
1963 for intf in eth2 eth3 eth4 eth5;
1965 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1968 sed -n 's,.*/\(.*\),-a \1,p'
1977 #. Request huge pages::
1979 dpdk-hugepages.py --setup 2G
1981 #. Start testpmd with basic parameters::
1983 dpdk-testpmd -l 8-15 -n 4 -a 05:00.0 -a 05:00.1 -a 06:00.0 -a 06:00.1 -- --rxq=2 --txq=2 -i
1988 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1989 EAL: probe driver: 15b3:1013 librte_net_mlx5
1990 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1991 PMD: librte_net_mlx5: 1 port(s) detected
1992 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1993 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1994 EAL: probe driver: 15b3:1013 librte_net_mlx5
1995 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1996 PMD: librte_net_mlx5: 1 port(s) detected
1997 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1998 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1999 EAL: probe driver: 15b3:1013 librte_net_mlx5
2000 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
2001 PMD: librte_net_mlx5: 1 port(s) detected
2002 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
2003 EAL: PCI device 0000:06:00.1 on NUMA socket 0
2004 EAL: probe driver: 15b3:1013 librte_net_mlx5
2005 PMD: librte_net_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
2006 PMD: librte_net_mlx5: 1 port(s) detected
2007 PMD: librte_net_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
2008 Interactive-mode selected
2009 Configuring Port 0 (socket 0)
2010 PMD: librte_net_mlx5: 0x8cba80: TX queues number update: 0 -> 2
2011 PMD: librte_net_mlx5: 0x8cba80: RX queues number update: 0 -> 2
2012 Port 0: E4:1D:2D:E7:0C:FE
2013 Configuring Port 1 (socket 0)
2014 PMD: librte_net_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
2015 PMD: librte_net_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
2016 Port 1: E4:1D:2D:E7:0C:FF
2017 Configuring Port 2 (socket 0)
2018 PMD: librte_net_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
2019 PMD: librte_net_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
2020 Port 2: E4:1D:2D:E7:0C:FA
2021 Configuring Port 3 (socket 0)
2022 PMD: librte_net_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
2023 PMD: librte_net_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
2024 Port 3: E4:1D:2D:E7:0C:FB
2025 Checking link statuses...
2026 Port 0 Link Up - speed 40000 Mbps - full-duplex
2027 Port 1 Link Up - speed 40000 Mbps - full-duplex
2028 Port 2 Link Up - speed 10000 Mbps - full-duplex
2029 Port 3 Link Up - speed 10000 Mbps - full-duplex
2036 This section demonstrates how to dump flows. Currently, it's possible to dump
2037 all flows with assistance of external tools.
2039 #. 2 ways to get flow raw file:
2041 - Using testpmd CLI:
2043 .. code-block:: console
2046 testpmd> flow dump <port> all <output_file>
2048 testpmd> flow dump <port> rule <rule_id> <output_file>
2050 - call rte_flow_dev_dump api:
2052 .. code-block:: console
2054 rte_flow_dev_dump(port, flow, file, NULL);
2056 #. Dump human-readable flows from raw file:
2058 Get flow parsing tool from: https://github.com/Mellanox/mlx_steering_dump
2060 .. code-block:: console
2062 mlx_steering_dump.py -f <output_file> -flowptr <flow_ptr>
2064 How to share a meter between ports in the same switch domain
2065 ------------------------------------------------------------
2067 This section demonstrates how to use the shared meter. A meter M can be created
2068 on port X and to be shared with a port Y on the same switch domain by the next way:
2070 .. code-block:: console
2072 flow create X ingress transfer pattern eth / port_id id is Y / end actions meter mtr_id M / end
2074 How to use meter hierarchy
2075 --------------------------
2077 This section demonstrates how to create and use a meter hierarchy.
2078 A termination meter M can be the policy green action of another termination meter N.
2079 The two meters are chained together as a chain. Using meter N in a flow will apply
2080 both the meters in hierarchy on that flow.
2082 .. code-block:: console
2084 add port meter policy 0 1 g_actions queue index 0 / end y_actions end r_actions drop / end
2085 create port meter 0 M 1 1 yes 0xffff 1 0
2086 add port meter policy 0 2 g_actions meter mtr_id M / end y_actions end r_actions drop / end
2087 create port meter 0 N 2 2 yes 0xffff 1 0
2088 flow create 0 ingress group 1 pattern eth / end actions meter mtr_id N / end