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3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
36 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
37 virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
107 - Inner RSS for VXLAN frames is not supported yet.
108 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
109 - For secondary process:
111 - Forked secondary process not supported.
112 - All mempools must be initialized before rte_eth_dev_start().
114 - Flow pattern without any specific vlan will match for vlan packets as well:
116 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
117 Meaning, the flow rule::
119 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
121 Will only match vlan packets with vid=3. and the flow rules::
123 flow create 0 ingress pattern eth / ipv4 / end ...
127 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
129 Will match any ipv4 packet (VLAN included).
131 - A multi segment packet must have less than 6 segments in case the Tx burst function
132 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
133 less than 50 segments.
134 - Count action for RTE flow is **only supported in Mellanox OFED**.
135 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
136 to 0 are not supported.
137 - VXLAN TSO and checksum offloads are not supported on VM.
142 MLX5 supports various of methods to report statistics:
144 Port statistics can be queried using ``rte_eth_stats_get()``. The port statistics are through SW only and counts the number of packets received or sent successfully by the PMD.
146 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
148 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
156 These options can be modified in the ``.config`` file.
158 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
160 Toggle compilation of librte_pmd_mlx5 itself.
162 - ``CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS`` (default **n**)
164 Build PMD with additional code to make it loadable without hard
165 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
166 on the target system.
168 In this mode, their presence is still required for it to run properly,
169 however their absence won't prevent a DPDK application from starting (with
170 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
171 missing with ``ldd(1)``.
173 This option has no performance impact.
175 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
177 Toggle debugging code and stricter compilation flags. Enabling this option
178 adds additional run-time checks and debugging messages at the cost of
181 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
183 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
184 which buffers are to be transmitted must be associated to memory regions
185 (MRs). This is a slow operation that must be cached.
187 This value is always 1 for RX queues since they use a single MP.
189 Environment variables
190 ~~~~~~~~~~~~~~~~~~~~~
192 - ``MLX5_PMD_ENABLE_PADDING``
194 Enables HW packet padding in PCI bus transactions.
196 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
197 bytes are written to the PCI bus. Enabling padding makes such packets
200 In cases where PCI bandwidth is the bottleneck, padding can improve
203 This is disabled by default since this can also decrease performance for
204 unaligned packet sizes.
206 - ``MLX5_SHUT_UP_BF``
208 Configures HW Tx doorbell register as IO-mapped.
210 By default, the HW Tx doorbell is configured as a write-combining register.
211 The register would be flushed to HW usually when the write-combining buffer
212 becomes full, but it depends on CPU design.
214 Except for vectorized Tx burst routines, a write memory barrier is enforced
215 after updating the register so that the update can be immediately visible to
218 When vectorized Tx burst is called, the barrier is set only if the burst size
219 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
220 variable will bring better latency even though the maximum throughput can
223 Run-time configuration
224 ~~~~~~~~~~~~~~~~~~~~~~
226 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
227 because it is affected by their state. Forcing them down prevents packets
230 - **ethtool** operations on related kernel interfaces also affect the PMD.
232 - ``rxq_cqe_comp_en`` parameter [int]
234 A nonzero value enables the compression of CQE on RX side. This feature
235 allows to save PCI bandwidth and improve performance. Enabled by default.
239 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
240 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
242 - ``txq_inline`` parameter [int]
244 Amount of data to be inlined during TX operations. Improves latency.
245 Can improve PPS performance when PCI back pressure is detected and may be
246 useful for scenarios involving heavy traffic on many queues.
248 Because additional software logic is necessary to handle this mode, this
249 option should be used with care, as it can lower performance when back
250 pressure is not expected.
252 - ``txqs_min_inline`` parameter [int]
254 Enable inline send only when the number of TX queues is greater or equal
257 This option should be used in combination with ``txq_inline`` above.
259 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
261 - Disabled by default.
262 - In case ``txq_inline`` is set recommendation is 4.
264 On ConnectX-5 with Enhanced MPW:
266 - Set to 8 by default.
268 - ``txq_mpw_en`` parameter [int]
270 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
271 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
272 TX burst function to pack up multiple packets in a single descriptor
273 session in order to save PCI bandwidth and improve performance at the
274 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
275 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
276 on to TX descriptor instead of including pointer of packet only if there
277 is enough room remained in the descriptor. ``txq_inline`` sets
278 per-descriptor space for either pointers or inlined packets. In addition,
279 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
280 in the same descriptor.
282 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
283 DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.
284 When those offloads are requested the MPS send function will not be used.
286 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
287 families of adapters. Enabled by default.
289 - ``txq_mpw_hdr_dseg_en`` parameter [int]
291 A nonzero value enables including two pointers in the first block of TX
292 descriptor. This can be used to lessen CPU load for memory copy.
294 Effective only when Enhanced MPS is supported. Disabled by default.
296 - ``txq_max_inline_len`` parameter [int]
298 Maximum size of packet to be inlined. This limits the size of packet to
299 be inlined. If the size of a packet is larger than configured value, the
300 packet isn't inlined even though there's enough space remained in the
301 descriptor. Instead, the packet is included with pointer.
303 Effective only when Enhanced MPS is supported. The default value is 256.
305 - ``tx_vec_en`` parameter [int]
307 A nonzero value enables Tx vector on ConnectX-5 only NIC if the number of
308 global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
310 This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO,
311 DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``.
312 When those offloads are requested the MPS send function will not be used.
314 Enabled by default on ConnectX-5.
316 - ``rx_vec_en`` parameter [int]
318 A nonzero value enables Rx vector if the port is not configured in
319 multi-segment otherwise this parameter is ignored.
326 This driver relies on external libraries and kernel drivers for resources
327 allocations and initialization. The following dependencies are not part of
328 DPDK and must be installed separately:
332 User space Verbs framework used by librte_pmd_mlx5. This library provides
333 a generic interface between the kernel and low-level user space drivers
336 It allows slow and privileged operations (context initialization, hardware
337 resources allocations) to be managed by the kernel and fast operations to
338 never leave user space.
342 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
343 devices, it is automatically loaded by libibverbs.
345 This library basically implements send/receive calls to the hardware
350 They provide the kernel-side Verbs API and low level device drivers that
351 manage actual hardware initialization and resources sharing with user
354 Unlike most other PMDs, these modules must remain loaded and bound to
357 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
358 devices and related Ethernet kernel network devices.
359 - mlx5_ib: InifiniBand device driver.
360 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
362 - **Firmware update**
364 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
367 Because each release provides new features, these updates must be applied to
368 match the kernel modules and libraries they come with.
372 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
378 Either RDMA Core library with a recent enough Linux kernel release
379 (recommended) or Mellanox OFED, which provides compatibility with older
382 RMDA Core with Linux Kernel
383 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
385 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
386 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
387 (see `RDMA Core installation documentation`_)
389 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
390 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
395 - Mellanox OFED version: **4.2, 4.3**.
398 - ConnectX-4: **12.21.1000** and above.
399 - ConnectX-4 Lx: **14.21.1000** and above.
400 - ConnectX-5: **16.21.1000** and above.
401 - ConnectX-5 Ex: **16.21.1000** and above.
403 While these libraries and kernel modules are available on OpenFabrics
404 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
405 managers on most distributions, this PMD requires Ethernet extensions that
406 may not be supported at the moment (this is a work in progress).
409 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
410 includes the necessary support and should be used in the meantime. For DPDK,
411 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
412 required from that distribution.
416 Several versions of Mellanox OFED are available. Installing the version
417 this DPDK release was developed and tested against is strongly
418 recommended. Please check the `prerequisites`_.
423 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
424 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
425 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
426 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
427 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
428 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
429 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
430 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
431 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
432 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
433 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
434 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
435 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
436 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
437 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
438 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
439 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
440 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
441 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
443 Quick Start Guide on OFED
444 -------------------------
446 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
449 2. Install the required libraries and kernel modules either by installing
450 only the required set, or by installing the entire Mellanox OFED:
452 .. code-block:: console
454 ./mlnxofedinstall --upstream-libs --dpdk
456 3. Verify the firmware is the correct one:
458 .. code-block:: console
462 4. Verify all ports links are set to Ethernet:
464 .. code-block:: console
466 mlxconfig -d <mst device> query | grep LINK_TYPE
470 Link types may have to be configured to Ethernet:
472 .. code-block:: console
474 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
476 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
478 For hypervisors verify SR-IOV is enabled on the NIC:
480 .. code-block:: console
482 mlxconfig -d <mst device> query | grep SRIOV_EN
485 If needed, set enable the set the relevant fields:
487 .. code-block:: console
489 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
490 mlxfwreset -d <mst device> reset
492 5. Restart the driver:
494 .. code-block:: console
496 /etc/init.d/openibd restart
500 .. code-block:: console
502 service openibd restart
504 If link type was changed, firmware must be reset as well:
506 .. code-block:: console
508 mlxfwreset -d <mst device> reset
510 For hypervisors, after reset write the sysfs number of virtual functions
513 To dynamically instantiate a given number of virtual functions (VFs):
515 .. code-block:: console
517 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
519 6. Compile DPDK and you are ready to go. See instructions on
520 :ref:`Development Kit Build System <Development_Kit_Build_System>`
525 1. Configure aggressive CQE Zipping for maximum performance:
527 .. code-block:: console
529 mlxconfig -d <mst device> s CQE_COMPRESSION=1
531 To set it back to the default CQE Zipping mode use:
533 .. code-block:: console
535 mlxconfig -d <mst device> s CQE_COMPRESSION=0
537 2. In case of virtualization:
539 - Make sure that hypervisor kernel is 3.16 or newer.
540 - Configure boot with ``iommu=pt``.
542 - Make sure to allocate a VM on huge pages.
543 - Make sure to set CPU pinning.
545 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
546 for better performance. For VMs, verify that the right CPU
547 and NUMA node are pinned according to the above. Run:
549 .. code-block:: console
553 to identify the NUMA node to which the PCIe adapter is connected.
555 4. If more than one adapter is used, and root complex capabilities allow
556 to put both adapters on the same NUMA node without PCI bandwidth degradation,
557 it is recommended to locate both adapters on the same NUMA node.
558 This in order to forward packets from one to the other without
559 NUMA performance penalty.
561 5. Disable pause frames:
563 .. code-block:: console
565 ethtool -A <netdev> rx off tx off
567 6. Verify IO non-posted prefetch is disabled by default. This can be checked
568 via the BIOS configuration. Please contact you server provider for more
569 information about the settings.
573 On some machines, depends on the machine integrator, it is beneficial
574 to set the PCI max read request parameter to 1K. This can be
575 done in the following way:
577 To query the read request size use:
579 .. code-block:: console
581 setpci -s <NIC PCI address> 68.w
583 If the output is different than 3XXX, set it by:
585 .. code-block:: console
587 setpci -s <NIC PCI address> 68.w=3XXX
589 The XXX can be different on different systems. Make sure to configure
590 according to the setpci output.
595 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
596 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
598 Since ``testpmd`` defaults to IP RSS mode and there is currently no
599 command-line parameter to enable additional protocols (UDP and TCP as well
600 as IP), the following commands must be entered from its CLI to get the same
601 behavior as librte_pmd_mlx4:
603 .. code-block:: console
606 > port config all rss all
612 This section demonstrates how to launch **testpmd** with Mellanox
613 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
615 #. Load the kernel modules:
617 .. code-block:: console
619 modprobe -a ib_uverbs mlx5_core mlx5_ib
621 Alternatively if MLNX_OFED is fully installed, the following script can
624 .. code-block:: console
626 /etc/init.d/openibd restart
630 User space I/O kernel modules (uio and igb_uio) are not used and do
631 not have to be loaded.
633 #. Make sure Ethernet interfaces are in working order and linked to kernel
634 verbs. Related sysfs entries should be present:
636 .. code-block:: console
638 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
642 .. code-block:: console
649 #. Optionally, retrieve their PCI bus addresses for whitelisting:
651 .. code-block:: console
654 for intf in eth2 eth3 eth4 eth5;
656 (cd "/sys/class/net/${intf}/device/" && pwd -P);
659 sed -n 's,.*/\(.*\),-w \1,p'
663 .. code-block:: console
670 #. Request huge pages:
672 .. code-block:: console
674 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
676 #. Start testpmd with basic parameters:
678 .. code-block:: console
680 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
684 .. code-block:: console
687 EAL: PCI device 0000:05:00.0 on NUMA socket 0
688 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
689 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
690 PMD: librte_pmd_mlx5: 1 port(s) detected
691 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
692 EAL: PCI device 0000:05:00.1 on NUMA socket 0
693 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
694 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
695 PMD: librte_pmd_mlx5: 1 port(s) detected
696 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
697 EAL: PCI device 0000:06:00.0 on NUMA socket 0
698 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
699 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
700 PMD: librte_pmd_mlx5: 1 port(s) detected
701 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
702 EAL: PCI device 0000:06:00.1 on NUMA socket 0
703 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
704 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
705 PMD: librte_pmd_mlx5: 1 port(s) detected
706 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
707 Interactive-mode selected
708 Configuring Port 0 (socket 0)
709 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
710 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
711 Port 0: E4:1D:2D:E7:0C:FE
712 Configuring Port 1 (socket 0)
713 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
714 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
715 Port 1: E4:1D:2D:E7:0C:FF
716 Configuring Port 2 (socket 0)
717 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
718 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
719 Port 2: E4:1D:2D:E7:0C:FA
720 Configuring Port 3 (socket 0)
721 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
722 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
723 Port 3: E4:1D:2D:E7:0C:FB
724 Checking link statuses...
725 Port 0 Link Up - speed 40000 Mbps - full-duplex
726 Port 1 Link Up - speed 40000 Mbps - full-duplex
727 Port 2 Link Up - speed 10000 Mbps - full-duplex
728 Port 3 Link Up - speed 10000 Mbps - full-duplex